M74HC123 STMICROELECTRONICS | Alldatasheet

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■ HIGH SPEED : tPD = 23 ns (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: STAND BY STATE : I CC =4µA (MAX.) at TA=25°C ACTIVE STATE : I CC =200µA (MAX.) at VCC = 5V ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28 % VCC (MIN.) ■ SYMMETRICAL OUTPUT IMPEDANCE: OH | = IOL = 4mA (MIN) ■ BALANCED PROPAGATION DELAYS: t PLH ≅ tPHL ■ WIDE OPERATING VOLTAGE RANGE: V CC (OPR) = 2V to 6V ■ WIDE OUTPUT PULSE WIDTH RANGE : t WOUT = 120 ns ~ 60 s OVER AT VCC = 4.5 V ■ PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 123

DESCRIPTION

The M74HC123 is an high speed CMOS MONOSTABLE MULTIVIBRATOR fabricated with silicon gate C 2MOS technology. There are two trigger inputs, A INPUT (negative edge) and B INPUT (positive edge). These inputs are valid for slow rising/falling signals, (tr=tf=l sec). The device may also be triggered by using the CLR input (positive-edge) because of the Schmitt-trigger input; after triggering the output maintains the MONOSTABLE state for the time period determined by the external resistor Rx and capacitor Cx. When Cx > 10nF and Rx > 10KΩ, the output pulse width value is approsimatively given by the formula : tW(OUT) = K · Cx · Rx. ≅ 0.45). Taking CLR low breaks this MONOSTABLE STATE. If the next trigger pulse occurs during the MONOSTABLE period it makes the MONOSTABLE period longer. Limit for values of Cx and Rx : Cx : NO LIMIT Rx : V cc < 3.0V 5KΩ to 1MΩ Vcc > 3.0V 1KΩ to 1MΩ All inputs are equipped with protection circuits against static discharge and transient excess voltage. M74HC123 DUAL RETRIGGERABLE MONOSTABLE MULTIVIBRATOR PIN CONNECTION AND IEC LOGIC SYMBOLS ORDER CODES PACKAGE TUBE T & R DIP M74HC123B1R SOP M74HC123M1R M74HC123RM13TR TSSOP M74HC123TTR TSSOPDIP SOP

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION TRUTH TABLE X : Don’t Care PIN No SYMBOL NAME AND FUNCTION 1,9 1A , 2A Trigger Inputs (Negative Edge Triggered) 2, 10 1B, 2B Trigger Inputs (Positive Edge Triggered) 3, 11 1 CLR

2 CLR

trigger Action at Positive Edge 4, 12 1Q , 2Q Outputs (Active Low) 7 2R X/CX External Resistor Capacitor Connection 13, 5 1Q, 2Q Outputs (Active High) 14, 6 1C X 2C X External Capacitor Connection 15 1R X/CX External Resistor Capacitor Connection

8 GND Ground (0V)

16 Vcc Positive Supply Voltage

This logic diagram has not be used to estimate propagation delays TIMING CHART

(1) Cx, Rx, Dx are external components. (2) Dx is a clamping diode. The external capacitor is charged to Vcc in the stand-by-state, i.e. no trigger. When the supply voltage is turned off Cx is discharged mainly trough an internal parasitic diode(see figures). If Cx is sufficiently large and Vcc decreases rapidly, there will be some possibility of damaging the I.C. with a surge current or latch-up. If the voltage supply filter capacitor is large enough and Vcc decrease slowly, the surge current is automatically limited and damage to the I.C. is avoided. The maximum forward current of the parasitic diode is approximately 20 mA. In cases where Cx is large the time taken for the supply voltage to fall to 0.4 Vcc can be calculated as follows : t f > (Vcc - 0.7) x Cx/20mA In cases where tf is too short an external clamping diode is required to protect the I.C. from the surge current. FUNCTIONAL DESCRIPTION STAND-BY STATE The external capacitor,Cx, is fully charged to Vcc in the stand-by state. Hence, before triggering, transistor Qp and Qn (connected to the Rx/Cx node) are both turned-off. The two comparators that control the timing and the two reference voltage sources stop operating. The total supply current is therefore only leakage current. TRIGGER OPERATION Triggering occurs when : 1 st) A is "LOW" and B has a falling edge; 2 nd) B is "HIGH" and A has a rising edge; 3 rd) A is "LOW" and B is HIGH and C1 has a rising edge; After the multivibrator has been retriggered comparator C1 and C2 start operating and Qn is turned on. Cx then discharges through Qn. The voltage at the node R/C external falls. When it reaches V REFL the output of comparator C1 becomes low. This in turn reset the flip-flop and Qn is turned off. At this point C1 stops functioning but C2 continues to operate. The voltage at R/C external begins to rise with a time constant set by the external components Rx, Cx. Triggering the multivibrator causes Q to go high after internal delay due to the flip-flop and the gate. Q remains high until the voltage at R/C external rises again to V REFH . At this point C2 output goes low and O goes low. C2 stop operating. That means that after triggering when the voltage R/C external returns to VREFH the multivibrator has returned to its MONOSTABLE STATE. In the case where Rx · Cx are large enough and the discharge time of the capacitor and the delay time in the I.C. can be ignored, the width of the output pulse tw (out) is as follows : tW(OUT) = 0.45 Cx · Rx RE - TRIGGERED OPERATION When a second trigger pulse follows the first its effect will depend on the state of the multivibrator. If the capacitor Cx is being charged the voltage level of R/C external falls to V REFL again and Q remains High i.e. the retrigger pulse arrives in a time shorter than the period Rx · Cx seconds, the capacitor charging time constant. If the second trigger pulse is very close to the initial trigger pulse it is ineffective ; i.e. the second trigger must arrive in the capacitor discharge cycle to be ineffective; Hence the minimum time for a second trigger to be effective depends on Vcc and Cx RESET OPERATION CL is normally high. If CL is low, the trigger is not effective because Q output goes low and trigger control flip-flop is reset. Also transistor Op is turned on and Cx is charged quickly to Vcc. This means if CL input goes low the IC becomes waiting state both in operating and non operating state.

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is not implied (*) 500mW at 65 °C; derate to 300mW by 10mW/°C from 65°C to 85°C RECOMMENDED OPERATING CONDITIONS The Maximum allowable values of Cx and Rx are a function of leakage of capacitor Cx, the leakage of device and leakage due to the board layout and surface resistance. Susceptibility to externally induced noise may occur for Rx > 1MΩ Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V VI DC Input Voltage -0.5 to V CC + 0.5 V VO DC Output Voltage -0.5 to V CC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 25 mA ICC or IGND DC V CC or Ground Current ± 50 mA PD Power Dissipation 500(*) mW Tstg Storage Temperature -65 to +150 °C TL Lead Temperature (10 sec) 300 °C Symbol Parameter Value Unit VCC Supply Voltage 2 to 6 V VI Input Voltage 0 to V CC V VO Output Voltage 0 to V CC V Top Operating Temperature -55 to 125 °C tr, tf Input Rise and Fall Time V CC = 2.0V 0 to 1000 ns VCC = 4.5V 0 to 500 ns VCC = 6.0V 0 to 400 ns Cx External Capacitor NO LIMITATION pF Rx External Resistor Vcc < 3V 5K to 1M ΩVcc > 3V 1K to 1M

(1) : Per Circuit Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C VIH High Level Input Voltage 2.0 1.5 1.5 1.5 V4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 VIL Low Level Input Voltage 2.0 0.5 0.5 0.5 V4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 VOH High Level Output Voltage V VOL Low Level Output Voltage V II Input Leakage Current 6.0 VI = VCC or GND ± 0.1 ± 1 ± 1 µA ICC Quiescent Supply Current 6.0 VI = VCC or GND 44 0 8 0 µA ICC’ Active State Supply Current (1)

2.0 VI = VCC or GND

VIN = VCC /2 45 200 260 320 µA 4.5 500 600 780 960 µA 6.0 0.7 1 1.3 1.6 mA

AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, Input tr = tf = 6ns) CAPACITIVE CHARACTERISTICS 1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC ’ Duty/100 + Ic/2(per monostable) (Icc’ : Active Supply current) (Duty : %) Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C tTLH tTHL Output Transition Time 2.0 30 75 95 110 ns4 . 5 8 1 51 92 2 6 . 0 7 1 31 61 9 tPLH tPHL Propagation Delay Time (A, B - Q, Q) 2.0 102 210 265 315 ns4.5 29 42 53 63 6.0 22 36 45 54 tPLH tPHL Propagation Delay Time(CLR TRIGGER - Q, Q) 2.0 102 235 295 355 ns4.5 31 47 59 71 6.0 23 40 50 60 tPLH tPHL Propagation Delay Time (CLR - Q, Q) 2.0 68 160 200 240 ns4.5 20 32 40 48 6.0 16 27 34 41 tWOUT Output Pulse Width 2.0 Cx = 100 pF Rx = 10KΩ 1.4 µs4.5 1.2 6.0 1.1 2.0 Cx = 0.1µF Rx = 100K Ω 4.6 ms4.5 4.4 6.0 4.3 ΔtWOUT Output Pulse Width Error Between Circuits in Same Package t W(H) tW(L) Minimum Pulse Width 2.0 75 95 110 ns4.5 15 19 22 6.0 13 16 19 tW(L) Minimum Pulse Width (CLR) 2.0 75 95 110 ns4.5 15 19 22 6.0 13 16 19 trr Minimum Retrigger Time 2.0 Cx = 100 pF Rx = 10KΩ 325 ns4.5 108 6.0 78 2.0 Cx = 0.1µF Rx = 100KΩ µs4.5 1.4 6.0 1.2 Symbol Parameter Test Condition Value UnitVCC (V) TA = 25°C -40 to 85°C -55 to 125°C C IN Input Capacitance 5 . 0 5 1 01 01 0 p F C PD Power Dissipation Capacitance (note 5.0 162 pF

C L = 50pF or equivalent (includes jig and probe capacitance) R T = ZOUT of pulse generator (typically 50Ω ) WAVEFORM : SWITCIHNG CHARACTERISTICS TEST WAVEFORM (f=1MHz; 50% duty cycle)

DIM. mm. inch a1 0.51 0.020 B 0.77 1.65 0.030 0.065 b 0.5 0.020 b1 0.25 0.010 D 20 0.787 E 8.5 0.335 e 2.54 0.100 e3 17.78 0.700 F 7.1 0.280 I 5.1 0.201 L 3.3 0.130 Z 1.27 0.050 Plastic DIP-16 (0.25) MECHANICAL DATA P001C

DIM. mm. inch A 1.75 0.068 a1 0.1 0.2 0.003 0.007 a2 1.65 0.064 b 0.35 0.46 0.013 0.018 b1 0.19 0.25 0.007 0.010 C 0.5 0.019 c1 45° (typ.) D 9.8 10 0.385 0.393 E 5.8 6.2 0.228 0.244 e 1.27 0.050 e3 8.89 0.350 F 3.8 4.0 0.149 0.157 G 4.6 5.3 0.181 0.208 L 0.5 1.27 0.019 0.050 M 0.62 0.024 S8 ° ( m a x . ) SO-16 MECHANICAL DATA PO13H

DIM. mm. inch A 1.2 0.047 b 0.19 0.30 0.007 0.012 c 0.09 0.20 0.004 0.0089 e 0.65 BSC 0.0256 BSC K0 ° 8 °0 ° 8 ° TSSOP16 MECHANICAL DATA c Eb A2A D PIN 1 IDENTIFICATION LKe 0080338D

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