74ACT574 STMICROELECTRONICS | Alldatasheet

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WITH 3 STATE OUTPUT NON INVERTING February 2000 n HIGH SPEED: fMAX = 250 MHz (TYP.) at VCC =3.3V n LOW POWER DISSIPATION: ICC =8 µA (MAX.) at TA =2 5oC n COMPATIBLEWITH TTL OUTPUTS VIH =2 V( M I N ) ,VIL= 0.8V(MAX) n 50Ω TRANSMISSION LINE DRIVING CAPABILITY n SYMMETRICAL OUTPUT IMPEDANCE: OH |=IOL = 24 mA (MIN) n BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL n OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V n PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 574

n IMPROVED LATCH-UP IMMUNITY

DESCRIPTION

The ACT574 is an advanced high-speed CMOS OCTAL D-TYPE FLIP FLOP with 3 STATE OUTPUT NON INVERTING fabricated with sub-micron silicon gate and double-layer metal wiring C 2MOS technology. These 8 bit D-Type flip-flops are controlled by a clock input (CK) and an output enable input (OE). On the positive transition of the clock, the Q outputs will be set to logic state that were setup at the D inputs. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while high level the outputs will be in a high impedance state. The output control does not affect the internal operation of flip flop; that is, the old data can be retained or the new data can be entered even while the outputs are off. The device is designed to interface directly High Speed CMOS system with TTL and NMOS components. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. PIN CONNECTION AND IEC LOGIC SYMBOLS SOPDIP TSSOP ORDER CODES PACKAGE TUBE T & R DIP M74ACT574B SOP M74ACT574M M74ACT574MTR TSSOP M74ACT574TTR

INPUT AND OUTPUT EQUIVALENT CIRCUIT PIN DESCRIPTION PIN No SYMBOL NAME AND FUNCTION

1 OE 3 State Output Enable

Input (Active LOW) 2, 3, 4, 5, 6, 7, 8, 9 D0 to D7 Data Inputs 12, 13, 14, 15, 16, 17, 18, 19 Q0 to Q7 3 State Outputs

11 CLOCK Clock Input (LOW to

HIGH, edge triggered)

10 GND Ground (0V)

20 V CC Positive Supply Voltage

X:DON’T CARE Z: HIGHIMPEDANCE LOGIC DIAGRAMS 74ACT574

Symbol Parameter Value Unit VCC Supply Voltage -0.5 to +7 V V I DC Input Voltage -0.5 to V CC + 0.5 V V O DC Output Voltage -0.5 to V CC + 0.5 V IIK DC Input Diode Current ± 20 mA IOK DC Output Diode Current ± 20 mA IO DC Output Current ± 50 mA ICC or IGND DC V CC or Ground Current ± 400 mA Tstg Storage Temperature -65 to +150 oC TL Lead Temperature (10 sec) 300 oC AbsoluteMaximum Ratingsarethose values beyond whichdam age to the device may occur. Functional operation un der these condition isnot implied. RECOMMENDED OPERATING CONDITIONS Symbol Parameter Value Unit VCC Supply Voltage 4.5 to 5.5 V V I Input Voltage 0 to V CC V V O Output Voltage 0 to V CC V Top Operating Temperature: -40 to +85 oC dt/dv Input Rise and Fall Time VCC = 4.5 to 5.5V (note 1) 8 ns/V 1) VINfrom 0.8V to 2.0V 74ACT574

Symbol Parameter Test Conditions Value Unit V CC (V) TA =2 5 oC -40 to 85 o C VIH High Level Input Voltage 4.5 V O = 0.1 V or VCC - 0.1 V 2.0 1.5 2.0 V 5.5 2.0 1.5 2.0 VIL Low Level Input Voltage 4.5 V O = 0.1 V or VCC - 0.1 V 1.5 0.8 0.8 V 5.5 1.5 0.8 0.8 VOH High Level Output Voltage

4.5 V I

(*)= V IH or V IL IO =-50µA 4.4 4.49 4.4 V5.5 I O =-50µA 5.4 5.49 5.4 4.5 I O =-24 mA 3.86 3.76 5.5 I O =-24 mA 4.86 4.76 VOL Low Level Output Voltage (*)= V IH or V IL IO =50 µA 0.001 0.1 0.1 V5.5 I O =50 mA 0.001 0.1 0.1 4.5 I O =24 mA 0.36 0.44 5.5 I O =24 mA 0.36 0.44 II Input Leakage Current 5.5 V I =V CC or GND ±0.1 ±1 µA IOZ 3 State Output Leakage Current

5.5 V I =V IH or VIL

VO =V CC or GND ±0.5 ±5 µA ICCT Max ICC /Input 5.5 V I =V CC -2.1 V 0.6 1.5 mA ICC Quiescent Supply Current

5.5 V I =V CC or GND 8 80 µA

IOLD Dynamic Output Current (note 1, 2) 5.5 V OLD = 1.65 V max 75 mA IOHD VOHD = 3.85 V min -75 mA 1) Maximum test duration 2ms, one output loaded at time 2) Inciden t wave switching is guaranteed on transmission lines withimpeda nces aslow as 50Ω . (*) All outputs loaded. 74ACT574

CAPACITIVE CHARACTERISTICS Symbol Parameter Test Conditions Value Unit V CC (V) TA =2 5 oC -40 to 85 o C C OUT Output Capacitance 5.0 8 pF C IN Input Capacitance 5.0 4 pF C PD Power Dissipation Capacitance (note 1) 5.0 26 pF 1) CPD isdefined as thevalue of the IC’sinternal equivalent capacitance whichis calculated fromthe operating current consumption without load. (Referto Test Circuit).Average operating current can be obtained bythe followingequation. ICC (opr) = CPD • VCC • fIN+ICC /n (per circuit) AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500Ω , Input tr =tf =3 ns) Symbol Parameter Test Condition Value Unit V CC (V) TA =2 5 oC -40 to 85 o C tPLH tPHL Propagation Delay Time CK to Q tPZL tPZH Output Enable Time 5.0 (*) 5.5 9.0 10.0 ns tPLH tPHL Output Disable Time 5.0 (*) 5.0 8.5 9.0 ns tw CK Pulse Width, HIGH or LOW ts Setup Time Q to CK HIGH or LOW th Hold Time Q to CK HIGH or LOW fMAX Maximim Clock Frequency 5.0(*) 100 250 85 MHz (*) Voltag erange is 5V± 0.5V 74ACT574

tPLH ,tPHL Open tPZL ,tPLZ 2VCC tPZH ,tPHZ Open CL = 50 pF or equivalent (includes jig and probe capacitance) RL =R 1 =5 0 0Ω orequivalent RT =Z OUT of pulse generator (typically50Ω ) WAVEFORM 1: PROPAGATION DELAYS, SETUP AND HOLD TIMES (f=1MHz; 50% duty cycle) TEST CIRCUIT 74ACT574

WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) WAVEFORM 3: PULSE WIDTH 74ACT574

DIM. mm inch a1 0.254 0.010 B 1.39 1.65 0.055 0.065 b 0.45 0.018 b1 0.25 0.010 D 25.4 1.000 E 8.5 0.335 e 2.54 0.100 e3 22.86 0.900 F 7.1 0.280 I 3.93 0.155 L 3.3 0.130 Z 1.34 0.053 P001J Plastic DIP-20 (0.25) MECHANICAL DATA 74ACT574

DIM. mm inch A 2.65 0.104 a1 0.10 0.20 0.004 0.007 a2 2.45 0.096 b 0.35 0.49 0.013 0.019 b1 0.23 0.32 0.009 0.012 C 0.50 0.020 c1 45 (typ.) D 12.60 13.00 0.496 0.512 E 10.00 10.65 0.393 0.419 e 1.27 0.050 e3 11.43 0.450 F 7.40 7.60 0.291 0.299 L 0.50 1.27 0.19 0.050 M 0.75 0.029 S 8 (max.) P013L SO-20 MECHANICAL DATA 74ACT574

DIM. mm inch A 1.1 0.433 b 0.19 0.30 0.0075 0.0118 c 0.09 0.2 0.0035 0.0079 e 0.65 BSC 0.0256 BSC o 4o 8o 0o 4o 8o c Eb A2A D PIN 1 IDENTIFICATION A1 LKe TSSOP20 MECHANICAL DATA 74ACT574

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