M68AF031A STMICROELECTRONICS | Alldatasheet

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Technical content

Figure 1. Packages

Table 13. TSOP28 - 28 lead Reverse Pinout Plastic Small Outline, Package Mechanical Data. . . 19

Standard and Reverse Pinout) packages. Figure 2. Logic Diagram Table 1. Signal Names

Figure 7. Block Diagram

Table 2. Absolute Maximum Ratings Note: 1. One output at a time, not to exceed 1 second duration.

  1. Up to a maximum operating VCC of 6.0V only.
  2. Compliant with the JEDEC Std J-STD-020B (for small body, Sn-Pb or Pb assembly), the ST ECOPACK® 7191395 specification,

and the European directive on Restrictions on Hazardous Substances (RoHS) 2002/95/EU.

tions when using the quoted parameters. Table 3. Operating and AC Measurement Conditions Figure 8. AC Measurement I/O Waveform Figure 9. AC Measurement Load Circuit

Table 4. Capacitance Note: 1. Sampled only, not 100% tested. Table 5. DC Characteristics (M68AF031A-55 and M68AF031A-70) Note: 1. Average AC current, cycling at tAVAV minimum.

  1. E = VIL, VIN = VIL OR VIH.

whenever Chip Enable is de-asserted (E= High). cles to be achieved with the common I/O data bus. ing Modes table (see Table 6., Operating Modes). Table 6. Operating Modes tGLQX but data lines will always be valid at tAVQV . Figure 10. Address Controlled, Read Mode AC Waveforms Note: E = Low, G = Low, W = High.

Table 7. Read and Standby Mode AC Characteristics Note: 1. Test conditions assume transition timing reference level = 0.3VCC or 0.7VCC .

  1. At any given temperature and voltage condition, tGHQZ is less than tGLQX and tEHQZ is less than tELQX for any given device.
  2. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output
  3. Tested initially and after any design or process changes that may affect these parameters.

Table 8. Write Mode AC Characteristics Note: 1. At any given temperature and voltage condition, tWLQZ is less than tWHQX for any given device.

  1. These parameters are defined as the time at which the outputs achieve the open circuit conditions and are not referenced to output

Figure 15. Low VCC Data Retention AC Waveforms

Table 9. Low VCC Data Retention Characteristics Note: 1. All other Inputs at VIH ≥ VCC –0.2V or VIL ≤ 0.2V.

  1. Tested initially and after any design or process changes that may affect these parameters. tAVAV is Read cycle time.
  2. No input may exceed VCC +0.2V.

Figure 16. SO28 - 28 lead Plastic Small Outline, 300 mils body width, Package Outline Note: Drawing is not to scale. Table 10. SO28 - 28 lead Plastic Small Outline, 300 mils body width, Package Mechanical Data

Figure 17. PDIP28 - 28 pin Plastic DIP, 600 mils width, Package Outline Note: Drawing is not to scale. Table 11. PDIP28 - 28 pin Plastic DIP, n600 mils width, Package Mechanical Data

Figure 18. TSOP28 - 28 lead Normal Pinout Plastic Small Outline, Package Outline Note: Drawing is not to scale. Table 12. TSOP28 - 28 lead Normal Pinout Plastic Small Outline, Package Mechanical Data

Figure 19. TSOP28 - 28 lead Reverse Pinout Plastic Small Outline, Package Outline Note: Drawing is not to scale. Table 13. TSOP28 - 28 lead Reverse Pinout Plastic Small Outline, Package Mechanical Data

Table 14. Ordering Information Scheme vice, please contact the STMicroelectronics Sales Office nearest to you.

REVISION HISTORY

Table 15. Document Revision History (revision version 08 equals 8.0). 09-Oct-2002 8.2 Datasheet number simplified. 27-May-2004 9.0 Package outline and package mechanical data added for TSOP28 Reverse package. LEAD parameter added in Table 2., Absolute Maximum Ratings. Standard Lead-free option added in Table 14., Ordering Information Scheme. Lead-Free Tape & Reel option added in Table 14., Ordering Information Scheme.

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