M62023FP | DigiCamel IC Datasheet

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M62023L_07 RENESAS | Alldatasheet

Document overview

Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
PDF pages: 13

Technical content

Features

Built-in switch for selection between main power supply and backup power supply to RAMs
Small difference between input and output voltages (IOUT = 80mA, VIN=3V): 0.15V typ.
Detection voltage (power supply monitor voltage): 2.57V typ.
Chip select signal output (CS)
Two channels of reset outputs (RES/RES)
Power on reset circuit. Application Power supply control systems for memory of microcontroller systems in electronic equipment such as OA equipment, industrial equipment, and home-use electronic appliances and SRAM boards with built-in backup function that require switching between external power supply and battery. Block Diagram RES CS RES GND SW Com 1.24V Reset Circuit Delay Circuit VOUTVIN VBAT Ct

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 2 of 12 Pin Arrangement CSCS RESRES GNDGND RESRES VOUT Ct VIN VBAT VOUT Ct VIN VBAT (Top view) M62023P M62023FP Outline: PRSS0008AA-A (8P5) [L] (Top view) M62023L Outline: PRDP0008AA-A (8P4) [P] PRSP0008DE-C [FP] (recommend) PRSP0008DA-A (8P2S-A) [FP] (not recommend for new design) Pin Description Pin No. Symbol Name Function

1 V OUT Power supply output V IN and VBAT are controlled by means of an internal switch and output

through VOUT. The pin is capable of outputting up to 100mA. Use it as V DD of CMOS RAM and the like.

2 V BAT Backup power supply

Backup power supply is connected to this pin. If a lithium battery is used, insert a resistor in series for safety purposes. 3 V IN Power supply input +3V input pin. Connect to a logic power supply.

4 C t Delay capacitor

A delay capacitor is connected to this pi n. By connecting a capacitor, it is possible to delay each output. 5 RES Positive reset output Connect to the positive reset input of a microcontroller. The pin is capable of flowing 1mA sink current. 6 GND Ground Reference for all signals. 7 RES Negative reset output Connect to the negative reset input of a microcontroller. The pin is capable of flowing 1mA sink current. 8 CS Chip select output Connect to the Chip Select of RAM. The CS output is at low level in normal state thereby letting RAM be active. Under failure or backup condition, the CS output is set to high level, then RAM enters standby state disabling read/write function. The pin is capable of flowing a 1mA sink current.

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 3 of 12 Absolute Maximum Ratings (Ta = 25°C, unless otherwise noted.) Item Symbol Ratings Unit Conditions Input voltage VIN 7 V Output current IOUT 100 mA Power dissipation Pd 800 (L) / 625 (P) / 440 (FP) mW Thermal derating Kθ 8 (L) / 6.25 (P) / 4.4 (FP) mW/°C Ta ≥ 25°C Operating temperature Topr –20 to +75 °C Storage temperature Tstg –40 to +125 °C

Electrical Characteristics

(Ta = 25°C, unless otherwise noted.) Item Sysbol Min Typ Max Unit Test Conditions Detection voltage VS 2.44 2.57 2.70 V VIN (At change from H→L) Hysteresis voltage ∆VS 50 100 200 mV ∆VS = VSH – VSL — 1.5 3.0 V IN = 2V Circuit current ICC — 6.5 10 mA I OUT = 0mA VIN = 3V — 0.1 0.2 I OUT = 50mA Difference between input and output voltage VDROP — 0.15 0.3 V VIN = 3V IOUT = 80mA Ct output voltage (high level) V OH(Ct) 2.0 2.4 — V V IN = 3V *1 Ct output voltage (low level) V OL(Ct) — 0.02 0.1 V V IN = 2V *1 RES output voltage (high level) V OH(RES) 1.5 2.0 — V V IN = 2V *1 — 0.02 — VIN = 3V *1 RES output voltage (low level) VOL(RES) — 0.04 0.2 V VIN = 3V, Isink = 1mA RES output voltage (high level) V OH(RES) 2.5 3.0 — V V IN = 3V *1 — 0.02 — VIN = 2V *1 RES output voltage (low level) VOL(RES) — 0.04 0.2 V VIN = 2V, Isink = 1mA 1.3 1.6 — VIN = 2V *2 CS output voltage (high level) VOH(CS) 2.40 2.47 — V VIN = 0V, VBAT = 3V *2 — 0.07 — VIN = 3V *1 CS output voltage (low level) VOL(CS) — 0.08 0.3 V VIN = 3V, Isink = 1mA — — ±0.5 V IN = 3V Backup Di leak current IR — — ±0.5 µA VBAT = 3V VIN = 0V Backup Di forward direction voltage VF — 0.54 0.6 V IF = 10µA Delay time tpd 10 27 55 ms V IN = 0V→3V, Ct = 4.7µF Response time td — 5.0 25.0 µs VIN = 3V→2V RES limit voltage of operation VOPL (RES) — 0.65 — V *3 Notes: 1. Regarding conditions to measure V OH and VOL, voltage values are generated by internal resistance only and no external resistor is used. 2. These values are produced inserting an external resistor, R CS = 1MΩ, between the CS pin and GND. 3. With no external resistor (10k Ω internal resistance only).

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 4 of 12 Application Example +3.0V (Main Power Supply) Reset Circuit Delay Circuit VDD VDD VIN VBAT VOUT COUT*CIN* RES CS RES GND SW M62023 1.24V Com Ct Battery Ct MCU or CPU CMOS RAM 1 1

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 5 of 12 Configuration <Power supply detector> The internal reference voltage Vref is compared by means of a comparator with resistor divided voltage VR (resistor- divided voltage produced by R1 and R2 from VIN). If the input voltage is 3V, VR is set to 1.24V or higher, so the comparator output is at low level and the Ct output (Q1 collector output) is set to high level. If the input voltage drops to below 2.57V in an abnormal condition, VR becomes below 1.24V, so the comparator output goes from low to high level and the Ct output, from high to low. The input voltage at this point is called VSL. Next, when the input voltage, restored from abnormal state, has a rise, the comparator output goes from high to low level and the Ct output, from low to high. The comparator used for detection has 100mV hysteresis (∆Vs), so that malfunctioning is prevented in case that the input voltage slowly drops or VR nearly equals Vref. 2.0 3.0 1.0 Input voltage VIN Ct output VO (Ct) (V) (V) VSL VSH ∆Vs <Delay Circuit> Connecting an external capacitor to the Ct pin lets RES, RES, CS, and VOUT be delayed due to RC transient phenomenon (electric charge). Delay time is determined as follows. Delay time (tpd) = Ct×R3×In [VOH(Ct)-VOL(Ct)] [VOH(Ct)-INV1(VTH)] Note: Ct is an external capacitance. Taking into consideration the time taken by the oscillator of microcomputer to be stable, connect a 4.7µF capacitor to the Ct pin. (As the response time of detection can be slowed due to internal structure depending on the rising rate of power supply, avoid connecting a too large capacitance.) tpd VOH (Ct) INV1 (Vth) VOL (Ct) Delayed output waveforms of Ct

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 6 of 12 <Schmitt trigger circuit> Since waveforms show a gentle rise due to the RC delay circuit, INV1, INV2, and R6 constitute a Schmitt trigger circuit to produce hysteresis so as to prevent each output from chattering. Internal Circuit 7534 Ct VIN RES VR RES VOUT VBAT CS GND 25.6kΩ Com INV8 INV9 INV3 INV4 INV5 INV6 INV7 R4 R5 R9 R10 5kΩ 22kΩ R7 R8 24kΩ Vref 1.24V 22kΩ 0Ω 10kΩ 47kΩ INV1 INV2 10kΩ 10kΩ 800Ω R10 R11 10kΩQ2

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 7 of 12 Timing Chart tpd tpd VSH VSL VOL(CS) VOL(RES) VOL(RES) VOH(RES) V1=VIN-VDROP V2=VIN-VEB(SW Tr.) V3=VBAT-VF VIN VOUT RES CS RES VIN(VSL) VIN(VSL) ∆Vs Input voltage In normal operation In failure (instantaneous drop) Restoration from failure (instantaneous drop) In backup state Output pin Input voltage: 3V Input voltage: 3V →2V Each output varies if the input voltage drops to V SL or under Input voltage: 2V→3V If the input voltage goes higher than V SL by 100mV, each output varies after delay produced by the delay circuit. Input voltage: 0V Backup voltage: 3V VOUT With SW Tr. set to ON, a voltage (VIN-VDROP) is output. SW Tr. is turned OFF. A voltage (VIN-VEB) is output by the diode between E and B of SW Tr. SW Tr. is turned ON after delay and a voltage (VIN-VDROP) is output. VBAT-VF RES The output level is VOL (RES) with a logic low. As the state shifts from a logic low to logic high, the output level becomes approximately equal to the input voltage. A logic high is maintained, and then shifts to a logic low. RES The output level is VOH(RES) with a logic high. As the state shifts from a logic high to logic low, the output level becomes V OL(RES) A logic low is maintained, and then shifts to a logic high. CS The output level is VOL(CS) with a logic low. As the state shifts from a logic low to logic high, the output level becomes the voltage V IN-VEB. A logic high is maintained, and then shifts to a logic low. The output is a logic high and the output level is V BAT-VF

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 8 of 12 Typical Characteristics Detection Voltage vs . Ambient Temperature 02 0 4 0 8 0 100 Ambient temperature Ta (°C) Ambient temperature Ta (°C) Ambient temperature Ta (°C) Ambient temperature Ta (°C) Detection voltage Vs (V) -20 60 2.64 2.63 2.62 2.61 2.60 2.59 2.58 2.57 2.56 Thermal Derating (Maximum Rating) 200 400 600 800 1000 0 25 50 75 100 125 Ambient temperature Ta (°C) Power dissipation P d (mW) M62023L M62023P M62023FP Hysteresis Voltage vs . Ambient Temperature 100 110 120 130 140 02 0 4 0 8 0 100 Tj = 25°C -20 60 Circuit Current vs. Ambient Temperature Circuit Current vs. Ambient Temperature Circuit current Icc (mA) Circuit current Icc (mA) 02 0 4 0 8 0 100-20 60 VIN = 3V 02 0 4 0 8 0 100-20 60 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 VIN = 2V v

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 9 of 12 Output Current vs. Difference Between Input and Output Voltages Difference Between Input and Output Voltages vs. Ambient Temperature Difference between input and output voltages V DROP (mV) Output current IOUT (mA) 0 50 100 150 200 100 250 VIN = 3V Difference between input and output voltages VDROP (mV) Ambient temperature Ta (°C) -20 0 20 40 60 80 100 400 350 300 250 200 150 100 VIN = 3V IOUT=100mA IOUT=80mA IOUT=50mA Backup Di forward direction voltage V F (V) Backup Di Forward Direction Current vs. Voltage 100 120 140 160 Ambient temperature Ta (°C) Backup Di forward direction voltage VF (V) Backup Di Forward Direction Voltage vs. Ambint Temperature -20 0 20 40 60 80 100 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 IF=100µA IF=10µA IF=1µA Ambient temperature Ta (°C) RES "L" Output Voltage vs . Ambient Temperature RES "L" output voltage VOL (RES) (mV) -20 0 20 40 60 80 100 VIN=3V Isink =1mA Ambient temperature Ta (°C) RES "L" Output Voltage vs. Ambient Temperature RES "L" output voltage VOL (RES) (mV) -20 0 20 40 60 80 100 VIN=2V Isink =1mA f dc

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 10 of 12 CS "L" Output Voltage vs. Ambint Temperature CS "L" output voltage VOL (CS) (mV) Ambint temperature Ta (°C) -20 0 20 40 60 80 100 100 120 140 160 VIN=3V Isink =1mA CS "H" Output Voltage vs. Ambient Temperature CS "H" output voltage VOH (CS) (mV) Ambient temperature Ta (°C) -20 0 20 40 60 80 100 4.0 3.8 3.6 3.4 3.2 3.0 2.8 2.6 2.4 VIN=2V RCS=1MΩ Delay Time vs. External Capacitance Connected to The Ct Pin Delay t ime t pd (ms) External capacitance connected to the Ct pin Ct (µF) VIN=0V 3V 0.1 11 0 1 0 01 100 1000 2 37 5 2 37 5 2 37 5 Ambient temperature Ta (°C) Delay Time vs. Ambient Temperature Delay t ime t pd (ms) VIN=0V 3V Ct=4.7µA -20 0 20 40 60 80 1000

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 11 of 12 Package Dimensions 2.8 ±0.2 1.2 ±0.1 0.27 +0.07 -0.05 2.54 1.2 +0.1 -0.3 0.5 ±0.1 0.85 +0.3 -0.1 8.3 Max3.0 Min

6.41.2 Min

19.0 ±0.2 Previous CodeJEITA Package Code RENESAS Code PRSS0008AA-A 8P5 MASS[Typ.] 0.73gP-SIP8-6.4x19-2.54 INCLUDE TRIM OFFSET. DIMENSION "*3" DOES NOT NOTE) DO NOT INCLUDE MOLD FLASH. SEATING PLANE c D e E bp LA A1 A2 2.792.29 4.5 15° e 2.54 c L 3.0 0.51 1.4 1.5 1.8 A E 6.15 6.3 6.45 D 8.7 8.9 9.1 Reference Symbol Dimension in Millimeters Min Nom Max 0.22 0.27 0.34 MASS[Typ.] 8P4PRDP0008AA-A RENESAS CodeJEITA Package Code Previous Code bp 0.4 0.5 0.6 e1 7.627.32 7.92 b2 0.9 1.0 1.3 A2 3.3

REJ03D0528-0200 Rev.2.00 Jun 15, 2007 Page 12 of 12 A L e D E bp c θ x y HE Z 4.854.65 0.90 0.12 0° 8° 6.2 0.15 0.20 0.25 1.12 1.42 0.46 0.00 0.1 0.20 4.4 1.85 4.64.2 0.25 0.45 0.65 2.03 Reference Symbol Dimension in Millimeters Min Nom Max 5.05 0.34 0.4 6.55.7 1.27 0.10 0.75 F*1 p Mx y Index mark EA Z b E H D p Terminal cross section ( Ni/Pd/Au plating ) c b Detail F A θ NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET. e MASS[Typ.] —PRSP0008DE-C RENESAS CodeJEITA Package Code Previous Code L DO NOT INCLUDE MOLD FLASH. NOTE) DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. bp HE y 0.1 e 1.27 c 0° 10° L 0.2 0.4 0.6 0.05 A 1.9 5.9 6.2 6.5 A2 1.5 E 4.2 4.4 4.6 D 4.8 5.0 5.2 Reference Symbol Dimension in Millimeters Min Nom Max 0.35 0.4 0.5 0.13 0.15 0.2 P-SOP8-4.4x5-1.27 0.07g MASS[Typ.] 8P2S-APRSP0008DA-A RENESAS CodeJEITA Package Code Previous Code 1.12 1.42 Detail F L A1A2 F Index mark y bpe A c E HE D

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Product Information

M62023FP specifications and overview.

Summary

System Reset IC with Switch for 3V Memory Back-up

Description

System Reset IC with Switch for 3V Memory Back-up

Source title M62023FP Datasheet(PDF) - Renesas Technology Corp

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