M61533FP RENESAS | Alldatasheet
Document overview
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Technical content
Features
Electric Volume • 0 to -87dB, -∞ /1dBstep
- 4ch SL/SR/C/SW independent Electric Volume
- Controlled by trim volume data + master volume data. AGC Vc=1.8Vrms<SWch> LPF Can be set externally <SWch> Output Gain Control 0, +6, +9, +12dB 4step <SWch> MUC I/F Controlled by serial data from microcomputer Application Mini Stereo etc. Recommended Operating Condition Supply Voltage Range VCC= 8 to 10V Typ:VCC=9V System Block Diagram SW-LPFAGC SLch volume SRch volume Cch volume SWch volume 0,+6, +9,+12dB SLOUT SROUT COUT SWOUT SLIN SRIN CIN SWIN
Rev.1.0, Sep.19.2003, page 2 of 12 Block Diagram and Pin Configuration (Top view) SLIN N.C. N.C. SRIN SWIN VCC DATA CLOCK N.C. REFOUT REFIN SLOUT SROUT COUT 11GND SWLPF1 AGC CIN SWOUT SWLPF2 0 to -87dB,-∞ AGC MCU I/F SW Output Gain Control 0,+6,+9,+12dB SLch Volume SRch Volume Cch Volume SWch Volume 40k 40k 40k 40k VREF amp LPF amp 0 to -87dB,-∞ 0 to -87dB,-∞ 0 to -87dB,-∞
Rev.1.0, Sep.19.2003, page 3 of 12 Pin Description Pin No. Name Function
1 SLIN SLch volume input pin
2 N.C. N.C. 3 N.C. N.C.
4 SRIN SRch volume input pin
5 CIN Cch volume input pin
6 SWIN SWch volume input pin
7 VCC Power supply (Typ:9V)
8 DATA Input pin of Control data
9 CLOCK Input pin of Control clock
10 GND Ground
11 AGC Attack/Recovery time control pin (by capacitor)
12 SWLPF1 SWch LPF (connected with resistance and capacitor)
13 COUT Cch output pin
14 SROUT SRch output pin
15 SLOUT SLch output pin
16 REFOUT Vref output pin
17 REFIN Vref input pin
18 SWOUT SWch output pin
19 N.C. N.C.
20 SWLPF2 SWch LPF (connected with resistance and capacitor)
Parameter Symbol Ratings Unit Condition Power Supply Vcc 10.5 V Power dissipation Pd 648 mW Ta ≤ 25°C Thermal derating K θ 6.48 mW/ °C Ta > 25 °C Operating temperature Topr −20 to 75 °C Storage temperature Tstg −40 to 125 °C
Rev.1.0, Sep.19.2003, page 4 of 12 THERMAL DERATINGS (MAXIMUM RATING) 1.2 1.0 0.8 0.6 0.4 0.2 -40 0 40 80 120 15 AMBIENT TEMPERATURE Ta ( C) POWER DISSIPATION pd (W) Recommended Conditions (Ta=25°C, Unless otherwise noted) L i m i t s Parameter Symbol Min. Typ. Max. Unit Conditions Power supply Vcc 8 9 10 V Logic “H ” level input voltage VIH 2.2 5.5 V VCC=9V GND reference Logic “L” level input voltage VIL 0 0.6 V VCC=9V GND reference
Rev.1.0, Sep.19.2003, page 5 of 12 Relationship Between Data and Clock D0 D1 D2 D3 D13 D14 D15 CLOCK DATA Data signal is read at the rising edge of CLOCK. Make "H" at the timing which DATA of D0-D15 make latch. When DATA is "H", latch signal is created at the falling edge of CLOCK. Clock and Data Timings tWHC tcr 25% 75% LATCH tWLC tftr tHLD tSHD tHH D tSLD tHLD (D0 D15 ) tSLD CLOCK DATA
Rev.1.0, Sep.19.2003, page 6 of 12 Timing Definition of Digital Block L i m i t s Parameter Symbol Min. Typ. Max. Unit CLOCK cycle time tcr 4 µs CLOCK pulse width(“H” level) tWHC 1.6 CLOCK pulse width (“L” level) tWLC 1.6 Rising time of clock and data tr 0.4 Falling time of clock and data tf 0.4 DATA setup time (Rising time of clock) tSHD 0.8 DATA setup time (Falling time of clock) tSLD 0.8 DATA hold time(“H” level) tHHD 0.8 DATA hold time(“L” level) tHLD 0.8 Data Control Specification Four types of input format can be selected by changing the D14/D15 slot setting status. (Initialize all data of the 4 formats when power supply(VCC) turn on.) (1) (2) D0a D1a D2a D3a D4a D5a D6a D7a D8a D9a D10a D11a D12a D13a D14 D 15 SWch Output gain control (3) D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14 D15 SLch Master volume SLch Trim volume D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14 D15 S R c h M a s t e r v o l u m e 000010 00001 1 Cch Trim volume (4) D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d D10d D11d D12d D13d D14 D15 SWch Master volumeCch Master volume SRch Trim volume 0 0 0 0 0 1 0 0 SWch Trim volume 1 0 0 0 0 1 Note : No guarantee except for these code. 2 2 1 3 3 3 3
Rev.1.0, Sep.19.2003, page 7 of 12 Setting Code SWch Output gain control 0dB D9b +6dB 01 1+9dB D10b 11+12dB It’s initial setting when VCC turn on. SL/SR/C/SWch Master volume ATT Cch SWch D0d D1d D2d D3d D4d D5d D6d D7d D8d D9d 0dB -2dB -6dB -8dB -10dB -12dB -14dB -16dB -18dB -20dB -22dB -24dB -26dB -28dB -30dB -32dB -34dB -36dB -38dB -40dB -42dB -44dB -48dB -52dB -56dB -60dB -64dB -68dB -72dB -76dB -∞ dB -4dB 00000 00001 00010 00011 00100 00101 00110 00111 01000 01001 01010 01011 01100 01101 01110 01111 10000 10001 10010 10011 10100 10101 10110 10111 11000 11001 11010 11011 11100 11101 11110 1111 SLch SRch D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c SL/SR/C/SWch Trim volume ATT Cch SWch D0b D1b D2b D3b D4b D5b D6b D7b 0dB -1dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -2dB 0000 0001 0010 0011 0100 0101 0110 0111 1000 1001 1010 1011 1100 1101 1110 111 SLch SRch D 0 aD 1 aD 2 aD 3 a D 4 aD 5 aD 6 aD 7 a Volume ATT controlled by trim volume data + master volume data. When trim volume data + master volume data is under –87dB setting , volume ATT keep –87dB. Note1: Note2: ex) When trim volume data:-15dB / master volume data -76dB setting , volume ATT keep –87dB. 2 3
Rev.1.0, Sep.19.2003, page 8 of 12
Electrical characteristics
Unless otherwise noted, Ta=25°C, Vcc=9V, f=1kHz, Trim/Master Volume=0dB, Output Gain Control=0dB, SWch LPF fc=300Hz Limits Parameter Symbol Min. Typ. Max. Unit Test conditions Power circuit current IACC 15 30 mA when no signal is provided Input/output Maximum input voltage VIM 2.0 * Vrms (1,4,5,6)PIN input,(13,14,15,18)PIN output, RL=10k Ω , THD=1% Maximum output voltage VOM1 1.4 1.8 Vrms 6PIN input, 18PIN output, RL=10k Ω , THD=5% , f=100Hz VOM2 1.6 2.0 Vrms (1,4,5)PIN input , (13,14,15)output, RL=10k Ω , THD=5% Pass gain GV −2 0 +2 dB (1,4,5,6)PIN input, (13,14,15,18) output, Vi=0.5Vrms, FLAT Output noise voltage Vno1 1.3 4.0 µVrms JIS-A, when no signal is provided, (1,4,5)PIN Rg= 0 Ω , (13,14,15)PIN output SL/SR/Cch volume =0dB 1.3 4.0 µVrms SL/SR/Cch volume =-∞ dB Vno2 8.0 16 µVrms JIS-A, when no signal is provided, 6PIN Rg=0 Ω , 18PIN output, SWch volume =0dB 8.0 16 µVrms SWch volume =- ∞ dB Distortion THD1 0.005 0.1 % (1,4,5)PIN input, (13,14,15)output, BW:40 0 30kHz, Vo=0.5Vrms, RL=10kΩ THD2 0.05 0.2 % 6PIN input,12PIN output, 30kHz L.P.F, f=100Hz, Output Gain Control =0dB, Vi=0.5Vrms(AGC:off), RL=10kΩ THD3 5 % 6PIN input, 12PIN output, 30kHz L.P.F, f=100Hz, Output Gain Control =+12dB, Vi=0.7Vrms(AGC:on), RL=10kΩ Maximum attenuation ATT −92 −87 dB Vo=1Vrms, (12,13,14,15) PIN output, JIS-A, VOL=- ∞ Maximum gain GVM +10 +12 +14 dB 6PIN input, 12PIN output, f=100Hz, Vi=0.1Vrms, FLAT, Output Gain Control =+12dB Cross talk between channels CT −70 −55 dB (1,4,5,6)PIN input, (12,13,14,15)PIN output, Vi=0.5Vrms, JIS-A, RL=47kΩ , Rg=0kΩ AGC Attack time TAGCAT 40 ms 6PIN input, 12PIN output, RL=10k Ω , Output Gain Control =+12dB Recovery time TAGCRE 850 ms 6PIN input, 12PIN output, RL=10k Ω , Output Gain Control =+12dB * Note : The signal can not be inputted to more than 2Vrms. Keep this limit.
Rev.1.0, Sep.19.2003, page 9 of 12 LPF Equivalent circuit of LPF F(s) = Vin Vout R1 C2 Vout Vin = S + + +( 1-K ) S + R1 C1 R1R2C1C2 R1R2C1C2 R2 C1 ω 0 = R1R2C1C2
1 Q = 1
K + ( 1-K ) R2 C2 R1C1 Frequency characteristics (SWch LPF) R1=2.2kΩ , R2=4.7kΩ , C1=0.22µF, C2= 0.1µF, K=1 Q = 0.68, fc 300Hz *This frequency response is a simulation result. .. =..
Rev.1.0, Sep.19.2003, page 10 of 12 AGC -26dB AGC comp SWIN SWch volume SWch Output Gain Control +26dB(total:0dB) to +38dB (total:+12dB) SWOUT AGC Attack / Recovery time is controlled by this capacitor. Attack time / Recovery time EX) C = 1.0 µF Attack time 40 mS Recovery time 850 mS 1.0µ AGC in AGC out Max:2Vrms
- Note : Less than 2Vrms AGC characteristics AGCout (dBV) AGCin (dBV) -20 -10 0 +10 -20 -10 +10 Output Gain : 0dB +5.1dBV (1.8Vrms: TYP) +5.1dBV (1.8Vrms) -20 -10 0 +10 -20 -10 +10 Output Gain : +9dB +5.1dBV (1.8Vrms: TYP) -4dBV (0.63Vrms) -20 -10 0 +10 -20 -10 +10 Output Gain : +6dB +5.1dBV (1.8Vrms: TYP) -0.9dBV (0.90Vrms) -20 -10 0 +10 -20 -10 +10 Output Gain : +12dB +5.1dBV (1.8Vrms: TYP) -6.9dBV (0.45Vrms) +3.1dBV (1.43Vrms) 10dB 10dB AGCout (dBV) AGCin (dBV) AGCout (dBV) AGCin (dBV) AGCout (dBV) AGCin (dBV) +6dBV (2Vrms) +6dBV (2Vrms) + 9.1dBV (2.85Vrms) 10dB +6dBV (2Vrms) +6dBV (2Vrms 10dB
Rev.1.0, Sep.19.2003, page 11 of 12 Application Example * Note : The signal can not be inputted to more than 2Vrms. MCU SRch OUT Cch OUT 100µ 100µ 10µ 10µ 0.22µ 2.2k SLch IN Max:2Vrms SRch IN 10µ Max:2Vrms Cch IN 10µ Max:2Vrms SWch IN 10µ Max:2Vrms VCC:9V 4.7k SRch OUT10µ SLch OUT10µ N.C. N.C. 10µ 0.1µ N.C. 0 to -87dB,-∞ AGC MCU I/F SW Output Gain Control 0,+6,+9,+12dB SLch Volume SRch Volume Cch Volume SWch Volume 40k 40k 40k 40k VREF amp LPF amp 0 to -87dB,-∞ 0 to -87dB,-∞ 0 to -87dB,-∞
Rev.1.0, Sep.19.2003, page 12 of 12 Package Dimensions
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