M61529FP RENESAS | Alldatasheet
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Technical content
Features
- 2ch Master Volume (L,R Independent Control) Main Volume : 0dB to –76dB (2dB or 4dB step), –∞ Trim Volume : 0dB to –15dB (1dB step) *Total level is fixed at –87dB, on condition that the total level of Trim and Master volume is under “–87dB ”.
- Tone Control (Bass/Mid/Treble) ±8dB (2dB step)
- 4 Input Selector with Mute
- Surround Function
- Vocal Cut Function
- Bass Boost Function
- L+R Output for Spectrum Analysis Display
- L+R Output for Subwoofer
- MIC Mixing Function
- 2 REC output with mute
- Input ATT : –5/0/+3.5dB
- Tone Input ATT : 0/ –8.2dB
- External Input ATT : +3/0/–3/–6dB Application Mini/Micro Component, Radio-Cassette Recorder with CD Player, etc. Recommended Operating Conditions Supply voltage range…………………… 8.0 to 10.0V
Rev.1.00, Sep.04.2003, page 2 of 23 System Block Diagram INA1 INB1 INC1 IND1 RECA1/INex1 OUT1 OUT2 Volume Volume INA2 INB2 INC2 IND2 RECA2/INex2 SAOUT DATA CLOCK MCU I/F 4Input selector +Mute 4Input selector +Mute BASS BOOST BASS BOOST Input ATT Input ATT Vocal cut Surround Tone ATT Tone ATT RECB1 RECB2 SWOUT MIC ON/OFF SUR1/DPL1 SUR2/DPL2 Tone control (Bass/Mid/Treble) Tone control (Bass/Mid/Treble) Bypass Bypass Bypass Bypass External Input ATT External Input ATT
Rev.1.00, Sep.04.2003, page 3 of 23 Pin Configuration and Block Diagram 1 42 REF MIC INA1 INB1 INC1 IND1 RECA1/INex1 RECB1 SAOUT TMI1 BB_B2 VCC DATA SUR1/DPL1 SUR2/DPL2 INA2 INB2 INC2 IND2 RECA2/INex2 RECB2 SWOUT TMI2 OUT2 GND CLOCK TMO1 TCB1 TCA1 TMO2 TCB2 TCA2 VOLIN2 TOUT2 BB_A2 OUT1 TOUT VOLIN1 BB_A1 BB_B1 TCC1 TCC2 REF MCU I/F Mid A B A B B A 0/-8.2dB A B B A VOL(0 to -87dB ,-∞ ) -5/0/+3.5dB B A Surround or Dolby Pro Logic Buffer A B -5/0/+3.5dB A B A B B A SW1 SW SW2 SW2 SW3 SW SW 4 SW 4 SW 5 SW5 Bass& Treble Mid Bass& Treble V 1 V 2 S 1 S 2 S 1S 2 V 1 V 2 C C 0/-8.2dB VOL(0 to -87dB,-∞ ) Note : Dolby
Rev.1.00, Sep.04.2003, page 4 of 23 Pin Descliption Pin No. Symbol Function 1 REF Input pin of internal reference (REF=4.5V)
2 MIC Input pin of MIC Mixing
3, 4, 5, 6 INA to IND Input Selector 37, 38, 39, 40 41, 42 SUR/DPL External pins for surround,Switching use with DPL Input pin 7, 8, 35, 36 RECA/INex, RECB Output pins for REC, RECA can switch mute function and external Input pins (At external input, RECA Switch is fixed mute position.) 9, 10, 33, 34 TMI, TMO External pins for Mid (sympathetic vibration type ) 11, 12, 13, TCA, TCB, TCC External pins for Bass/Treble (Shelving type) 30, 31, 32 14, 29 TOUT Output pins of tone control 15, 28 VOLIN Input pins of electronic volume 16, 17, 26, 27 BB_A, BB_B External pins for Bass boost 18, 25 OUT Output pins
19 SAOUT Mix pins for spectrum Analyzer (L+R/2)
24 SWOUT Mix pin for super woofer
20 VCC Internal analog, power pin for digital circuit
23 GND Internal analog, GND pin for digital circuit
21, 22 DATA, CLOCK DATA for serial data, Clock input pin Absolute Maximum Ratings Symbol Parameter Conditions Limits Units VCC Supply voltage 10.5 V Pd Power dissipation Ta ≤ 25°C 850 mW K Thermal derating Ta > 25 °C 8.6 mW/ °C Topr Operating temperature –20 to +75 °C Tstg Storage temperature –40 to +125 °C
Rev.1.00, Sep.04.2003, page 5 of 23 Thermal Derating Power Dissipation Pd [W] Ambient Temperature Ta [˚C] 0 25 50 75 100 125 150 0.5 1.0 0.85W 0.75 0.25 0.42 Recommended Opreting Confition (Ta = 25ºC, unless otherwise noted.) Parameter Symbol Condition Min Typ Max Unit Supply Voltage V CC 8 9 10 V Logic “H ” level Input voltage V IH V CC = 9V 2.2 — 5.5 V Logic “L” level Input voltage V IL V CC = 9V 0 — 0.6 V
Rev.1.00, Sep.04.2003, page 6 of 23 Rerationship Between Data and Clock and Latch DATA CLOCK DATA signal is read at the rising edge of CLOCK Latch signal=“H ” Latch signal is read at the falling edge of CLOCK D0 D1 D2 D3 D4 D5 D6 D7 D15 Data Timing (Recommended conditions) CLOCK DATA 75% 25% tSLD tHLD tSHD tHHD tr tf tWLCtWHC tSLD tHLD (D0 ~ D15) (D15)LATCH pulse tcr Digital Block Timing Regulation Limits Symbol Parameter Min typ Max Unit tcr CLOCK cycle time 4 — — tWHC CLOCK pulse width ("H" level) 1.6 — — tWLC CLOCK pulse width ("L" level) 1.6 — — tr CLOCK rise time — — 0.4 tf CLOCK fall time — — 0.4 µs tSHD DATA setup time ("H" level) CLOCK rise 0.8 — — tSLD DATA setup time ("L" level) CLOCK rise 0.8 — — tHHD DATA hold time ("H" level) 0.8 — — tHLD DATA hold time ("L" level) 0.8 — —
Rev.1.00, Sep.04.2003, page 7 of 23 Digital Control Specification Prohibit using except specified Data code as follows. (At power on, initial position is mark’s setting.) Input direction (1) Input selector (2) Input ATT (3) Tone ATT (5) MIC Mixing (8) Switching of Tone control (9) Tone control (Bass, Mid, Treble) (6) RECA / External Input At external Input setting ,RECA is OFF. (7) Surround / DPLIN (4) Vocal cut & Tone bypass (11) Bass boost D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 Tone Mic ATT MIX Bass Boost 0 Rch Master VolumeLch Master Volume Rch Trime VolumeLch Trim Volume 0000 0000 Input ATT Vocal cut Tone bypass RECA/ External Input Surround/ DPLINInput Selector Bass Tone CcontrolT one control Mid Tone control Treble Tone D Control SW A B C Selector D0A D1A D2A INA 0 0 0 INB 0 0 1 INC 0 1 0 IND 0 1 1 Mute 1 * * Input ATT D3A D4A -5dB 0 0 0dB 0 1 0+3.5dB 1 Tone ATT D5A -8.2dB 0 0dB 1 Switching D6A D7A Vocal cut OFF,Tone Bypass 0 0 Vocal cut OFF,Tone ON 0 1 *Vocal cut ON,Tone Bypass 1 Mic Mixing D8A OFF 0 ON 1 D9A D10A D11A RECA-OFF 0 * 0 RECA-ON 0 * 1 -6dB 1 1 1 External Input ON Switching 0dB -3dB +3dB 1 External Input Off Switching D12A D13A Bypass 0 0 Surround 0 1 0DPLIN 1 Switching D0B D1B Lch and Rch 0 0 Lch only 0 1 0Rch only 1 Tone D2,6,10B D3 ,7,11B D4,D8,12BD5,D9,13B +8dB 1 1 0 0 +6dB 1 0 1 1 +4dB 1 0 1 0 +2dB 1 0 0 1 0dB 0 0 0 0 -2dB 0 0 0 1 -4dB 0 0 1 0 -6dB 0 0 1 1 -8dB 0 1 0 0 Bass Boost D8C OFF 0 ON 1
Rev.1.00, Sep.04.2003, page 8 of 23 (10) Trim volume (Lch and Rch) Trim D0, 4C D1, 5C D2, 6C D3, 7C
- 0dB 0 0 0 0 –1dB 0 0 0 1 –2dB 0 0 1 0 –3dB 0 0 1 1 –4dB 0 1 0 0 –5dB 0 1 0 1 –6dB 0 1 1 0 –7dB 0 1 1 1 –8dB 1 0 0 0 –9dB 1 0 0 1 –10dB 1 0 1 0 –11dB 1 0 1 1 –12dB 1 1 0 0 –13dB 1 1 0 1 –14dB 1 1 1 0 –15dB 1 1 1 1 Note : Total level is fixed at –87dB, on condition that the total level of Trim and Master volume is under “–87dB ”. (example: Trim –15dB, Master –76dB Total level is –87dB)
Rev.1.00, Sep.04.2003, page 9 of 23 (12) Master volume (L, Rch) Master D0, 5D D1, 6D D2, 7D D3, 8D D4, 9D 0dB 0 0 0 0 0 –2dB 0 0 0 0 1 –4dB 0 0 0 1 0 –6dB 0 0 0 1 1 –8dB 0 0 1 0 0 –10dB 0 0 1 0 1 –12dB 0 0 1 1 0 –14dB 0 0 1 1 1 –16dB 0 1 0 0 0 –18dB 0 1 0 0 1 –20dB 0 1 0 1 0 –22dB 0 1 0 1 1 –24dB 0 1 1 0 0 –26dB 0 1 1 0 1 –28dB 0 1 1 1 0 –30dB 0 1 1 1 1 –32dB 1 0 0 0 0 –34dB 1 0 0 0 1 –36dB 1 0 0 1 0 –38dB 1 0 0 1 1 –40dB 1 0 1 0 0 –42dB 1 0 1 0 1 –44dB 1 0 1 1 0 –48dB 1 0 1 1 1 –52dB 1 1 0 0 0 –56dB 1 1 0 0 1 –60dB 1 1 0 1 0 –64dB 1 1 0 1 1 –68dB 1 1 1 0 0 –72dB 1 1 1 0 1 –76dB 1 1 1 1 0
- –∞ dB 1 1 1 1 1
Rev.1.00, Sep.04.2003, page 10 of 23
Electrical Characteristics
Unless otherwise noticed, Ta = 25°C, VCC = 9V, f = 1kHz, Surround bypass,tone bypass and bass boost = OFF Limits Parameter Symbol Test Condition Min Typ Max Unit Voltage Analog positive power circuit current Alcc At V CC =9.0V, 20 pin terminal current and no signal — 25 40 mA Input resistance Rin Input pin 3-6pin,37-40pin,2pin 30 60 90 k Ω Maximum input voltage VIM (3,40)pin IN, (8,35)pin OUT RL=10kΩ , THD=1%, Input ATT=–5dB 1.8 2.2 — Vrms VOM (3,40)pin IN, (18,25)pin OUT Bass boost ON, f=100Hz, RL=10kΩ , THD=5% 1.8 2.2 — Vrms Maximum output voltage VrecOM (3,40)pin IN, (7,8)(35,36)pin OUT RL=47kΩ , THD=1%, Input ATT=+3.5dB 1.6 2.0 — Vrms Vodc At No signal, (18,25)pin OUT 4.0 4.5 5.0 V Output terminal voltage Vrecdc 4.0 4.5 5.0 V Pass gain Gv Vi=1Vrms,FLAT, Gain from (3-18 pin) to (40-25 pin), Input ATT=0dB –2.0 0.0 2.0 dB Maximum attenuation ATT Vo=1Vrms,(18,25)pin OUT JIS-A,Vol.=–∞ — –92 –87 dB Vol.=0dB — 10.0 20.0 µVrms Output noise voltage Vono JIS-A, At no signal,Rg=0W (8.35)pin OUT Vol.=–∞ — 4.0 8.0 µVrms Vrecno JIS-A, At no signal, Rg=0Ω (18.25)pin OUT — 6.0 12.0 µVrms THD BW:400-30kHz, Vo=0.5Vrms, RL=10k Ω — 0.02 0.05 % Distortion factor THDrec BW:400-30kHz, Vo=0.5Vrms, RL=47kΩ — 0.01 0.05 % CT Vo.=0.5Vrms,RL=10k Ω , JIS-A, Rg=0kΩ — –70 55 dB Input and Output Cross talk between channels CT rec Vo.=0.5Vrms, RL=47kΩ , JIS-A, Rg=0kΩ — –70 55 dB Gbassb –8dB 6 8 10 dB Bass voltage gain Gbassc f=100Hz +8dB –10 –8 –6 dB Gmidb –8dB 6 8 10 dB Mid voltage gain Gmidc f=1kHz –8dB –10 –8 –6 dB Gtrebb +8dB 6 8 10 dB Trebble voltage gain Gtrebc f=10kHz –8dB –10 –8 –6 dB Tone Control Balance between channel BALton At each boost value of -8dB and +8dB, Vo=1Vrms, (14,29)pin OUT –2 0 2 dB Super woofa output gain GvSW Vi=1Vrms, FLAT, Gain from (3-18 pin) to (40-25 pin), Input ATT=0dB –8.0 –6.0 –4.0 dB distortion factor THDSW BW:400-30kHz, Vo=0.3Vrms, RL=47kΩ 15pin IN, 24pin OUT — 0.03 0.1 % Output noise voltage VnoSW JIS-A, At no signal ,Rg=0Ω , 24pin OUT — 20 — µVrms MIX Signal Output gain for spectrum Analyzer Display GvSP Vi=1Vrms, FLAT, Input ATT=0dB, 3pin IN, 19pin OUT –8.0 –6.0 –4.0 dB
- Mix Signal Characteristics is provided only CH1 Input. (CH2 Rg=0Ω )
Rev.1.00, Sep.04.2003, page 11 of 23 Block Diagram (1) Vocal cut OFF (Bold line; Selector INA, Surround ON, Tone ON, Bassboost OFF) SWA a; Vocal Cut OFF b; Vocal Cut ON SWB a; Surround b; DPL SWC External Input ATT(+3/0/ –3/–6dB/OFF) SWD a; Surround b; DPL c; BYPASS SWE a; Tone control b; Vocal Cut SWF a; Tone control b; Tone bypass, Vocal Cut SWG a; Bassboost OFF b; Bassboost ON TMI2 From TBYP From Tone2 To VOUT2 From TBYP From Tone1 TMO2 TCA2 TCC2 TOUT2 VOLIN2 BB_A2 BB_B2 OUT2 TMI1 TMO1 TCA1 TCB1 TCC1 TOUT1 VOLIN1 BB_A1 BB_B1 OUT1 SWOUT SWF2 a b SWG2 a b SWG1 a b Mid TCB2 Mid To VOUT1 a b SWF1 Bass Treble INA2 INB2 INC2 IND2 INA1 INB1 INC1 IND1 MIC RECA1/INex1 RECB1 RECA2/INex2 RECB2 From VOUT2 From VOUT1 SUR2/DPL2 SUR1/DPL1 From VIN2 To VIN2 To VIN1 From VIN1 To TBYP1 To Tone1 To TBYP2 To Tone2 0/+3.5dB 0/ - 5dB 0/+3.5dB 0/ - 5dB SWA1 a b SW A a b SWB2 a b SWB1a b SWD2 a b SWD1 a b SWE2 a b SWE1 a b 0 / - 8.2dB 0 / - 8.2dB Gain up(+13dB) RECS W RECSW1 c c SWC1 SWC2 +3/0/ - 3/ - 6dB +3/0/ - 3/ - 6dB SAOUT -13dB -13dB
Rev.1.00, Sep.04.2003, page 12 of 23 (2) Vocal cut ON (Bold line; Selector INA, Surround ON, Tone OFF, Bassboost OFF) SWA a; Vocal Cut OFF b; Vocal Cut ON SWB a; Surround b; DPL SWC External Input ATT(+3/0/ –3/–6dB/OFF) SWD a; Surround b; DPL c; BYPASS SWE a; Tone control b; Vocal Cut SWF a; Tone control b; Tone bypass, Vocal Cut SWG a; Bassboost OFF b; Bassboost ON TMI2 From TBYP2 From Tone2 To VOUT2 From TBYP1 From Tone1 TMO2 TCA2 TCC2 TOUT2 VOLIN2 BB_A2 BB_B2 OUT2 TMI1 TMO1 TCA1 TCB1 TCC1 TOUT1 VOLIN1 BB_A1 BB_B1 OUT1 SWOUT SWF2 a b SWG2 a b SWG1 a b Mid TCB2 Mid To VOUT1 a b SWF1 Bass Treble INA2 INB2 INC2 IND2 INA1 INB1 INC1 IND1 MIC RECA1/INex1 RECB1 RECA2/INex2 RECB2 From VOUT2 From VOUT1 SUR2/DPL2 SUR1/DPL1 From VIN2 To VIN2 To VIN1 From VIN To TBYP1 To Tone1 To TBYP2 To Tone2 0/+3.5dB 0/ - 5dB 0/+3.5dB 0/ - 5dB SWA1 a b SWA2 a b SWB2 a b SWB1a b SWD2 a b SWD1 a b SWE2 a b SWE1 a b 0/ - 8.2dB 0/ - 8.2dB Gain up(+13dB) RECSW2 RECSW1 c c SWC1 SWC2 +3/0/ - 3/ - 6dB +3/0/ - 3/ - 6dB SAOUT - 13dB - 13dB
Rev.1.00, Sep.04.2003, page 13 of 23 Signal Level Diagram chA to D, MUTE Input ATT Vocal Cut Surround [ON/OFF] [ON/OFF] ToneATT ToneControl Volume - 8dB to+8dB 0dB/- 8.2dB +3.5/0/ - 5dB 0 to -87dB, - ∞ BassBoost [ON/OFF] IN OUT Selector Input ATT Vocal cut, Surround Tone ATT Tone control (Bass, Mid, Treble) Volume Bassboost Max;+6.8dBV 0dBV - 10dBV - 20dBV +10dBV Min;- 103dBV 95dB Signal Level - 0.2dBV +15dB Max;+6.8dBV 0dBV - 10dBV - 20dBV +10dBV Min;- 103dBV 95dB Signal Level - 13dBV +15dB Vocal cut ON, Tone bypass, B assboost ON ( - 13dB) (+13dB) - 16.2dBV Tone control is fixed on the bypass to use it for the vocal cut.- 8.2dB Vocal cut OFF,Bassboost ON - 8.2dB Max;+5.1dBV Max;+5.1dBV
Rev.1.00, Sep.04.2003, page 14 of 23 Function Discription (1) Equivalent circuit of tone control (a) Mid (Hz) R1(R2+R3)C1C22π 1fo = C1C2R2 C1+C2 1Q= (dB) R2+R3 Gv = 20log (dB) R2+R3 Gv = 20log (Hz) R1(R2+R3)C1C22π 1fo= C1C2R2 C1+C2 1Q= R3=0 (C1=C2) IN OUT R3 R2 C1 C2 Boost Mode IN OUT R3R2 C2 C1 Cut Mode (R3=0) (C1=C2) Setting R 2 R 3 ±8dB 17.00k Ω 6.80kΩ ±6dB 14.10k Ω 9.70kΩ ±4dB 10.40kΩ 13.40kΩ ±2dB 5.80k Ω 18.00kΩ (b) Bass IN OUT R1 R 2 C Cc R IN OUT R1R2 Cut Mode C Cc R (Hz)2π CR(R1+R2) R+R1fo = (dB) R+R1 R+R1+R2Gv = 20log (dB) R+R1+R2 R+R1Gv=20log (Hz) 2πCR(R1+R2) R+R1fo= Boost Mode Setting R1 R2 ±8dB 0.60kΩ 19.40kΩ ±6dB 4.20kΩ 15.80kΩ ±4dB 8.30kΩ 11.70kΩ ±2dB 13.49kΩ 6.51kΩ
Rev.1.00, Sep.04.2003, page 15 of 23 (c) Treble IN OUT R1 R 2 C IN OUT R1R2 C (Hz) 2π CR1 1fo= (dB)R1 R1+R2Gv = 20log (Hz)2πCR1 1fo = (dB) R1+R2 R1Gv = 20log Boost Mode Cut Mode Setting R1 R2 ±8dB 5.12kΩ 9.91kΩ ±6dB 6.92kΩ 8.11kΩ ±4dB 9.12kΩ 5.91kΩ ±2dB 11.73kΩ 3.30kΩ (d) Characteristic Curve of Tone Control R1=680 Ω ,R2=214kΩ , C1=C2=0.22µF(fo = 60Hz,Q = 8.9) This characteristic curve is a result of circuit simulation.
Rev.1.00, Sep.04.2003, page 16 of 23 (2) Equivalent circuit of bass boost 0dB Q=4(G=10dB) K VIN VOUTC1 C2 K=1 Reference Table QG 0 0 to 1dB 6dB 10dB 13dB 20dB (Hz) R1R2C1C22π 1fo = R1(C1+C2)+(1-K)R2C2 R1R2C1C2Q = The Internal IC have built-in R2 resistance. (R2 = 214kΩ ) Input Decrease Circuit of Switching noise Output Amplitude characteristic of secondary high pass filter
- Characteristic Curve of bass boost A; CH1 bass = +8dB,Treble = +8dB CH2 bass = +4dB,Treble = +4dB This characteristic curve is as a result of circuit simulation. B; CH1bass = +8dB,Treble = +8dB CH2bass = +4dB,Treble = +6dB A B
Rev.1.00, Sep.04.2003, page 17 of 23 (3) Equivalent circuit of vocal cut CH1 CH2 ATT Input ATT Gain Setting Vocal Cut Output Selector Selector Input Tone control Tone control
- Tone control cannot use at Vocal cut mode.
- Tone control can use only Bass & Treble mode. (Mid mode is 0dB fixed.) Output difference of Tone control CH1 and CH2, The characteristic to cut only Middle part of Phase Input Signal is realized.
- Characteristic curve example (Phase signal input CH1,CH2) A; CH1 bass = +8dB,Treble = +8dB CH2 bass = +4dB,Treble = +4dB B; CH1bass = +8dB,Treble = +8dB CH2bass = +4dB,Treble = +6dB A B
Rev.1.00, Sep.04.2003, page 18 of 23 (4) Surround equivalent circuit CH1 IN 10kΩ CH2 IN CH1 OUT CH2 OUT 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 10kΩ 0.047µF External part
- Characteristic curve example (Only CH1 Input)
- This characteristic curve is the result as circuit simulation. CH1OUT CH2OUT CH2OUT CH1OUT Amplitude characteristic Phase characteristic
Rev.1.00, Sep.04.2003, page 19 of 23 (5) Total equivalent circuit (signal flow diagram) (a) Surround bypass, Tone bypass, Bass boost ON Surround INA to IND Mic Mix ( MIX level 0dB) Volume Selector (4+MUTE) Tone control Input ATT +3.5/0/-5dB Input ATT 0/-8.2dB O utput for Spectrum Analyzer(L+R/2) Super woofer output (L+R/2) Bass boost OUT RECA RECB Maximum Output Voltage (Typ:2.0Vrms) Maximum output voltage ( Typ:2.2Vrms ) Maximum Input Voltage ( Typ:2.2Vrms ) Surround bypass Tone Bypass (b) Surround ON, Tone ON, Bass boost ON Surround INA to IND Mic MIX(MIX level 0dB) Volume Selector(4+MUTE) Tone control Input ATT +3.5/0/-5dB Tone ATT 0/-8.2dB Output for Spectrum Analyzer(L+R/2) Output for Super woofer (L+R/2) Bass boost OUT RECA RECB Maximum Output Voltage(Typ:2.0Vrms) Maximum output voltage (Typ:2.2Vrms) Maximum Input Voltage ( Typ:2.2Vrms ) Surround ON Tone ON (c) DPL Input setting, Tone bypass, Bass boost ON INA to IND Mic MIX (MIX Level 0dB) Volume Selector(4+Mute) Tone Control Input ATT +3.5/0/ -5dB Tone ATT 0/-8.2dB Output for Spectrum Analyzer(L+R/2) Super woofer Output(L+R/2) Bass boost OUT RECA DPLOUT Maximum out put voltage(Typ:2.0Vrms) Maximum Output Voltage(Typ:2.2Vrms) Maximum Input Voltage(Typ:2.2Vrms) DPLSetting Tone bypass Mute DPLIN
Rev.1.00, Sep.04.2003, page 20 of 23 (d) External Input Setting, Surround ON, Tone ON, Bass boost ON Surround INA to IND MIC MIX (Mix Level 0dB) Volume Selector (4+MUTE) Tone Control Input ATT +3.5/0/-5dB Tone ATT 0/-8.2dB Output for Supectrum Analyzer (L+R/2) Super woofer Output (L+R/2) Bass boost OUT INex RECB Maximum Output Voltage (Typ:2.0Vrms) Maximum Output Voltage (Typ:2.2Vrms) Maximum Input Voltage(Typ:2.2Vrms) Surround ON Tone ON External Input ATT +3/0/-3/-6dB (e) Vocal Cut ON, Surround Bypass, Bass boost ON Surround INA to IND MIC MIX (MIX Level 0dB) Vol me Select or (4+MUTE) Tone control Input ATT +3.5/0/-5dB Tone ATT 0/-8.2dB Output for Spectrum Analyzer (L+R/2) Super woofer Output(L+R/2) Bass boost OUT RECA RECB Maximum Output Voltage (Typ:2.0Vrms) Maximum Output Voltage (Typ:2.2Vrms) Maximum Input Voltage (Typ:2.2Vrms) Surround Bypass Vocal Cut ON
Rev.1.00, Sep.04.2003, page 21 of 23 System Reset (a) IC’s condition of power supply turn on This IC is the system composition which compulsory resetting when power supply turn on. Time constant of power supply is used, and reset pulse is formed. When VCC exceed 5.5V, reset pulse is transmitted. (Logic circuit ON) [1] The operation time of reset is released reset pulse [2] from transmitted reset pulse [1]. Trst = [Timing A + about 20us] is time of released reset pulse. (Timing A is time of VCC exceed 5.5V.) t V VCC VDD(Internal power supply) VSS(Internal power supply) <Timing of reset> Transmitted reset pulse Released reset pulse Operation time of reset 5.5V About 20µs A 1 2 Released reset pulse Trst (Normal operation) t V <REF Voltage> VCC Voltage of 1pin =REF Voltage about200ms(C=100µF) 1.5 V Operation of Analog circuit 1/2 VCC B Trst The power supply is turned on, and resetting is released after Trst, and the reception of the serial data becomes possible in Logic block. However, REF voltage doesn't operate in less than 1.5V in the analog block. Make REF voltage is to transmit serial data by more than 1.5V. REF Voltage ≥ Time of REF=1.5V =Timing B (Timing B is time when analog block operates and to become possible.) <EX> Capacitor of 1pin =100µF Becomes REF ≥ 1.5V in about 200ms. (b) IC’s condition of power supply turn off Internal power supply (V DD , VSS ) decreases to VCC together, too. All the data set up when Logic turned it off become invalid.
Rev.1.00, Sep.04.2003, page 22 of 23 Application Example 10µ 10µ 10µ10µ 10µ 10µ CLOCKDATA RECB2 INA2 IND2 INB2 INC2 INA1 IND1 INB1 INC1 OUT1 RECA2/INex2 MIC RECB1 RECA1/INex1 SAOUT OUT2 DPL1 DPL2 At Surround ON or SWOUT SW1; A:Vocal Cut OFF B:Vocal Cut ON SW2; A:Surround B:Corresponded to Dolby Pro Logic C:Bypass SW3; A:Vocal Cut OFF B:Vocal Cut ON SW4; A: Corresponded to Tone control B:Corresponded to Vocal Cut and Tone bypass VCC=9V 0.22µ 0.22µ 680680 0.22µ 0.22µ 10µ 10µ 10µ10µ 10µ 10µ 10µ 10µ 100µ 10µ 10µ 10µ 10µ 0.022µ 0.022µ 0.022µ 0.022µ 2.2k 2.2k 10k 0.047µ SW5 A:Bass boost OFF B:Bass boost ON REF MCU I/F A B A BB A 0/-8.2dB A B B A VOL(0 to -87dB,-∝ ) -5/0/+3.5dB B A A B -5/0/+3.5dB A B A B B A SW1 SW1 SW2 SW2 SW3SW3 SW4 SW4 SW5 SW5 Bass& Treble Mid Bass& Treble V 1 V 2 S 1 S 2 S 1 S 2 V 1 V 2 C C 0/-8.2dB 10k 10k 10k 0.047µ 10µ 4700p 10k 0.047µ 10µ 4700p VOL(0 to -87dB,-∝ ) Mid 10µ 10µ 10µ Surround or Dolby Pro Logic Buffer At Input Dolby Pro Logic
Rev.1.00, Sep.04.2003, page 23 of 23 Detailed Diagram Of Package Outline
© 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0 Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Tech nology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. An y diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 RENESAS SALES OFFICES