M61528FP

M61528FP RENESAS | Alldatasheet

Document overview

• Manufacturer or author: pROVIDED bY alldatasheet.com(free datasheet download site)
• PDF pages: 31

Technical content

Features

• Fixed equalizer(3 bands equalizer with SCF)  4 independent fixed equalizer controls.  Reduce the external C,R parts by using SCF (Switched Capacitor Filter) technology.
• FADER  4 independent fader controls.  0dB to –50dB/2dBstep, -∞dB  Built-in Soft-changing circuit for switching-noise. Application
• Car Audio Recommended Operating Condition
• Supply voltage range 7.0V to 9.0V
• Rated supply voltage 8.0V System Configurations Power supply Microcomputer interface VCC VREF GND CLOCK DATA FADER FADER FADER FADER OSC FL IN FRIN RLIN RRIN OSCR FL-ch FR-ch RL-ch RR-ch Fixed E qualizer SACTIVE

Rev.1.1, Dec.17.2003, page 2 of 30 Function

• Fixed equalizer Frequency range Center frequency f0[Hz] Control range Quality factor Q Note. FRONT : 1.5 to 3.0 / 0.5 step Low 120, 150, 200, 300 0dB to –8dB / 0.5dB step REAR : 2.0 to 4.0 / 0.5 step High 8K, 10K, 18K +8dB to –8dB / 0.5dB step 0.4 to 1.0 / 0.2 step 4 independent each equalizer controls.
• FADER  0dB to –50dB / 2dB , -∞dB ( 4 independent fader controls )  The Soft-changing can work in gain step by 2dB.  Refer to 15 page for Soft-changing. Pin configuration(top view) FLIN FRIN RLIN RRIN TEST DGND VREFIN VCC NC NC SACTIVE OSCR FROUT RLOUT RROUT NC DGND DATA CLOCK OSCIN OSCOUT Outline 24pin SSOP GND GND FLOUT

Rev.1.1, Dec.17.2003, page 3 of 30 Pin Description Pin No. Name Function

3 FLIN Input pin of FRONT L channel

4 FRIN Input pin of FRONT R channel

5 RLIN Input pin of REAR L channel

6 RRIN Input pin of REAR R channel

23 FLOUT Output pin of FRONT L channel

22 FROUT Output pin of FRONT R channel

21 RLOUT Output pin of REAR L channel

20 RROUT Output pin of REAR R channel

2,19 GND Analog ground pin 7,18 DGND Digital ground pin

24 VCC Power supply pin

1 VREFIN Signal ground of IC

8 TEST TEST pin

15 SACTIVE Output pin of soft-changing ACTIVE signal

14 OSCIN Buffer input pin for the ceramics oscillation

13 OSCOUT Buffer output pin for the ceramics oscillation

12 OSCR Input pin for the inside oscillation

17 DATA Input pin of Serial DATA

16 CLOCK Input pin of CLOCK

9 to 11 N.C Non – connection pin Absolute Maximum Ratings Symbol Parameter Condition Ratings Unit VCC Power supply 10.5 V Pd Power dissipation Ta ≤ 25 °C 1.0 W K Thermal derating Ta > 25 °C (Circuit board installation) 10 mW/°C Topr Operating temperature -30 to +85 °C Tstg Storage temperature -55 to +125 °C Recommended Operating Conditions Ratings Symbol Parameter MIN TYP MAX Unit VCC Power supply 7.0 8.0 9.0 VIH Logic “H” level input voltage(16,17pin) 2.7 — 5.0 V VIL Logic “L” level input voltage(16,17pin) GND — 0.7

Rev.1.1, Dec.17.2003, page 4 of 30 Thermal derating 1.2 1.0 0.8 0.6 0.4 0.2 -40 0 40 80 120 150 AMBIENT TEMPERATURE Ta(˚C) POWER DISSIPATION pd (W)

Rev.1.1, Dec.17.2003, page 5 of 30

Electrical Characteristics

Unless otherwise noted, VCC=8V, Ta=25 °C,Vi=1Vrms, f=1KHz, Fixed EQ(Low/Mid/High)=0dB, FADER=0dB, RL=10K Ω, Limits Symbol Parameter Condition min typ max Unit Characteristics Icc Circuit current No signal — 40 55 mA Gv Pass gain 20Hz to 20KHz -2.0 0 -2.0 dB Sc Channel separation Input side: Vi=1Vrms , f=1KHz, Measurement side: Input pin to GND with the capacitance DIN-AUDIO 70 85 — dB Vo max Maximum output voltage 400Hz to 30KHz BPF THD=1% 1.8 2.2 — Vrms THD Total harmonic distortion 400Hz to 30KHz BPF — 0.01 0.03 % Vno Output noise voltage Input pin to GND with the capacitance, DIN-AUDIO — 10 18 µVrms Input pin to GND with the capacitance, DIN-AUDIO,FADER=-∞dB — 3.5 10 Zin Input resistance 3 , 4 , 5 , 6 pin 10 20 30 K Ω Fixed EQ(Low) Gv(Cut) Control range(Cut) Gv=-8dB,f0=300Hz,Q=2.0 Vi=1Vrms,f=300Hz -9.5 -8.0 -6.5 dB f0 Center frequency Gv=-8dB,f0=120Hz,Q=2.0 102 120 138 Hz Gv=-8dB,f0=150Hz,Q=2.0 127.5 150 172.5 Gv=-8dB,f0=200Hz,Q=2.0 170 200 230 Gv=-8dB,f0=300Hz,Q=2.0 255 300 345 Q Quality factor 1.5 Gv=-8dB,f0=300Hz,Q=1.5 (FRONT only) 1.275 1.5 1.725 Gv=-8dB,f0=300Hz,Q=3.5 (REAR only) 2.975 3.5 4.025 Gv=-8dB,f0=300Hz,Q=4.0 (REAR only) 3.4 4.0 4.6

Rev.1.1, Dec.17.2003, page 6 of 30 Unless otherwise noted , VCC=8V,Ta=25 °C,Vi=1Vrms, f=1KHz, Fixed EQ(Low/Mid/High)=0dB, FADER=0dB, RL=10K Ω, At the time of use of a ceramics oscillator. Limits Symbol Parameter Condition min typ max Unit Fixed EQ(Mid) Gv(Boost) Control range(Boost) Vi=0.1Vrms,f=3KHz Gv=+4dB,f0=3KHz,Q=1.0 +2.8 +4.0 +5.2 dB Gv(Cut) Control range(Cut) Gv=-8dB,f0=3KHz,Q=1.0 Vi=1Vrms,f=3KHz -9.5 -8.0 -6.5 dB f0 Center frequency Gv=-8dB,f0=800Hz,Q=1.0 0.68 0.8 0.92 KHz Fixed EQ(High) Gv(Boost) Control range(Boost) Gv=+8dB,f0=8KHz,Q=1.0 Vi=0.1Vrms,f=8KHz +6.5 +8.0 +9.5 dB Gv(Cut) Control range(Cut) Gv=-8dB,f0=8KHz,Q=1.0 Vi=1Vrms,f=8KHz -9.5 -8.0 -6.5 dB f0 Center frequency Gv=-8dB,f0=8KHz,Q=1.0 6.8 8 9.2 KHz Gv=-8dB,f0=10KHz,Q=1.0 8.5 10 11.5 Gv=-8dB,f0=18KHz,Q=1.0 15.3 18 20.7 Q Quality factor Gv=-8dB,f0=8KHz,Q=0.4 0.34 0.4 0.46 Gv=-8dB,f0=8KHz,Q=0.6 0.51 0.6 0.69 Gv=-8dB,f0=8KHz,Q=0.8 0.68 0.8 0.92 Gv=-8dB,f0=8KHz,Q=1.0 0.85 1.0 1.15 FADER ATT max Maximum attenuation FADER=- ∞dB , DIN-AUDIO 80 90 — dB ∆ATT Attenuation error ATT=0dB -2.0 0 +2.0 dB

Rev.1.1, Dec.17.2003, page 7 of 30 Fixed Equalizer Frequency Characteristic (1) Frequency characteristics of Low (This characteristics is a simulation result.)

• Gain control : 0dB to –8dB / 0.5dB (f0=120Hz, Q=2.0 setting) (FRONT and REAR are the same characteristics.)
• Center frequency : 120Hz / 150Hz / 200Hz / 300Hz (Gv=-8dB, Q=2.0 setting) (FRONT and REAR are the same characteristics.)
• Quality factor FRONT characteristics : 1.5 / 2.0 / 2.5 / 3.0 (Gv=-8dB, f0=120Hz setting)

Rev.1.1, Dec.17.2003, page 8 of 30 (2) Frequency characteristics of Mid (This characteristics is a simulation result.)

• Gain control : +4dB to –8dB / 0.5dB (f0=1.2KHz, Q=1.0 setting)

Rev.1.1, Dec.17.2003, page 9 of 30 (3) Frequency characteristics of High (This characteristics is a simulation result.)

• Gain control : +8dB to –8dB / 0.5dB (f0=10KHz, Q=1.0 setting)
• Center frequency : 8KHz / 10KHz / 18KHz (Gv=+8dB, Q=1.0 setting)

Rev.1.1, Dec.17.2003, page 10 of 30

• Quality factor : 0.4 / 0.6 / 0.8 / 1.0 (Gv=+8dB, f0=10KHz setting) Power on Reset This IC builds in the power on reset function. The voltage of VCC (24 pin) less than 5.0V, the serial DATA can not accept. 5.0V VCC (24pin) (V) (S) Reset time Release of reset. After reset is canceled, the serial DATA can accept. Relationship Between Data and Clock The DAT A signals are read at rising edges of the CLOCK. The LATCH signal “H” D0 D1 D2 D3 D13 D14 D15 The LATCH condition “L” “H” “L” “H” How to transmit DATA. This IC reads DATA signal at the rising edge of the CLOCK. When DATA are transmitted, setting up the DATA line is always “L” when the falling edge of the CLOCK.

Rev.1.1, Dec.17.2003, page 11 of 30 Clock and Data Timings 25% 75% t r t WHC t f t WLC t cr t SD t HD CLOCK DATA Timing Definition of Digital Block Limits Symbol Parameter MIN TYP MAX Unit t cr CLOCK cycle time 4.0 — — µS t WHC CLOCK pulse width (“H” level) 1.6 — — t WLC CLOCK pulse width (“L” level) 1.6 — — t r Rising time of CLOCK — — 0.4 t f Falling time of CLOCK — — 0.4 t SD DATA setup time 0.8 — — t HD DATA hold time 0.8 — —

Rev.1.1, Dec.17.2003, page 12 of 30 Data Control Specification DATA transmitting SLOT1 SLOT2 SLOT3 FRONT Lch SLOT4 SLOT5 SLOT6 FRONT Rch SLOT7 SLOT8 SLOT9 REAR Lch SLOT10 SLOT11 SLOT12 REAR Rch SLOT13 Chip address

• D15=“1”→Serial DATA is received.
• D15=“0”→Serial DATA is not received. SLOT14 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 FRONT Lch Mid (f0) FRONT Lch Low (f0) FRONT Lch Low (Gv) FRONT Lch Low (Q) 0100 FRONT Lch Mid (Q) FRONT Lch Mid (Gv) FRONT Lch High (f0) FRONT Lch High (Q) FRONT Lch High (Gv) FRONT Rch Mid (f0) FRONT Rch Low (f0) FRONT Rch Low (Gv) FRONT Rch Low (Q) FRONT Rch Mid (Q) FRONT Rch Mid (Gv) FRONT Rch High (f0) FRONT Rch High (Q) FRONT Rch High (Gv) REAR Lch Mid (f0) REAR Lch Low (f0) REAR Lch Low (Gv) REAR Lch Low (Q) REAR Lch Mid (Q) REAR Lch Mid (Gv) REAR Lch High (f0) REAR Lch High (Q) REAR Lch High (Gv) REAR Rch Mid (f0) REAR Rch Low (f0) REAR Rch Low (Gv) REAR Rch Low (Q) REAR Rch Mid (Q) REAR Rch Mid (Gv) REAR Rch High (f0) REAR Rch High (Q) REAR Rch High (Gv) FRONT Lch FRONT Rch 1000 0000 1100 0010 1010 0110 1110 0001 1001 0101 1101 0011 1011REAR Lch REAR Rch 0111Soft-changing time CLOCK select Soft-changing ON/OFF 0000 Data select(D11 to D14) Communication error countermeasure function Soft-changing form SLOT15

Rev.1.1, Dec.17.2003, page 13 of 30 Data Transmission of Fixed Equalizer Setting

• Faulty operation in the communication error occurrence. Fixed equalizer setting premise no-change setting after setting is done once. By this premise, A noise countermeasure circuit of the setting change isn’t built in. Therefore, It has the possibility that noise is made by communication error. These countermeasures are taken by this IC as it is shown in next page.  Fixed equalizer setting change in the communication error occurrence.(example) LATCH condition D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 [ Transmitting data of normal.] DATA CLOCK LATCH condition D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 [ Transm itting data of communica tion error. ] DATA CLOCK D4 is lack. Communication error occurrence. SLOT 1, f0 setting:300Hz , Q setting:3.0,Gv setting:-8.0dB SLOT 1, f0 setting: 300Hz , Q setting:3.0, Gv setting:0dB * In the case of the upper figure, Fixed equalizer gain setting of FRONT Lch low range occur faulty operation, and it has the possibility that noise is made. Gv= -8.0dB ⇒ Gv= 0dB

Rev.1.1, Dec.17.2003, page 14 of 30

• A communication error countermeasure function from the microcomputer. This IC has the function which changes a set up of an inside when the same data were continued twice and it was received to reduce the occurrence probability of the above communication error. This function is possible to effective or ineffective change by serial data. SLOT 1 SLOT 1 LATCH condition Stereo signal DATA CLOCK
• The f irst data reception.
• A setup of an inside do esn't change.
• The second data reception.
• A setup of an inside is changed when the second data were compared with the first time and it was judged the same data. D0 to D14 D15 D0 to D14 D15 First time Transmitting data LATCH condition Second time Transmitting data D15 LATCH condition [An inside setting changing in the communication error measurement function [effective] .] SLOT 1 LATCH condition Stereo signal DATA CLOCK A setup of an inside is changing by the data transmission of one time. D0 to D14 D15 [An inside setting changing in the communication error measurement function] ineffective] . ]
• The precaution of the communication error countermeasure function. (1) Communication error measurement function are function when are slot1 to slot12(Fixed equalizer setting) transmitting. (2) A communication error countermeasure function is [effectiv e] at the time of the power supply injection. when you don‘t use a communication error countermeasure function,setting it up [ineffective] with serial data after the power supply injection. (Switching of effective or ineffective is possible with D5 of the slot 15.) (3) At the time of communication error measurement function [effective] ,Slot1 to slot12 transmit data of same slot twice by the continuance. (4) Transmit LATCH condition in every transmitting data of one time.

Rev.1.1, Dec.17.2003, page 15 of 30 Soft-Changing This IC built in the Soft-changing circuit for reduce the step-noise of Fader when internal switch changing. By this function, Switching noise of no-signal and some signals can be reduced.

• SOFT-CHANGING 1 This is the circuit which changes gain smoothly at the setup time. This function can work as follows, (1) At the time of Soft-changing ON. (2) Slot15/D6=0 (3) After the last Soft-changing is completed. For example, the movement when Fader is changed from 0dB to –6dB is shown in the right figure(ex.1). After this IC receive the data of fader:-6dB , this circuit changes fader setting from 0dB to –6dB at a time. Switching time is the time when it was set up with Soft-changing time. (ex. 1) Fader : 0dB→-6dB changing. Soft-changing time : 33ms Fader 0dB Fader -6dB t:Soft-changing time (You may change it with serial DATA.) t=33mS * 1) While Soft-changing works (PIN15 output “H”), next data isn't accepted. * 2) PIN15 outputs “L”except for the time of Soft-changing. 15 pin Output While Soft-changing works , PIN15 output “H” DATA CLOCK Slot13 The latch condition D0 to D14 D15 Soft-Changing Time Time D0 D1 D2 83mS(41.5mS) 1 1 1/0 66mS(33mS) 1 0 1/0 41mS(20.5mS) 0 1 1/0 33mS(16.5mS) 0 0 1/0 The change of the Soft-changing time is possible by the setting of D2.
• D2=“1” : The left time of the left table. (Soft-changing time : 83mS,66mS,41mS,33mS)
• D2=“0” : The right time of the left table (Soft-changing time : 41.5mS,33mS,20.5mS,16.5mS)

Rev.1.1, Dec.17.2003, page 16 of 30

• SOFT-CHANGING 2 This is the circuit which changes gain by 2dB step. This function can work as follows, (1) At the time of Soft-changing ON. (2) Slot15/D6=1 (3) After the last Soft-changing is completed. For example, the movement when Fader is changed from 0dB to –6dBis shown in the right figure(ex.2). After this IC receive the data of fader:-6dB, this circuit changes fader setting from 0dB to –6dB by 2dB step. Switching time is the time when it was set up with Soft-changing time. Total changing time is as the follows. œTotal changing time=Soft-changing time × the number of the step In the case of the right figure, total changing time is 99mS. (33mS × 3 steps) When Soft-changing time is long, step noise is more reduced. Because the step noise is has relations with Soft- changing time. We recommend SOFT-CHANGING 2. However, please confirm step noise by listening test, and judge it. (ex. 2) Fader : 0dB→-6dB changing. Soft-changing time : 33ms Fader 0dB Fader -6dB t:Soft-changing time (You may change it with serial DATA.) t=33mS * 1) While Soft-changing works (PIN15 output “H”), next data isn't accepted. * 2) PIN15 outputs “L”except for the time of Soft-changing. 15 pin Output While Soft-changing works , PIN15 output “H” DATA CLOCK Slot13 The latch condition D0 to D14 D15

Rev.1.1, Dec.17.2003, page 17 of 30 Data Transmission and the Relation of the Soft-Changing Time This IC has the function which should make the following Serial DATA ineffective to the soft-changing movement completion after LATCH condition detection. (At the time of a slot 13 and the slot 14 transmission of the DATA input format.) SLOT13 LATCH condition SLOT14 LATCH condition Serial DATA transmitting in terval.:I T soft-changing time:T * The order of the slot 14 becomes ineffective in the case as the upper figure. Stereo system signal DATA CLOCK By the DATA on the slot 13, a soft-changing movement start. The setting switching completion of the slot 13. (soft-changing movement completion.) D0 to D14 D15 D0 to D14 D15 (Note.1)

• In to make the Serial DATA transmitting interval IT from MCU(microcomputer)to M61528FP Serial DATA transmitting interval : IT > soft-changing time : T the reading error of the DATA doesn't occur.
• DATA transmitting example The DATA transmitting interval when it was set up with the Soft-changing time = 33mS(Internal oscillator using). DATA CLOCK Note1. Serial DATA transmitting interval = The interval of LATCH condition and LATCH condition. Note2. About ± 20% of the maximums are in the dispersion of the soft-changing time (Internal oscillator using). soft-changing time is set up. SLOT15 D0 toD14 D15 LATCH condition (Note 2.) IT ≥ 39.6mS IT ≥ 39.6mS (Note. 2) SLOT13 LATCH condition D0 toD14 D15 SLOT14 LATCH condition D0 toD14 D15 SLOT1 LATCH condition D0 toD14 D15 (Note 2.)

Rev.1.1, Dec.17.2003, page 18 of 30 SLOT1(FRONT Lch low range) FRONT Low (f0) f0 D0 1300Hz 200Hz 150Hz 120Hz FRONT Low (Q) Q D2 13.0 2.5 2.0 1.5 Gv D4 D5 D6 D7 D8 0dB -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 -4.5dB 11 000 -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000 FRONT Low (Gv) SLOT2(FRONT Lch middle range) FRONT Mid (f0) FRONT Mid (Q) FRONT Mid (Gv) f0 D0 03.0KHz 2.0KHz 1.5KHz 1.2KHz 800Hz 011 010 001 000 QD 3 12.0 1.8 1.6 1.4 1.2 101 100 011 010 1.0 001 0.8 000 Gv D6 D7 D8 D9 D10 +4.0dB +3.5dB 01 000 +3.0dB 00 111 +2.5dB 00 110 +2.0dB 00 101 +1.5dB 00 100 +1.0dB 00 011 +0.5dB 00 010 0dB 00 001 -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 11 000 -4.5dB -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000It’s initial setting when VCC turn on.

Rev.1.1, Dec.17.2003, page 19 of 30 SLOT3(FRONT Lch high range) It’s initial setting when VCC turn on. FRONT High (f0) f0 D0 018KHz 10KHz 8KHz FRONT High (Q) Q D2 11.0 0.8 0.6 0.4 Gv D4 D5 D6 D7 D8 +8.0dB +7.5dB 01 000 +7.0dB 00 111 +6.5dB 00 111 +6.0dB 00 110 +5.5dB 00 110 +5.0dB 00 101 +4.5dB 00 101 +4.0dB 00 100 +3.5dB 00 100 +3.0dB 00 011 +2.5dB 00 011 +2.0dB 00 010 +1.5dB 00 010 +1.0dB 00 001 +0.5dB 00 001 0dB 00 000 00 000 FRONT High (Gv) -0.5dB -1.0dB -1.5dB 10 001 -2.0dB 10 001 -2.5dB 10 010 -3.0dB 10 010 -3.5dB 10 011 -4.0dB 10 011 -4.5dB 10 100 -5.0dB 10 100 -5.5dB 10 101 -6.0dB 10 101 -6.5dB 10 110 -7.0dB 10 110 -7.5dB 10 111 -8.0dB 10 111 11 000 10 0001

Rev.1.1, Dec.17.2003, page 20 of 30 SLOT4(FRONT Rch low range) FRONT Low (f0) f0 D0 1300Hz 200Hz 150Hz 120Hz FRONT Low (Q) Q D2 13.0 2.5 2.0 1.5 FRONT Low (Gv) Gv D4 D5 D6 D7 D8 0dB -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 -4.5dB 11 000 -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000 SLOT5(FRONT Rch middle range) FRONT Mid (f0) FRONT Mid (Q) FRONT Mid (Gv) f0 D0 03.0KHz 2.0KHz 1.5KHz 1.2KHz 800Hz 011 010 001 000 QD 3 12.0 1.8 1.6 1.4 1.2 101 100 011 010 1.0 001 0.8 000 It’s initial setting when VCC turn on. Gv D6 D7 D8 D9 D10 +4.0dB +3.5dB 01 000 +3.0dB 00 111 +2.5dB 00 110 +2.0dB 00 101 +1.5dB 00 100 +1.0dB 00 011 +0.5dB 00 010 0dB 00 001 -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 11 000 -4.5dB -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000

Rev.1.1, Dec.17.2003, page 21 of 30 SLOT6(FRONT Rch high range) It’s initial setting when VCC turn on. FRONT High (f0) f0 D0 018KHz 10KHz 8KHz FRONT High (Q) Q D2 11.0 0.8 0.6 0.4 FRONT High (Gv) Gv D4 D5 D6 D7 D8 +8.0dB +7.5dB 01 000 +7.0dB 00 111 +6.5dB 00 111 +6.0dB 00 110 +5.5dB 00 110 +5.0dB 00 101 +4.5dB 00 101 +4.0dB 00 100 +3.5dB 00 100 +3.0dB 00 011 +2.5dB 00 011 +2.0dB 00 010 +1.5dB 00 010 +1.0dB 00 001 +0.5dB 00 001 0dB 00 000 00 000 -0.5dB -1.0dB -1.5dB 10 001 -2.0dB 10 001 -2.5dB 10 010 -3.0dB 10 010 -3.5dB 10 011 -4.0dB 10 011 -4.5dB 10 100 -5.0dB 10 100 -5.5dB 10 101 -6.0dB 10 101 -6.5dB 10 110 -7.0dB 10 110 -7.5dB 10 111 -8.0dB 10 111 11 000 10 0001

Rev.1.1, Dec.17.2003, page 22 of 30 SLOT7(REAR Lch Low range) REAR Low (f0) f0 D0 1300Hz 200Hz 150Hz 120Hz REAR Low (Q) REAR Low (Gv) 4.0 1 13.5 3.0 2.5 2.0 Gv D5 D6 D7 D8 D9 0dB -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 -4.5dB 11 000 -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000 Q D2 D3 SLOT8(REAR Lch middle range) REAR Mid (f0) REAR Mid (Q) REAR Mid (Gv) f0 D0 03.0KHz 2.0KHz 1.5KHz 1.2KHz 800Hz 011 010 001 000 QD 3 12.0 1.8 1.6 1.4 1.2 101 100 011 010 1.0 001 0.8 000 It’s initial setting when VCC turn on. Gv D6 D7 D8 D9 D10 +4.0dB +3.5dB 01 000 +3.0dB 00 111 +2.5dB 00 110 +2.0dB 00 101 +1.5dB 00 100 +1.0dB 00 011 +0.5dB 00 010 0dB 00 001 -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 11 000 -4.5dB -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000

Rev.1.1, Dec.17.2003, page 23 of 30 SLOT9(REAR Lch high range) It’s initial setting when VCC turn on. REAR High (f0) f0 D0 018KHz 10KHz 8KHz REAR High (Q) Q D2 11.0 0.8 0.6 0.4 REAR High (Gv) Gv D4 D5 D6 D7 D8 +8.0dB +7.5dB 01 000 +7.0dB 00 111 +6.5dB 00 111 +6.0dB 00 110 +5.5dB 00 110 +5.0dB 00 101 +4.5dB 00 101 +4.0dB 00 100 +3.5dB 00 100 +3.0dB 00 011 +2.5dB 00 011 +2.0dB 00 010 +1.5dB 00 010 +1.0dB 00 001 +0.5dB 00 001 0dB 00 000 00 000 -0.5dB -1.0dB -1.5dB 10 001 -2.0dB 10 001 -2.5dB 10 010 -3.0dB 10 010 -3.5dB 10 011 -4.0dB 10 011 -4.5dB 10 100 -5.0dB 10 100 -5.5dB 10 101 -6.0dB 10 101 -6.5dB 10 110 -7.0dB 10 110 -7.5dB 10 111 -8.0dB 10 111 11 000 10 0001

Rev.1.1, Dec.17.2003, page 24 of 30 SLOT10(REAR Rch Low range) REAR Low (f0) f0 D0 1300Hz 200Hz 150Hz 120Hz REAR Low (Q) REAR Low (Gv) 4.0 1 13.5 3.0 2.5 2.0 Gv D5 D6 D7 D8 D9 0dB -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 -4.5dB 11 000 -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000 Q D2 D3 SLOT11(REAR Rch middle range) REAR Mid (f0) REAR Mid (Q) REAR Mid (Gv) f0 D0 03.0KHz 2.0KHz 1.5KHz 1.2KHz 800Hz 011 010 001 000 QD 3 12.0 1.8 1.6 1.4 1.2 101 100 011 010 1.0 001 0.8 000 Gv D6 D7 D8 D9 D10 +4.0dB +3.5dB 01 000 +3.0dB 00 111 +2.5dB 00 110 +2.0dB 00 101 +1.5dB 00 100 +1.0dB 00 011 +0.5dB 00 010 0dB 00 001 -0.5dB 00 000 -1.0dB 10 001 -1.5dB 10 010 -2.0dB 10 011 -2.5dB 10 100 -3.0dB 10 101 -3.5dB 10 110 -4.0dB 10 111 11 000 -4.5dB -5.0dB 11 001 -5.5dB 11 010 -6.0dB 11 011 -6.5dB 11 100 -7.0dB 11 101 -7.5dB 11 110 -8.0dB 11 111 10 000It’s initial setting when VCC turn on.

Rev.1.1, Dec.17.2003, page 25 of 30 SLOT12(REAR Rch high range) REAR High (f0) f0 D0 018KHz 10KHz 8KHz REAR High (Q) Q D2 11.0 0.8 0.6 0.4 REAR High (Gv) Gv D4 D5 D6 D7 D8 +8.0dB +7.5dB 01 000 +7.0dB 00 111 +6.5dB 00 111 +6.0dB 00 110 +5.5dB 00 110 +5.0dB 00 101 +4.5dB 00 101 +4.0dB 00 100 +3.5dB 00 100 +3.0dB 00 011 +2.5dB 00 011 +2.0dB 00 010 +1.5dB 00 010 +1.0dB 00 001 +0.5dB 00 001 0dB 00 000 00 000 -0.5dB -1.0dB -1.5dB 10 001 -2.0dB 10 001 -2.5dB 10 010 -3.0dB 10 010 -3.5dB 10 011 -4.0dB 10 011 -4.5dB 10 100 -5.0dB 10 100 -5.5dB 10 101 -6.0dB 10 101 -6.5dB 10 110 -7.0dB 10 110 -7.5dB 10 111 -8.0dB 10 111 11 000 10 0001 It’s initial setting when VCC turn on.

Rev.1.1, Dec.17.2003, page 26 of 30 SLOT13 SLOT14 ATT FRONT L ch FRONT Rch D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0dB -2dB 11 010 -4dB 11 001 -6dB 11 000 -8dB 10 111 -10dB 10 110 -12dB 10 101 -14dB 10 100 -16dB 10 011 -18dB 10 010 -20dB 10 001 -22dB 10 000 -24dB 01 111 -26dB 01 110 -28dB 01 101 -30dB 01 100 -32dB 01 011 -34dB 01 010 -36dB 01 001 -38dB 01 000 -40dB 00 111 -42dB 00 110 -44dB 00 101 -46dB 00 100 -48dB 00 011 -50dB 00 010 -∞ dB 00 001 00 000 FADER( FRONT) ATT REAR Lch REAR Rch D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 0dB -2dB 11 010 -4dB 11 001 -6dB 11 000 -8dB 10 111 -10dB 10 110 -12dB 10 101 -14dB 10 100 -16dB 10 011 -18dB 10 010 -20dB 10 001 -22dB 10 000 -24dB 01 111 -26dB 01 110 -28dB 01 101 -30dB 01 100 -32dB 01 011 -34dB 01 010 -36dB 01 001 -38dB 01 000 -40dB 00 111 -42dB 00 110 -44dB 00 101 -46dB 00 100 -48dB 00 011 -50dB 00 010 -∞ dB 00 001 00 000 FADER( REAR) It’s initial setting when VCC turn on.

Rev.1.1, Dec.17.2003, page 27 of 30 SLOT15 soft-changing time Time D0 183mS(41.5m S) 66mS(33mS) 33mS( 16.5mS) 41mS(20.5mS) Soft-changing D4 OFF ON Soft-changing ON / OFF CLOCK choice D3 Internal oscillatorusing External ceramic oscillator using CLOCK select Soft-changing time can be changed with 1/0 of D2.

• D2=“1”: The left time of the left table. (soft-changing time: 83mS,66mS,41mS,33mS)
• D2=“0”: ( ) time of the left table. (soft-changing time: 41.5mS,33mS,20.5mS,16.5mS) Form D6 Soft-changing 1 Soft-changing 2 Soft-changing form Countermeasure function D5 ineffective effective Communication error countermeasure function

Rev.1.1, Dec.17.2003, page 28 of 30 Application Example 1. At the time of use the internal oscillator (When D3= "0" of the slot 15.) VCC=8V N.C CLOCK MCU FLIN FRIN RLIN RRIN DGND VREFIN + + FLOUT FROUT RLOUT RROUT 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ N.C N.C OSCR SACTIVE OSCIN OSCOUT 2.2µ VCC DGND DATATEST +100µ 0.1µ GND GND 100µ No Connect [U n i t ] Resistance:Ω Capacitance:F 0.1µ 91K

Rev.1.1, Dec.17.2003, page 29 of 30 2. At the time of use the external ceramic oscillator (fCLK=4.00MHz). (When D3= “1" of the slot 15) N.C CLOCK MCU FLIN FRIN RLIN RRIN DGND VREFIN + + FLOUT FROUT RLOUT RROUT 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ N.C N.C OSCR SACTIVE OSCIN OSCOUT 2.2µ VCC DGND DATATEST +100µ 0.1µ GND GND 100µ No Connect The external ceramic oscillator. CERALOCK:CSTLS4M00G56-B0 (fCLK= 4.00MHz) 680 0.1µ

Rev.1.1, Dec.17.2003, page 30 of 30 Package Dimensions SSOP24-P-300-0.80 Weight(g) JEDEC Code 0.2 Cu Alloy 24P2Q-A Plastic 24pin 300mil SSOP Symbol Min Nom Max A b c D E L y Dimension in Millimeters HE .30 .180 .010 .25 .57 .40 .271 .10 .81 .350 .20 .110 .35 .80 .87 .60 .251 .627 .20 .12 .450 .250 .210 .45 .18 .80 .10 —b2 — 0.5 0˚ — 8˚ e 24 13 121 HE E D e y F A A2 A1 L c e b2 Recommended Mount Pad Detail F —Z1 0.65 0.8 z Detail G z b G MMP

© 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0 Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Tech nology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. An y diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 RENESAS SALES OFFICES