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Rev.1.0, Sep.19.2003, page 1 of 17 M61527FP 6ch ELECTRONIC VOLUME WITH 10 INPUT SELECTOR REJ03F0036-0100Z Rev.1.0 Sep.19.2003 Feature FUNCTION FEATURE Electric Volume 6 channel independent with High Voltage Transistor. (0 to -99dB/ 1dBstep, -∞ dB) Input Selector Front L/R channel 10 Input Selector. Multi Channel Input All channel 2 Input Selector. REC Output 4 Lines REC Output (Both L and R channels) Input ATT Input ATT (for ADC:0/-6/-12/-18dB) Input Gain Control Input Gain Control (0/+6/+12/+18dB) Output Gain Control Output Gain Control (0/+6/+12/+18dB) Balance Out Built-in Balance out (for ADC) Recommended Operating Condition Rated Supply Voltage …… AVCC=7.0V(typ), AVEE=-7.0V(typ), DVDD=3.3V(typ) Application Receiver, AV Amp, Mini Stereo etc.

Rev.1.0, Sep.19.2003, page 2 of 17 System Block Diagram MCU I/FCLOCK DATA LATCH Rch Lout REC OUTL Lch AVCCAVEEDVDD DGND Rout SLout Cout SWout SRout GND Input ATT (for ADC)Balance Output L channel Output Gain Control Output Gain Control Output Gain Control Output Gain Control Output Gain Control Output Gain Control Balance Output R channel Multi FRin Multi FLin REC OUTR Multi SLin Multi SRin Multi Cin Multi SWin

10 Input selector10 Input selector

(for ADC)

Rev.1.0, Sep.19.2003, page 3 of 17 Block Diagram and Pin Configuration (Top View) INR10/RECR4 AVEE INL9 INR9 INL8 INR8 INL7 INR7 SLIN2 INL6 INIR6 INL5 INR5 INL4 INR4 INL3 NC RSELOUT GNDNC SWVIN LATCH CLOCK DGND SLVIN SWIN2 CIN2 SWSELOUT SROUT LIN1 SRIN2 NC GND GND AVCC NC RIN1 SWIN1 DVDD RIN2 LIN2 GND BALANCE R/- BALANCE R/+ SRSELOUT SRIN1 ROUT LOUT CIN1 GND INR1 INL1 INR2 RECR2 INR3 BALANCE L/+ SWOUT COUT NC BALANCE L/- RVIN CVIN CSELOUT SLSELOUT GND SLOUT NC SRVIN SLIN1LVIN LSELOUT GND RECL1 RECR1 RECL2 RECL3 RECR3 INL10/RECL4 DATA INL2 Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Output Gain Control Rch Lch SLch SRch SWch Cch Output Gain Control Output Gain Control Output Gain Control Output Gain Control MCU I/F CLK DATA LATCH Lch VOL Output Gain Control Rch VOL SRchVOL SLchVOL Cch VOL SWch VOL Input ATT Input ATT Lch Rch GND GND DVDDAVCC AVEE SWchCch SLch SRchRch Lch Rch Lch Rch GND GND Lch GND GND FL/FR VOL Input FL/FR VOL Input Multi Input Selector Multi Input Selector Multi Input Selector Multi Input Selector GND

Rev.1.0, Sep.19.2003, page 4 of 17 Pin Description PIN No. Name Function 5,3,1,79,77,75,73, 71,69 INR1,2,3,4,5,6,7,8,9 Input pin of R channel (Input Selector) 70,68 INL1,2,3,4,5,6,7,8,9 Input pin of L channel (Input Selector) 6,13,16,19,32,57,64 GND Analog Ground 7,24 CIN1/CIN2 Input pin of C channel (2 Input Selector) 8,25 SWIN1/SWIN2 Input pin of SW channel (2 Input Selector) 9,22 SRIN1/SRIN2 Input pin of SR channel (2 Input Selector) 10,23 SLIN1/SLIN2 Input pin of SL channel (2 Input Selector) 11,20 LIN1/LIN2 Input pin of L channel (2 Input Selector) 12,21 RIN1/RIN2 Input pin of R channel (2 Input Selector) 14,15 BALANCE L/+,L/- Output pin of L channel Balance Output(+/-) 17,18 BALANCE R/+,R/- Output pin of R channel Balance Output(+/-)

26 DGND Ground of internal logic circuit

27,28,29 CLOCK,DATA,LATCH Input pin of Control clock /data/ trigger

30 DVDD Power supply to internal logic circuit

31 AVCC Positive power supply to internal analog circuit

33 SWSELOUT Output pin of SW channel volume input selector

34 SWVIN Input pin of SW channel volume

35 SWOUT Output pin of SW channel

36 COUT Output pin of C channel

37 CVIN Input pin of C channel volume

38 CSELOUT Output pin of C channel volume input selector

39 SLSELOUT Output pin of SL channel volume input selector

40 SLVIN Input pin of SL channel volume

41 SLOUT Output pin of SL channel

48,49,50,51,52,53 NC Non-connection terminal

42 SROUT Output pin of SR channel

43 SRVIN Input pin of SR channel volume

44 SRSELOUT Output pin of SR channel volume input selector

45 RSELOUT Output pin of R channel volume input selector

46 RVIN Input pin of R channel volume

47 ROUT Output pin of R channel

54 LOUT Output pin of L channel

55 LVIN Input pin of L channel volume

56 LSELOUT Output pin of L channel volume input selector

58,60,62 /59,61,63 REC L1,L2,L3 /REC R1,R2,R3 Output pin of REC (Lch and Rch)

65 INL10/REC L4 Input pin of L channel (Input Selector) / Output pin of REC (Lch)

66 INR10/REC R4 Input pin of R channel (Input Selector) / Output pin of REC (Rch)

67 AVEE Negative power supply to internal analog circuit

Rev.1.0, Sep.19.2003, page 5 of 17 Absolute Maximum Ratings Symbol Parameter Condition Ratings Unit AVCC-AVEE ±8.0 Supply voltage Power supply DVDD-GND 6.0 V Pd Power dissipation Ta ≤25°C 1250 mW Kθ Thermal derating Ta>25 °C 12.5 mW/ °C Topr Operating temperature -20 to +55 °C Tstg Storage temperature -40 to +125 °C 0.5 1.0 1.5 0 25 50 75 100 125 150 THERMAL DERATINGS (MAXIMUM RATING) POWER DISSIPATION pd (W) AMBIENT TEMPERATURE Ta (˚C) Recommended Operating Conditions (Ta=25°C, unless otherwise noted) Parameter Symbol Condition MIN TYP MAX Unit Analog supply voltage (Positive) AVCC 4.5 7.0 7.5 V Analog supply voltage (Negative) Digital supply voltage DVDD 3.0 3.3 5.5 V Logic “H ” level input voltage VIH DGND reference DVDD x 0.7 — DVDD V Logic “L” level input voltage VIL DGND reference DGND — DVDD x 0.2 V Note: AVEE≤DGND<DVDD ≤AVCC

Rev.1.0, Sep.19.2003, page 6 of 17 Relationship between Data and Clock D0 D1 D21 D22 D23 D0 LATCH SIGNALH L H L H L DATA CLOCK LATCH DATA signal is read at the rising edge of CLOCK. Serial data (D0 –D23) is loaded at the rising edge of the LATCH signal. Clock and Data Timings CLOCK DATA 25% 75% tr tf tcr tWHC tWLC tSD tHD LATCH tSL tr tf 25% 75% 25% 75% tr tWHC tf tSC 25%

Rev.1.0, Sep.19.2003, page 7 of 17 Timing Definition of Digital Block Limits Symbol Parameter Min typ Max Unit tcr Clock cycle time 4 — — tWHC Clock pulse width (“H” level) 1.6 — — tWLC Clock pulse width (“L” level) 1.6 — — tr Rising time of clock,data and latch — — 0.4 tf Falling time of clock,data and latch — — 0.4 tSD Data setup time 0.8 — — tHD Data hold time 0.8 — — tSL Latch setup time 1 — — tWHL Latch pulse width 1.6 — — tSC Clock setup time 4 — — µsec

Rev.1.0, Sep.19.2003, page 8 of 17 Data Control Specification Initialize all data of the 3 formats when Digital Power supply (DVDD) turn on. Slot0 Slot1 Slot2 0 0 0 0Lch Volume Rch Volume Cch Volume SWch VolumeSLch Volume SRch Volume INS10 /REC4 Selector Multi Input Mute D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10b D11b D12b D13b D14b D15b D16b D17b D18b D19b D20b D21b D22 D23 D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10c D11c D12c D13c D14c D15c D16c D17c D18c D19c D20c D21c D22 D23 D0a D1a D2a D3a D4a D5a D6a D7a D8a D9a D10a D11a D12a D13a D14a D15a D16a D17a D18a D19a D20a D21a D22 D23 REC Output REC Output REC Output REC Output Input Selector Input Gain Control Output Gain Control Multi Input Selector FL/FR VOL Input Input ATT 010 1 00 All Ch Output Mute

Rev.1.0, Sep.19.2003, page 9 of 17 Setting Code It's initial setting when power is turned on. Setting IN1 IN2 IN3 IN4 IN5 IN6 IN7 IN8 0101 0110 0111 1000 0100 0011 0010 0001 ALL OFF 0000 D0a D1a D2a D3a IN9 IN10 1001 1010 (1)Input Selector Setting -6dB -12dB -18dB 11 0dB 00 D4a D5a (2)Input ATT REC Output OFF ON 11 Setting D6a D7a REC1 REC2 (3)REC Output D8a D9a REC3 REC4 Setting Multi IN2 1 Multi IN1 0 D10a (4)Multi Input Selector (5)FL/FR VOL Input Setting +6dB +12dB +18dB 11 0dB 00 D12a D13a (6)Input Gain Control Setting +6dB +12dB +18dB 11 0dB 00 D14a D15a (7)Output Gain Control Setting REC4 1 IN10 0 D16a (8)IN10/REC4 Selector Setting Multi Input 1 Bypass 0 D11a Setting Mute on 1 Mute off 0 D17a (10)All Ch Output Mute Setting Mute on 1 Mute off Depend on (4) Multi Input0 D18a (11)Multi Input Mute(Except for L/R) Note : Please don't input except specification data.

Rev.1.0, Sep.19.2003, page 10 of 17 (9)6 channel Volume ATT Lch SLch Rch SRch Cch SWch D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10bD11bD12bD13b D14cD15cD16cD17cD18cD19cD20c 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB -25dB -26dB -27dB 0000000 0000001 0000010 0000011 0000100 0000101 0000110 0000111 0001000 0001001 0001010 0001011 0001100 0001101 0001110 0001111 0010000 0010001 0010010 0010011 0010100 0010101 0010110 0010111 0011000 0011001 0011010 0011011 -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB 0011100 0011101 0011110 0011111 0100000 0100001 0100010 0100011 0100100 0100101 0100110 0100111 0101000 0101001 0101010 0101011 0101100 0101101 0101110 0101111 0110000 0110001 0110010 0110011 0110100 0110101 0110110 0110111 -11dB -28dB D14bD15bD16bD17bD18bD19bD20b D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10cD11cD12cD13c ATT Lch SLch Rch SRch Cch SWch D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10bD11bD12bD13b D14cD15cD16cD17cD18cD19cD20c D14bD15bD16bD17bD18bD19bD20b D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10cD11cD12cD13c

Rev.1.0, Sep.19.2003, page 11 of 17 -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -80dB -81dB -82dB 0111000 0111001 0111010 0111011 0111100 0111101 0111110 0111111 1000000 1000001 1000010 1000011 1000100 1000101 1000110 1000111 1001000 1001001 1001010 1001011 1001100 1001101 1001110 1001111 1010000 1010001 1010010 -84dB -85dB -86dB -87dB -88dB -89dB -90dB -92dB 1010011 1010100 1010101 1010110 1010111 1011000 1011001 1011010 -56dB -83dB 1011100 - 9 3 d B 1011101 - 9 4 d B 1011110 - 9 1 d B 1011011 -95dB -96dB -97dB -99dB 1011111 1100000 1100001 1100011 -∞ dB 1111000 - 9 8 d B 1100010 ATT Lch SLch Rch SRch Cch SWch ATT Lch SLch Rch SRch Cch SWch D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10bD11bD12bD13b D14cD15cD16cD17cD18cD19cD20c D14bD15bD16bD17bD18bD19bD20b D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10cD11cD12cD13c D0b D1b D2b D3b D4b D5b D6b D7b D8b D9b D10bD11bD12bD13b D14cD15cD16cD17cD18cD19cD20c D14bD15bD16bD17bD18bD19bD20b D0c D1c D2c D3c D4c D5c D6c D7c D8c D9c D10cD11cD12cD13c Note : Please don't input except specification data.

Rev.1.0, Sep.19.2003, page 12 of 17

Electrical Characteristics

Unless otherwise noted, Ta=25°C, AVCC=7V, AVEE=-7V, DVDD=3.3V, f=1kHz, Volume=0dB, Input Selector=IN1, Input ATT=0dB, Input Gain Control=0dB, Output Gain Control=0dB, FL/FR Volume Input=Bypass, Multi Input Selector=Multi IN1 setting (1) Power supply characteristics Limits Symbol Parameter Test condition min typ max Unit Analog positive power circuit current AIcc With AVCC=7V and AVEE=-7V Pin31 pin current, when no signal is provided — 50 70 mA Analog negative power Circuit current AIee With AVCC=7V and AVEE=-7V Pin67 pin current, when no signal is provided -70 -50 — mA Digital power circuit current DIdd With DVDD=3.3V, Pin30 pin current, when no signal is provided — 3 6 mA

Rev.1.0, Sep.19.2003, page 13 of 17 (2) Input/Output characteristics (OVER ALL) Limits Symbol Parameter Test condition min typ max Unit Input resistance Rin 1 to 5,65,66,68 to 80pin When each selector chooses a terminal concerned. 35 47 65 k Ω Maximum output voltage VOM (4,5,7,8,9,10)pin input, (54,47,36,35,42,41)pin output, THD=1%, RL=10k Ω Output Gain Control=+12dB setting 3.6 4.2 — Vrms Pass gain Gv (4,5,7,8,9,10)pin input, (54,47,36,35,42,41)pin output, Vi=0.3Vrms,FLAT -2.0 0 2.0 dB THD1 (4,5,7,8,9,10)pin input, (54,47,36,35,42,41)pin output, BW:400Hz to 30kHz, f=1kHz, Vo=0.3Vrms, RL=10kΩ — 0.005 0.05 % Distortion THD2 (4,5,7,8,9,10)pin input,(54,47,36,35,42,41)pin output, BW: 400Hz to 30kHz, f=1kHz, Vo=2Vrms, RL=10kΩ — 0.03 0.1 % Channels balance CBAL (4,5)pin input, (54,47)pin output, Vi=0.3Vrms, JIS-A -0.5 0 0.5 dB Output Gain Control=0dB — 1.5 6 µVrms Vono (VOL=-∞ dB) JIS-A, (4,5,7,8,9,10)pin: Rg=0 Ω , (54,47,36,35,42, 41)pin output, Volume=-∞ dB setting Output Gain Control=+12dB — 9 20 µVrms Output Gain Control=0dB — 2.5 8 µVrms Vono (VOL=0dB) JIS-A, (4,5,7,8,9,10)pin: Rg=0 Ω , (54,47,36,35,42, 41)pin output, Volume=0dB setting Output Gain Control=+12dB — 12 25 µVrms Output noise voltage Vonobal (Balance out) JIS-A, (4,5)pin:Rg=0Ω , (14,15,17,18)pin output — 5 10 µVrms CS1 < Input selector > (54,47)pin output, Vo=1Vrms, Rg=0 Ω , RL=10kΩ , JIS-A — -90 -70 dB Input/Multi selector channel separation CS2 < Multi channel selector > (35,36,41,42,47,54)pin output, Vo=1Vrms, Rg=0Ω , RL=10kΩ , JIS- A, FL/FR VOL Input=Multi input — -90 -70 dB

Rev.1.0, Sep.19.2003, page 14 of 17 Limits Symbol Parameter Test condition min typ max Unit CT1 (FL/FR) (4,5)pin input, (47,54)pin output, Vo=1Vrms, Rg=0Ω , RL=10kΩ , JIS- A — -90 -70 dB Cross talk between channels CT2 (Multi Input) (7,8,9,10,11,12)pin input, (35,36,41,42,47,54)pin output, Vo=1Vrms, Rg=0Ω , RL=10kΩ , JIS- A, FL/FR VOL Input=Multi input — -90 -70 dB (3) 6 channel Volume characteristics Limits Symbol Parameter Test condition min typ max Unit Maximum attenuation ATTmax (35,36,41,42,47,54)pin output, Vi=2Vrms,JIS-A,VOL=-∞ — -100 -95 dB Volume gain Between channels Dvol 35,36,41,42,47,54)pin output, Volume=0dB setting -0.5 0 +0.5 dB

Rev.1.0, Sep.19.2003, page 15 of 17 Internal Block Diagram 58 60 62 15 14 INL9 INL8 INL7 INL6 INL5 INL4 INL3 INL2 INL1 INL10 /RECL4 RIN2 RIN1 CIN2 CIN1 SWIN2 SWIN1 SRIN2 SRIN1 SLIN2 SLIN1 LIN2 LIN1 RECL1 Rch Balance out 16 18 17 Lch Balance out GND 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 59 61 63 69INR9 INR8 INR7 INR6 INR5 INR4 INR3 INR2 INR1 INR10 /RECR4 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k MCU I/F 30 31 DVDD +3.3.0V AVCC +7V DGND AVEE -7V Input ATT Input ATT RECL2 RECL3 RECR1 RECR2 RECR3 GND GND GND GND GND NC NC NC NC NC NC CLOCK DATA LATCH Lch VOL SLch VOL SRch VOL SWch VOL Cch VOL Rch VOL LOUT SLOUT SROUT SWOUT COUT ROUT Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Output Gain Control Output Gain Control Output Gain Control Output Gain Control Output Gain Control Output Gain Control 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k 47k GND 0/-6/-12/-18dB 0/-6/-12/-18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0/+6/+12/+18dB 0~-99dB,mute 0~-99dB,mute 0~-99dB,mute 0~-99dB,mute 0~-99dB,mute 0~-99dB,mute Input Selector Input Selector REC SW REC SW FL/FR VOL Input FL/FR VOL Input Multi Input Selector

Rev.1.0, Sep.19.2003, page 16 of 17 Application Example ADC + - - AVEE -7V RECL1 RECR2 RECL3 RECR3 SR SWC SL L MCU AVCC DVDD 3.3V DGND R SRIN2 RIN2 LIN2 SLIN2 CIN2 SWIN2 INL10 /RECL4 INR10 /RECR4 INL9 INR9 INL8 INR8 INL7 INR7 INL6 INR6 INL5 INR5 INL4 INR4 INL3 SRIN1 CIN1 SLIN1 LIN1 RIN1 SWIN2 RECR1 RECL2 INR1 INL1 INR2 INL2 INR3 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 2.2 u 100 u 100 u 0.1 u 0.1 u 100 u0.1 u 4.7 u4.7 u4.7 u 4.7 u 4.7 u4.7 u 4.7 u4.7 u Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Input Gain Control Output Gain Control Rch Lch SLch SRch SWch Cch Output Gain Control Output Gain Control Output Gain Control Output Gain Control MCU I/F CLK DATA LATCH Lch VOL Output Gain Control Rch VOL SRchVOL SLchVOL Cch VOL SWch VOL Input ATT Input ATT Lch Rch GND GND DVDDAVCC AVEE SWchCch SLch SRchRch Lch Rch Lch Rch GND GND Lch GND GND FL/FR VOL Input FL/FR VOL Input Multi Input Selector Multi Input Selector Multi Input Selector Multi Input Selector GND

Rev.1.0, Sep.19.2003, page 17 of 17 Package Dimensions QFP80-P-1420-0.80 1.58 Weight(g) JEDEC CodeEIAJ Package Code Lead Material Alloy 42 80P6N-A Plastic 80pin 14✕ 20mm body QFP 0.1 0.2 Symbol Min Nom Max A b c D E H E L y Dimension in Millimeters H D 0.5 ——I2 1.3 ——M D 14.6 ——M E 20.6 10˚0˚ 0.1 1.4 0.80.60.4 23.122.822.5 17.116.816.5 0.8 20.220.019.8 14.214.013.8 0.20.150.13 0.450.350.3 2.8 3.05 ee e E c HE 80 65 H D D M D ME A F A1A2 L y Recommended Mount Pa d Detail F x —— 0.2 b x M MMP

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Product Information

M61527FP specifications and overview.

Summary

6ch ELECTRONIC VOLUME WITH 10 INPUT SELECTOR

Description

6ch ELECTRONIC VOLUME WITH 10 INPUT SELECTOR

Source title M61527FP Datasheet(PDF) - Renesas Technology Corp

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