M61523FP RENESAS | Alldatasheet

Document overview

  • Manufacturer or author: pROVIDED bY alldatasheet.com(free datasheet download site)
  • PDF pages: 24

Technical content

Features

  • Dual source type (Main/Sub) Input selector Input of single 3ch and the differential 1ch.
  • Input gain amp. Main selector and Sub selector can do the setting of gain independently 0dB to +14dB/1dBstep, +14dB to +20dB/2dB step
  • Built-in 2ch master volume with soft-changing circuit for pop-noize +6dB to –80dB/1dBstep, –∞ dB (L and R independence control)
  • FADER Front, Rear : 0dB to –48dB/2dB step, –56, –∞ dB (Front and Rear independence control, L and R are controlled at the same time) Non FADER : –26dB to +12dB/2dB step, –∞ dB (FRONT and REAR are controlled at the same time) Built in soft-changing circuit for pop-noize.
  • Built-in Loudness : 0dB to –15dB/1dB step fo: 400Hz, 800Hz
  • Built-in 2 band Tone Control Bass : –14dB to +16dB/2dB step fo: 50Hz, 80Hz, 120Hz Q: 1.0, 1.25, 1.5, 2.0 Treble : –12dB to +12dB/2dB step fo: 8KHz, 12KHz Q: 1.0
  • Built-in Soft MUTE by DC voltage control or serial data control
  • 2 line serial bus control Recommended Operating Conditions

Rev.1.00, Sep.04.2003, page 2 of 23 Pin Configuration (Top View) 24INL1 INR1 INL2 INR2 INL3 INR3 DEFPL RROUT DEFNR VCC MUTE DATA VREFIN SUBLOUT SUBROUT DEFNL DEFPR RLOUT FROUT FLOUT GND CLOCK OUTLINE:24PIN SSOP NFROUT NFLOUT Application Car Audio

Rev.1.00, Sep.04.2003, page 3 of 23 System Configuration Power supply FL-ch Loudness Volume Microcomputer interface Tone control Bass Treble Non FADER Input selector (MainSub) SUBLOUT SUBROUT Non FADER VCC VREF GND CLOCK DATA Input gain control (Main) Input gain control (Sub) Soft mute MUTE FADERFADER FADERFADER CD-Player Tape Radio-ANT RL-ch RR-ch FR-ch NF-ch CD-Player Tape Radio-ANT MD-Changer MD-Changer Pin Description Pin No. Name Function

1 INL1

2 INR1

Input pin of L/R channel 1

3 INL2

4 INR2

Input pin of L/R channel 2

5 INL3

6 INR3

Input pin of L/R channel 3

7 DEFPL Positive input pin of differential amp(L channel)

8 DEFNL Negative input pin of differential amp (L channel)

9 DEFPR Positive input pin of differential amp (R channel)

10 DEFNR Negative input pin of differential amp (R channel)

23 SUBLOUT Output pin of Sub selector (Lch)

22 SUBROUT Output pin of Sub selector (Rch)

16 FLOUT Output pin of FADER volume (FRONT Lch)

17 FROUT Output pin of FADER volume (FRONT Rch)

18 RLOUT Output pin of FADER volume (REAR Lch)

19 RROUT Output pin of FADER volume (REAR Rch)

20 NFLOUT Output pin of Non FADER volume (REAR Lch)

21 NFROUT Output pin of Non FADER volume (REAR Rch)

12 DATA Input pin of Serial DATA

13 CLOCK Input pin of CLOCK

15 MUTE Control pin of Soft MUTE

14 GND Ground pin

11 VCC Power supply pin

24 VREFIN Signal ground of IC

Rev.1.00, Sep.04.2003, page 4 of 23 Internal Block Diagram (Lch Only) Loudness Volume 0dB to 14dB/1dB 14dB to 20dB/2dB Input gain control (Main)  0dB to -15dB 1dB step  f0:400Hz/800Hz INL1 INL2 INL3 DEFPL DEFNL +6dB to -80dB 1dB step,-∞ dB <Bass>  +16dB to -14dB 2dB step  f0:50Hz/80Hz/120Hz <Treble>  +12dB to –12dB 2dB step  f0:8KHz/12KHz SUBLOUT Tone control Non Fader 0dB to -48dB 2dB step,-56, -∞ dB +12dB to -26dB 2dB step, -∞ dB FLOUT (FRONT output) RLOUT (REAR output) NFLOUT (Non FADER output) Input gain control (Sub) 0dB to 14dB/1dB 14dB to 20dB/2dB MUTE Soft mute Fader (Front) 0dB to -48dB 2dB step,-56, -∞ dB Fader (Rear) 100K 100K 100K 51K 34K 51K 34K  MUTE time 80 / 30 / 4 / 0.5mS Absolute Maximum Ratings Symbol Parameter Condition Ratings Unit VCC Power supply 10.5 V Pd Power dissipation Ta ≤ 25°C 1.0 W K Thermal derating Ta > 25 °C (Circuit board installation) 10.0 mW/ °C Topr Operating temperature –30 to +85 °C Tstg Storage temperature –55 to +125 °C

Rev.1.00, Sep.04.2003, page 5 of 23 Recommended Operating Conditions Ratings Symbol Parameter MIN TYP MAX Unit VCC Power supply 7.0 9.0 10.0 VIH Logic “H ” level input voltage (12,13,15pin) 2.1 — 5.0 VIL Logic “H ” level input voltage (12,13,15pin) GND — 0.7 V Thermal Deratings (Maximum Rating) 1.2 1.0 0.8 0.6 0.4 0.2 -40 0 40 80 120 150 AMBIENT TEMPERATURE Ta( ºC) POWER DISSIPATION Pd (W)

Rev.1.00, Sep.04.2003, page 6 of 23 Electical Characteristics Unless otherwise noted, VCC =9V, Ta=25°C, RL=10KΩ , Input selector : IN1 Vi=1Vrms, f=1KHz, Input gain control/Loudness/Volume/Tone control/FADER/Non FADER=0dB Limits Symbol Parameter Condition Min Typ Max Unit Input selector, Input gain control Zin Input resistance 1,2,3,4,5,6pin 50 100 150 k Ω Sin Input selector channel separation DIN-AUDIO Input pin to GND with the capacitance 65 75 — dB CMRR Common mode rejection ratio 7,8pin / 9,10pin DIN-AUDIO At the time of common mode 40 50 — dB Vo (differential) Output voltage of differential amplifier 7,9pin : Vi = 1.5Vrms When it is 8,10pin : Vi = 1.5Vrms } (Reverse mode of 7,9pin) inputted selector : differential input 1.6 2.0 2.4 Vrms Vi max Maximum output voltage 400Hz to 30KHz BPF THD=1% 2.0 2.4 — Vrms Gv max Maximum gain Vi = 0.1Vrms, Gv=20dB 18 20 22 dB Gv = 0dB to 14dB — 1 — dB G STEP Gain step Gv = 14dB to 20dB — 2 — dB Loudness ATT max Maximum attenuation f = 10KHz, A TT = –15dB –17 –15 –13 dB G STEP Gain step — 1 — dB V o l u m e Gv max Maximum gain A TT = +6dB DIN-AUDIO +4 +6 +8 dB ATT max Maximum attenuation A TT = –∞ dB DIN-AUDIO 80 90 — dB G STEP Gain step — 1 — dB ∆ATT Attenuation error Gv = 0dB –2 0 2 dB Fader ATT max Maximum attenuation A TT = –∞ dB DIN-AUDIO 80 90 — dB G STEP Gain step — 2 — dB ∆ATT Attenuation error Gv = 0dB –2 0 2 dB Non Fader Gv max Maximum gain Gv = +12dB DIN-AUDIO +10 +12 +14 dB ATT max Maximum attenuation A TT = –∞ dB DIN-AUDIO 80 90 — dB G STEP Gain step Gv = +12dB to –26dB — 2 — dB

Rev.1.00, Sep.04.2003, page 7 of 23 Unless otherwise noted, VCC=9V, Ta=25°C, RL=10KΩ , Input selector : IN1 Vi=1Vrms, f=1KHz, Input gain control/Loudness/Volume/Tone control/FADER/Non FADER=0dB Limits Symbol Parameter Condition Min Typ Max Unit Bass G(Bass)B Tone control voltage gain (Boost/Bass) Vi = 0.1Vrms, f = 120Hz +14 +16 +18 dB G(Bass)C Tone control voltage gain (Cut/Bass) Vi = 0.5Vrms, f = 120Hz –16 –14 –12 dB GSTEP Gain step — 2 — dB f0 = 50Hz 36.5 50 63.5 Hz f0 = 80Hz 58.4 80 101.6 Hz f0 Center frequency f0 = 120Hz 87.6 120 152.4 Hz Treble G(Treble)B Tone control voltage gain (Boost/Treble) Vi = 0.1Vrms, f = 12KHz +10 +12 +14 dB G(Treble)C Tone control voltage gain (Cut/Treble) Vi = 0.5Vrms, f = 12KHz –14 –12 –10 dB G STEP Gain step — 2 — dB f0 = 8KHz 5.8 8 10.2 KHz f0 Center frequency f0 = 12KHz 8.8 12 15.2 KHz Characteristics ICC Circuit current No signal — 40 55 mA Gv Pass gain Vi = 2.0Vrms, 20Hz to 20KHz –2 0 +2 dB CS Channel separation Input side : Vi = 1Vrms, f = 1KHz Measurement side : Input pin to GND with the capacitance 70 80 — dB Vo max Maximum output voltage 400Hz to 30KHz BPF THD = 1% 2.0 2.4 — Vrms THD Total harmonic distortion 400Hz to 30KHz BPF Vo = 1Vrms, ALL FLAT — 0.009 0.04 % DIN-AUDIO, ALL FLAT Input pin to GND with the capacitance — 12 24 µVrms Vno Output noise voltage DIN-AUDIO, FADER = –∞ dB Input pin to GND with the capacitance — 3 10 µVrms

Rev.1.00, Sep.04.2003, page 8 of 23 Loudness Frequency Characteristics (note) These characteristics are the simulation result. Gain control : 0dB to –15dB/1dB step (f0=400Hz) Center frequency : 400Hz / 800Hz (Gv =-15dB)

Rev.1.00, Sep.04.2003, page 9 of 23 Tone Control Frequency Characteristics (1) Bass frequency characteristics (These characteristics are the simulation result.) Gain control : +16dB to –14dB/2dB step (f0=50Hz , Q=1.0) Center frequency : 50Hz / 80Hz / 120Hz (Gv =+16dB , Q=1.0) Quality factor : 1.0 / 1.25 / 1.5 / 2.0 (Gv =+16dB , f0=50Hz)

Rev.1.00, Sep.04.2003, page 10 of 23 (2) Treble frequency characteristics (These characteristics are the simulation result.) Gain control : +12dB to –12dB/2dB step (f0=8KHz , Q=1.0) Center frequency : 8KHz / 12KHz (Gv =+12dB , Q=1.0) Relationship between Data and Clock The DATA signals are read at rising edges of the CLOCK. The LATCH signal “H ” D0 D1 D2 D3 D21 D22 D23 The LATCH condition How to transmit DATA. This IC reads DATA signal at the rising edge of the CLOCK. When DATA are transmitted, setting up the DATA line is always “L” at the falling edge of the CLOCK.

Rev.1.00, Sep.04.2003, page 11 of 23 Power on Reset This IC builds in the power on reset function. The voltage of VCC (11 pin) less than 5.0V, the serial DATA can not accept. 5.0V VCC(11pin) (V) (S) Reset time Release of reset. After reset is canceled, the serial DATA can accept. Clock and Data Timing 25% 75% t r t WHC t f t WLC t cr t SD t HD CLOCK DATA

Rev.1.00, Sep.04.2003, page 12 of 23 Timing Definition of Digital Block Limits Symbol Parameter Min Typ Max Unit tcr CLOCK cycle time 4.0 — — tWHC CLOCK pulse width ( “H ” level) 1.6 — — tWLC CLOCK pulse width ( “H ” level) 1.6 — — tr Rising time of CLOCK — — 0.4 tSD Falling time of CLOCK — — 0.4 tHD DATA setup time 0.8 — — tf DATA hold time 0.8 — — µS Data Control Specification DATA transmitting. D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 Input Selector (Main) Input Selector (Sub) Input gain control (Main) Input gain control (Sub) Loudness Treble Bass Bass Q Soft- changing time (VOL) Soft- changing time (TONE) Soft-changing. (TONE) ON/OFF Loudness gain Treble gain Bass gain Non FADER Volume Lch Volume Rch 100 Soft-changing. (VOL,FAD) ON/OFF SLOT1 SLOT2 SLOT3 SLOT4 Soft mute time Soft mute ON/OFF Soft- changing time (FAD) Offset adjustment. ON/OFF Fader(Rear) Fader(Front) 000000 000 Set-up of an inside in each slot switching as follows. SLOT1 (D22, D23=0,0) :  Soft-changing time, Soft-changing ON/OFF, Offset adjustment ON/OFF, Soft mute time → Set-up of an inside switching soon after LATCH condition.  Soft mute ON/OFF → After set up at Soft mute time, soft mute ‘ON ’ can work.  Fader (Front,Rear) → Set-up of an inside switching slowly at the time when it was set up by Soft- changing time (Fad) after LATCH condition. SLOT2 (D22, D23=0,1) : Set-up of an inside switching soon after LATCH condition. SLOT3 (D22, D23=1,0) : Set-up of an inside switching slowly at the time when it was set up by Soft-changing time (VOL) of Slot1 After LATCH condition. (When Soft-changing(VOL) of the slot 1 is off, A setup of an inside switching soon after LATCH condition.) SLOT4 (D22, D23=1,1) : Set-up of an inside switching slowly at the time when it was set up by Soft-changing time (TONE) of Slot1 After LATCH condition. (When Soft-changing (TONE) of the slot 1 is off, A setup of an inside switching soon after LATCH condition.) (note) Refer to the next page for Soft mute/Soft-changing (VOL, FAD, TONE) in detail.

Rev.1.00, Sep.04.2003, page 13 of 23 Soft-Changing This IC built in the Soft-changing circuit for reduce the step-noise when internal SW changing. By this function, Switching noise of no-signal and some signals can be reduced. At the Time of Volume and Fader Changing The Soft-changing of Volume and Fader can work as follows, (1) At the time of Soft-changing (VOL, FAD) ON (2) Volume : At the time of changing in the 1dB or 2dB step. Fader : At the time of changing in the 2dB step. (3) After the last Soft-changing (VOL, FAD) is completed. Soft-changing time (VOL, FAD) can be select for four kinds of the bottom table. (Ex.) volume 0dB Volume code -1dB input Soft-changing(VOL)=ON volume -1dB t t: Soft-changing time (You can changed by serial DATA.) Note) Serial DATA isn’t accepted during Soft-changing. Soft Switching Time (Vol) Time D0 D1 60ms 1 1 40ms 1 0 20ms 0 1 5ms 0 0 Soft Switching Time (Fad) Time D2 D3 100ms 1 1 80ms 1 0 60ms 0 1 40ms 0 0

Rev.1.00, Sep.04.2003, page 14 of 23 At the Time of Loudness, Bass, Treble and Non Fader Changing The Soft-changing of Loudness, Bass, Treble and Non Fader can work as follows, (1) At the time of Soft-changing (TONE) ON (2) At the time of step switching. (3) After the last Soft-changing (TONE) is completed. Soft-changing time (TONE) can be select for four kinds of the bottom table. (Ex.) Bass 0dB Bass code -6dB input Soft-changing(TONE)=ON Bass -6dB t t: Soft-changing time (You can changed by serial DATA.) Note) Serial DATA isn’t accepted during Soft-changing. Soft Switching Time (Tone) Time D4 D5 100ms 1 1 80ms 1 0 60ms 0 1 40ms 0 0

Rev.1.00, Sep.04.2003, page 15 of 23 Soft Mute This IC builds in the Soft Mute function for reduce pop-noise when Mute ON or OFF. because of pop noise decrease when MUTE/MUTE release moves. Soft Mute controlled directly with 15 pin (MUTE Pin) or can be controlled by Serial DATA. Soft Mute time can be changed by Serial DATA as for four kinds (0.5mS/10mS/30mS/80mS) . t:Soft MUTE time t:Soft MUTE time Soft MUTE start Soft MUTE release start. Soft MUTE Completion. Soft MUTE release completion. <Soft Mute function> It is Muting. 1. Soft Mute controlled by the MUTE pin (15pin). Soft Mute → ON: “L level → H level (at the rising edge)” Soft Mute → OFF: “H level → L level (at the falling edge)” MUTE pin (15pin) IC inside movement L Soft MUTE release L→ H Soft MUTE start H MUTE H → L Soft MUTE release start Note) Refer to (page 5) recommend conditions for the L/H threshold voltage. 2. Soft Mute controlled by Serial DATA. Soft Mute ON/OFF can be controlled by D11 of the slot 1 DATA input format (page 12).

Rev.1.00, Sep.04.2003, page 16 of 23 3. Relations between the MUTE pin (15pin) control and Serial DATA control. As for the Soft Mute ON/OFF, it is priority that the rising edge and the falling edge are inputted first 15pin control or Serial DATA control as the bottom figure.

  • Case1 : Mute ON/OFF controlled by 15pin.
  • Case2 : Mute ON/OFF controlled by Serial DATA.
  • Case3 : Mute starting is controlled by 15pin and Mute release is controlled by Serial DATA.
  • Case4 : Mute starting is controlled by Serial DATA and Mute release is controlled by 15pin. 15pin SLOT1 D11 Hold IC MUTE Release It is Muting. H L H L Hold Hold Hold Case1 Case2 Case3 Case4 <Set-up of an IC inside (how to control each) .> Data Transmission and Relation of the Soft-Changing Time This IC do not accept next DATA (LATCH condition) until the Soft-changing finished. (Transmission Slot 1, Slot 3 and Slot 4 of the DATA input format.) SLOT 3 LATCH condition SLOT 4 LATCH condition Serial DATA transmitting interval. : IT Soft-changing time : T Stereo system signal DATA CLOCK Soft-changing (VOL) started by the slot 3 DATA. The setting of the slot 3 is finished.. (Soft switching (VOL) completion.) D0 - D22 D23 D0 - D22 D23 (Note.1) (Note) The slot 4 DATA are ineffective as the upper figure. In to set the Serial DATA transmitting interval: IT from MCU (microcomputer) to M61523FP. Serial DATA transmitting interval : IT >Soft-changing time : T (The reading error of the DATA does not occur.)

Rev.1.00, Sep.04.2003, page 17 of 23 DATA transmitting example Serial DATA transmitting interval (IT) setting when Soft-changing time (VOL) = 20mS, (FAD) = 60mS, (TONE) = 60mS. DATA CLOCK SLOT1 LATCH condition D0 - D22 D23 SLOT2 LATCH condition D0 - D22 D23 (Note2.) IT(VOL) ≥26ms IT(TONE) ≥78msSetting of the Soft-changing time. (Note.2) SLOT3 LATCH condition D0 - D22 D23 SLOT4 LATCH condition D0 - D22 D23 SLOT1 LATCH condition D0 - D22 D23

11 Page reference

(Note2.) IT(FAD) ≥78ms Note1. Serial DATA transmitting interval (IT) =The interval of LATCH condition and LATCH condition. Note2. IT(FAD) = 60msec + (60msec X 30%), IT(VOL) = 20msec + (20msec X 30%), IT(TONE) = 60msec + (60msec X 30%)

Rev.1.00, Sep.04.2003, page 18 of 23 Slot1 Data Code Soft changing (TONE) D7 OFF ON Time D0 160ms 40ms 20ms 5ms Time D2 1100ms 80ms 60ms 40ms Time D4 1100ms 80ms 60ms 40ms Time D9 D10 180.0ms 30.0ms 10.0ms 0.5ms Soft changing (VOL,FAD) D6 OFF ON Offset adjustment OFF ON Soft MUTE D11 OFF ON ATT FRONT REAR D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 0dB -2dB 11010 -4dB 11001 -6dB 11000 -8dB 10111 -10dB 10110 -12dB 10101 -14dB 10100 -16dB 10011 -18dB 10010 -20dB 10001 -22dB 10000 -24dB 01111 -26dB 01110 -28dB 01101 -30dB 01100 -32dB 01011 -34dB 01010 -36dB 01001 -38dB 01000 -40dB 00111 -42dB 00110 -44dB 00101 -46dB 00100 -48dB 00011 -56dB 00010 -∞ dB 00001 00000 Soft-changing time (VOL) Soft-changing time (FAD) FADER Soft-changing time (TONE) Soft-changing (VOL,FAD) Soft-changing (TONE) Offset adjustment ON/OFF Soft MUTE time Soft MUTE ON/OFF *1 When soft changing is OFF, FADER changing of slot 1 and each setup of slot 3 and 4 can be switching without changing time. *2 When Offset adjustment is OFF, an adjustment result right before the front is maintained. *3 Soft changing circuit doesn’t work at FADER changing –48dB ←→ –56dB (Because changing step is beyond 2dB). Please refer page 13. Note.) Offset adjustment function is only a main-signal., the sub-signal isn’t built in.

  • It is initial setting when power supply turn on. Note) Don’t transmit designated outside data.

Rev.1.00, Sep.04.2003, page 19 of 23 Slot2 Data Code Selector Main Sub 0IN1 IN2 IN3 Differential input Gain Main Sub D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 10001 10000 01111 01110 01101 01100 01011 01010 01001 01000 00111 00110 00101 00100 00011 00010 00001 00000 +20dB +18dB +16dB +14dB +13dB +12dB +11dB +10dB +9dB +8dB +7dB +6dB +5dB +4dB +3dB +2dB +1dB 0dB f0 D18 D19 120Hz 80Hz 50Hz f0 D16 400Hz 800Hz f0 D17 8KHz 12KHz Q D20 D21 2.0 1.5 1.25 1.0 MUTE 011 010 001 000 Input gain control Input selector Loudness f0 Treble f0 Bass f0 Bass Q

  • It is initial setting when power supply turn on.

Rev.1.00, Sep.04.2003, page 20 of 23 Slot3 Data Code ATT D7 D8 D9 D10 D11 +6dB 10101 +5dB +4dB +3dB +2dB +1dB 0dB -1dB -2dB -3dB -4dB -5dB -6dB -7dB -8dB -9dB -10dB -11dB -12dB -13dB -14dB -15dB -16dB -17dB -18dB -19dB -20dB -21dB -22dB -23dB -24dB D12 D13 -25dB -26dB -27dB -28dB -29dB -30dB -31dB -32dB -33dB -34dB -35dB -36dB -37dB -38dB -39dB -40dB -41dB -42dB -43dB -44dB -45dB -46dB -47dB -48dB -49dB -50dB -51dB -52dB -53dB -54dB -55dB -56dB -57dB -58dB -59dB -60dB -61dB -62dB -63dB -64dB -65dB -66dB -67dB -68dB -69dB -70dB -71dB -72dB -73dB -74dB -75dB -76dB -77dB -78dB -79dB -80dB -∞ dB 1010110 1010101 1010100 1010011 1010010 1010001 1010000 1001111 1001110 1001101 1001100 1001011 1001010 1001001 1001000 1000111 1000110 1000101 1000100 1000011 1000010 1000001 1000000 0111111 0111110 0111101 0111100 0111011 0111010 0111001 0111000 0110111 0110110 0110101 0110100 0110011 0110010 0110001 0110000 0101111 0101110 0101101 0101100 ATT D7 D8 D9 D10 D11 01010 D12 D13 0101010 0101001 0101000 0100111 0100110 0100101 0100100 0100011 0100010 0100001 0100000 0011111 0011110 0011101 0011100 0011011 0011010 0011001 0011000 0010111 0010110 0010101 0010100 0010011 0010010 0010001 0010000 0001111 0001110 0001101 0001100 0001011 0001010 0001001 0001000 0000111 0000110 0000101 0000100 0000011 0000010 0000001 0000000 D0 D1 D2 D3 D4 D5 D6 D0 D1 D2 D3 D4 D5 D6 Rch Lch Rch Lch Volume

  • It is initial setting when power supply turn on.

Rev.1.00, Sep.04.2003, page 21 of 23 Slot4 Data Code Gv D0 D1 D2 D3 0dB 1111 -1dB 1 1 1 0 -2dB 1 1 0 1 -3dB 1 1 0 0 -4dB 1 0 1 1 -5dB 1 0 1 0 -6dB 1001 -7dB 1000 -8dB 0111 -9dB 0110 -10dB 0101 - 1 1 d B0100 - 1 2 d B0011 - 1 3 d B0010 - 1 4 d B0001 -15dB 0000 Gv D4 D5 D6 D7 +12dB 1110 + 1 0 d B1101 + 8 d B 1100 + 6 d B 1011 + 4 d B 1010 + 2 d B 1001 0dB 0000 -2dB 0001 -4dB 0010 -6dB 0011 -8dB 0100 - 1 0 d B0101 - 1 2 d B0110 Gv D8 D9 D10 D11 +16dB 1 0 0 0 +14dB 1 1 1 1 +12dB 1 1 1 0 +10dB 1 1 0 1 +8dB 1100 +6dB 1011 +4dB 1010 +2dB 1001 0dB 0000 -2dB 0001 -4dB 0 0 1 0 -6dB 0 0 1 1 -8dB 0 1 0 0 - 1 0 d B0101 -12dB 0110 -14dB 0111 Gv +12dB 11 1 0 +10dB 1 1 0 1 +8dB 11 0 0 +6dB 1 0 1 1 +4dB 10 1 0 +2dB 1 0 0 1 0dB 00 0 0 -2dB 0 0 0 1 -4dB 00 1 0 -6dB 0 0 1 1 -8dB 01 0 0 -10dB 0 1 0 1 -12dB 01 1 0 -∞ dB 0 11 1 D12 D13 D14 D15 D16 -14dB -16dB -18dB -20dB -22dB -24dB -26dB Loudness gain Treble gain Non FADER Bass gain

  • It is initial setting when power supply turn on.

Rev.1.00, Sep.04.2003, page 22 of 23 Application Example DATA CLOCK MCU 24INL1 INR1 INL2 INR2 INL3 INR3 DEFNL DEFPL DEFNR DEFPR 100µ 0.1µ VREF IN SUBLOUT SUBROUT NFROUT NFLOUT RROUT FROUT RLOUT MUTE FLOUT GNDVCC=9V 10µ2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ 2.2µ

Rev.1.00, Sep.04.2003, page 23 of 23 Detailed Diagram Of Package Outline SSOP24-P-300-0.80 Weight(g) JEDEC Code 0.2 Cu Alloy 24P2Q-A Plastic 24pin 300mil SSOP Symbol Min Nom Max A b c D E L y Dimension in Millimeters H E .30 .180 .010 .25 .57 .40 .271 .10 .81 .350 .20 .110 .35 .80 .87 .60 .251 .627 .20 .12 .450 .250 .210 .45 .18 .80 .10 −b2 − 0° 8° 0.5 e 24 13 121 HE E D e y F A A2 A1 L c e b2 Recommended Mount Pad Detail F −Z1 0.65 0.8 z Detail G z b G MMP

© 2003. Renesas Technology Corp., All rights reserved. Printed in Japan. Colophon 1.0 Keep safety first in your circuit designs! 1. Renesas Technology Corp. puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placem ent of substitutive, auxiliary circuits, (ii) use of nonflammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials 1. These materials are intended as a reference to assist our customers in the selection of the Renesas Technology Corp. product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Renesas Technology Corp. or a third party. 2. Renesas Technology Corp. assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. 3. All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Renesas Technology Corp. without notice due to product improvements or other reasons. It is therefore recommended that customers contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Renesas Technology Corp. assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Renesas Technology Corp. by various means, including the Renesas Tech nology Corp. Semiconductor home page (http://www.renesas.com). 4. When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Renesas Technology Corp. assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. 5. Renesas Technology Corp. semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Renesas Technology Corp. or an authorized Renesas Technology Corp. product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. 6. The prior written approval of Renesas Technology Corp. is necessary to reprint or reproduce in whole or in part these materials. 7. If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. An y diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. 8. Please contact Renesas Technology Corp. for further details on these materials or the products contained therein. Sales Strategic Planning Div. Nippon Bldg., 2-6-2, Ohte-machi, Chiyoda-ku, Tokyo 100-0004, Japan http://www.renesas.com Renesas Technology America, Inc. 450 Holger Way, San Jose, CA 95134-1368, U.S.A Renesas Technology Europe Limited. Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, United Kingdom Tel: <44> (1628) 585 100, Fax: <44> (1628) 585 900 Renesas Technology Europe GmbH Dornacher Str. 3, D-85622 Feldkirchen, Germany Tel: <49> (89) 380 70 0, Fax: <49> (89) 929 30 11 Renesas Technology Hong Kong Ltd. 7/F., North Tower, World Finance Centre, Harbour City, Canton Road, Hong Kong Tel: <852> 2265-6688, Fax: <852> 2375-6836 Renesas Technology Taiwan Co., Ltd. FL 10, #99, Fu-Hsing N. Rd., Taipei, Taiwan Renesas Technology (Shanghai) Co., Ltd. 26/F., Ruijin Building, No.205 Maoming Road (S), Shanghai 200020, China Renesas Technology Singapore Pte. Ltd. 1, Harbour Front Avenue, #06-10, Keppel Bay Tower, Singapore 098632 Tel: <65> 6213-0200, Fax: <65> 6278-8001 RENESAS SALES OFFICES