M52795SP

M52795SP RENESAS | Alldatasheet

Document overview

• Manufacturer or author: pROVIDED bY alldatasheet.com(free datasheet download site)
• PDF pages: 10

Technical content

Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 7tENESAS Renesas Technology Corp.

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with 12C BUS CONTROL

DESCRIPTION

The M52795 is AV switch semiconductor integrated circuit with PIN CONFIGURATION ( TOP VIEW ) 12C bus control . This IC contains 2-channels of 4-input audio switches and 2- channels of 4-input video switches. Each channel can be controled independently . voc Y (28]D5 The video switches contain amplifiers can be controled a gain of Loh 2 INE D4 VIDEO 2 IN [as]Lch T IN output dB or 6dB . Reh 2 INCE] ES]TUNER IN Leh 3 INCE] = {24] Rch T IN FEATURES VIDEO 3 IN [e] a fa]Lch 1 OUT Reh 3 IN] a f21V 1 OUT Video and stereo sound switches in one package Lch 4 ING] 3 [a] Reh 1 OUT *High separation (video switch ) Reh be W20UT SscLE] Rech 2 OUT sestesessseseeeee Crosstalk -60dB ( typ. ) at MHz SDALz] BIAS *Two types of packages are provided : SDIP with a lead pitch of DCE] CHIP SELECT 1.778mm ( M52795SP ) ; and SOP with a lead pitch of 1.27mm bok] GND (M52795FP ) . Outline 28P4B APPLICATION (Lead pitch :1.778mm) Video equipment PIN CONFIGURATION ( TOP VIEW ) RECOMMENDED OPERATING CONDITION Supply voltage 4.7V~9.3V vec Jo La] ps Lech 2 IN D4 Rated supply voltage 5V,9V VIDEO 2 INE Ee] ich T IN Maximum output current 32mA(at 9V) Reh 2 IN Fe] [25] TUNER IN Leh 3 INCe4 z [24] Rch T IN VIDEO 3 IN [2] ig ls] Lch 1 OUT Reh 3 IN] a [22] V 1 OUT Leh 4 INE] 3 Reh 1 OUT VIDEO 4 IN [oJ vU [20] Lch 2 OUT Reh 4 IN Ceo} fs] V 2 OUT SCL Reh 2 OUT SDA BIAS DCL] CHIP SELECT DDL4} GND Outline 28P2W-A (Lead pitch :1.27mm) 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL BLOCK DIAGRAM vec TUNER IN 5. Ge) ©) VIDEO2IN, EAST pea VIDEO 3 IN Qs —ttHH18 x L122) Vi out VIDEO 4 IN ST

2 Lr) V2 OUT

Se, a . 3 5 gap ort Re OTH Brae iro} +) Rich 1 OUT O ich rin 6) O © — Reh 2 OUT Leh 2 IN . a oo L-MODE1 °@—— tT 180 9 re on [28-o} L+€9 ch 2 OUT BIAS (12) SDA 4% @+|_ BIAS °C Control b (11) SCL 5) 6466+ GND Le = 2 © CHIP SELECT DC DD D4 D5 stENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL DESCRIPTION OF PIN a 2 | Leh2IN 47V Reh 2 IN € > 4 c oe © t 5 |Leh3IN = gi 4 7 | Rch3IN I 8 | Leh4IN Wy 10 | Rch4iN O) o 24 | Reh TIN ta ne 26 | Leh TIN 3 | VIDEO 2IN 9 © of cc 3.6V Clamp in 6 | VIDEOSIN t <i 9 | VIDEO 4IN [ f 25 | TUNER IN + 1) 1) Ca Th SCL = ViL max.=1.5V pe na VIH min.=3.0V YO ®W | “ ! “MM a ras e Vit max.=1.5V L ViH min.=3.0V Om YF VoL max.=0.4V : (at lin=3mA) 13 bc a a VoL max.=0.4V 1a |p ONO) (at lin=1mA) 27 (| p4 a 28 | Ds K © ztENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL DESCRIPTION OF PIN (cont.)

15 GND

16 CHIP

? 2,5V~Vec----92H aS 2 70K = 30K Th ooh 7 BIAS 4.2 xl iz 3 30K ans W ¥ 18 Reh 2 OUT 4.0V 20 |Lch 20UT be bid Bd Pas + 21 |Rch 1 OUT © OY ® SK . 23. |Lch 1 OUT N ¢ rt its =1.5Ke 1.51 215 Tt In V2OUT SYNC CHIP Eos =2. V10UT vd 2 Do=2.2V + ®D eit? Wer 7 @ 5K 5K { ™ { (Om) kK 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL C BUS 1?C BUS(Inter IC BUS)is multi master bus system developed by PHILIPS . Two wires ( SDA - serial data, SCL - serial clock ) realize functions of start , stop , transferring data , synchronization and arbitration. The output stages of device connected to the bus must have an open drain or open collector in order to perform the wired-AND function . SDA iyi oe i] i pda A Ail: if mse SB MSBSC«SBSC; SCL tot tot is! iP! “4 29 3 4 5 6 7 8 9 1 2 gon S; Start condition, a high to low transition of the SDA line while SCL is high P; Stop condition, a low to high transition of the SDA line while SCL is high A: Acknownledae Every byte put on the SDA line must be 8-bits long . Each byte has to be followed by an acknowledge bit. Data is transferred with the most significant bit (MSB ) first. The data on the SDA line must be stable during the HIGH period of the clock . The HIGH or LOW state of the data line can only change when the clock signal on the SCL line is LOW . CONTROL This IC controls 2-channel switchs with 2-byte data (DATA1 and DATA2 ). SW1 is controled by DATA1, SW2 is controled bv DATA2 . SLAVE appRESs| A | paTat] A [DATA2 | a | P | S: Start A: Acknowledge P: Stop SLAVE ADDRESS RW bit Usually * 0° ( W : Master transmitter transmits to slave BOGHODECHc2 t_ Possible to select 16PIN Hi:1,Lo0:0 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795S P/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL Data byte format M52795 FUNCTION TABLE is [SLAVEADDRESS TA DATA(D7~D0) TAT DATA(DF~D8) JA TP) SLAVE ADDRESS | SLAVE ADDRESS aS ae | | | OY | DATA1(D7~D0) CONT DATA D7 [oe_ fs aos er oF CONT AUDIO MODE [vo Wo vawprs [OT SwicontT VIDEO SW1 CONT OUT1 AMP GAIN CONT. DATA DATA V-SW1 D3 D1 Cs ofods gf TIN, 1 a) | yf V3IN iL__i}v4in__] AUDIO MODE1 CONT DATA VO CONT. D7 a DATA gf Of MUTE DS [osour [ba [4 ouT | 0 a) | Os | yt qto to aT NORMAL] AUDIO SW1 CONT MODE [MUTE RR NORMAL DATA D1 [do tch OUT 1 [Ach OUT 4 [Lch OUT 4 [ Reh OUT 1 [Lch OUT 1 [Ach OUT 4[Lch OUT 4 | Reh OUT 1] of of MUTE [MUTE [Reh TIN [Reh TIN [tchTIN [ichTIN [UchTIN [Reh TIN | of Mute [Mure [Rch2 IN [Reh2iN_ [ich2IN [ich2IN [tch2IN_ [Rch2iN_ | yo of MuTE [MUTE [Rch3 IN [Rch3IN [tch3iN_ [tch3iN_ [ich3IN_ [Rch3IN | Yo fMuTe [Mure [Reha iN [Rch4iN [tch4in [tch4in [tch4in [Rch4in | DATA2(DF~D8) CONT, DATA DF [DE DD oc OB DA fog is CONT AUDIO MODE [vo vo vamp2 [OT Sw2contT VIDEO Sw2 CONT QUT2 AMP GAIN CONT. DATA DATA [AMP] V-SW2 DB D9 a ofods gf OT IN 1 yo V3IN ivan ‘| AUDIO MODE CONT DATA. VO CONT. DF Ss DATA gf of MUTE DD a) | | yo tt to Tt fT NORMAL] AUDIO SW2 CONT MODE [MUTE RR NORMAL) DATA D9 [ds tch OUT 2 [Ach OUT 2 [Lch OUT 2 [ Reh OUT 2] Loh OUT 2 [Ach OUT 2[Lch OUT 2 | Reh OUT 2] gf Of MUTE [MUTE [RchTIN [RchTIN [tchTIN [tchTIN [UchTIN [RchTIN | gf MUTE [MUTE [Rch2 IN [Reh2IN_ [ich2IN_ [ich2IN_ [Uch2iN_ [Reh2iN_ | qf of MUTE [MUTE [Rch3 IN [Reh3IN_[tch3IN [ich3IN_ [tch3IN_ [Rch3IN_ | YO fMuTe [Mure [Reh 4 IN [Rch4 iN [tch4in [ich4in [ich4in [Ach 4in | 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with 12C BUS CONTROL ELECTRICAL CHARACTERISTICS (Ta=25°C,Vcc=9V,unless otherwise noted) [rameter fmbsl Tenn ‘|i [Tm wan | Ut Supply voltage Vec 47 : 9.3 Vv Vec=9V,Vin=0Vp-p,Ri=0Q . 32 42 Circuit t lec A moun cuter Vec=5V, Vin=0Vp-p, Roo | - | 2 | 37 |™ f=100kHz,1Vp-p (0dB)(T >Vi0uT) -0.5 0.5 it G Voltage gain f=100kHz,1Vp-p (6dB)(T>V10ur) 5.5 6.5 Frequency : f=10MHz/100kHz,1Vp-p (0dB)(T> Viout) |-20 | 0 | 20 | ‘a characteristics f=10MHz/100kHz,1Vp-p (6dB)(T» ViouT) -2.0 2.0 Vec=9V(0dB)(T +Vi0uT) f=100kHz 4 - Dynamic Range D Maximum with Vp-p Vec=5V(0dB)(T >V10uT) distortion<1.0% 2 Input impedance Ziv {Clamp in(T,V2,V3,V4) - kQ Crosstalk f=1MHz,1Vp-p T*Viour (at V2 mode) |_- | -6o | -54 | «8 | f=1kHz ,1Vp-p (Vcc9V)(Rt»Ri0uT) 0.5 0] 05 i G dB Voltage gain f=1kHz ,1Vp-p (Vec5V)(RrRiour) 05 o| 05 Frequency characteristics | F | £=100kHz/1kHz , 1Vp-p(RTRiouT) -2.0 0 | 1.0 | dB Total harmonic distortion} THD | f=1kHz,2Vp-p,at 400HZHPF+30kHzLPF - 0.01 | 0.05 | % (Rt® Riou) Dynamic Range D f=1kHz ,Maximum with distortion<0.5% 5.5 6.0 = Vp-p (Rt»Riout) [Output DC offset voltage] VorF | (MODE:Rt,Re,R3,R4> Riou ) -20 0 20 mv Input impedance Zi (Rt,R2,R3,R4,L1,L2,L3,L4 ) 22 30 38 kQ Crosstalk CT | 1kHz,1Vp-p Rr>Riour(at Re mode) - -90 | -84 dB 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL ELECTRICAL CHARACTERISTICS (Ta=25°C, Vcc=9V,unless otherwise noted) [Parameter [Smo] Tosteonton | wn | Tn. woe] Ut l2C BUS CONTROL SIGNAL Nox rourinvotae [VA] ———*dt so - [so] Min. input iow votage Meu fof oo | = fits |v Low level output voltage(SDA) VoL SDA= 3mA 0.0 0.4 High level input current IIH SDA, SCL = 4.5V +10 10 " b Low level input current Tit SDA,SCL = 0.4V -10 10 SCL clock frequency fscL 0.0 100 | kHz Tit f bi t be free bef anew transmission canstart tBUF 47 Hold time at start condition tHD;STA\\ 4.0 The low period of the clock tLow 47 us The high period of the clock tHIGH 4.0 Setup time for start condition |tSU;STA 47 Hold time DATA tHD;DAT| 5.0 Setup time DATA tsu;DAT| 250 _ n Rise time of both SDA and SCL line] tR - Fall time of both SDA and SCL line | tF 300 Setup time for stop condition tSU;STO - uS ?C BUS CONTROL SIGNAL ee ai ** * oe Tf pte tHDISTA 7 iB) LS}R WOW’ Hoar “wot ugar SYST wee | tHD;STA 2ENESAS AUG.'98

PRELIMINARY MITSUBISHI ICs (AV COMMON) Notice. This is not a final specification. M52795SP/FP Some parametric limits are subject to change. AV SWITCH with l2C BUS CONTROL Application Circuit Example 0.01p YH 100p 10K vec DB G) vec D5@9 AWD | § top 08 inj - 85>(2) Leh 2 IN p4@? WD) 9 tJ 75 - y 0.47 10p fs] Sg 5) VIDEO 2 IN Leh T IN@Q-<‘s Q 10p 0.47 2 > 8>(4) Ach 2 IN TUNER IN B< ii 1p toy ® 3 z 8) Lch 3 IN = Reh T IN @4)<"8 F 2 qo, 047 Ol 9 yo (6) VIDEO 3 IN N Leh 1 OUT @9 > 2 10 ice) . r (7) Reh 3 IN on V10UT@9 AW} E (dp) 75S 2 10p y fo) z =>(8) Lch 4 IN U Reh 1 0UT@? +n > 4 75 fa) hy 0.47 4 i S01 8) VIDEO 4 IN Lh 2 OUT @) > 10 4 z Law») SCL Reh 2 OUT (8) *N > ing BV <r, 220 toy = tw») SDA BIASG)—8—# 10K

2 OW-«< G3 Dc CHIP SELECT (1 slave address Change(VCC/GND)

¢ 10K x " ° Ow @4 DD GND @® Note how to use this IC Input signal with sufficient low impedance to input terminal. The capacitance of output terminal as small as possible. Set the capacitance between Vcc and GND near the pins if possible. Assign an area as large as possible for grounding. Power-on Reset The M52795 has an intermal power-on reset function that sets each control r egister to "0" during IC power ON. The power-on reset VTH has 2.5V. 7tENESAS AUG.'98