M52769FP RENESAS | Alldatasheet

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Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 7tENESAS Renesas Technology Corp.

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF

DESCRIPTION

M52769FP is a semiconductor integrated circuit consisting of VIF/SIF signal processing for CTVs and VCRs. M52769FP corresponds to FM radio and provide low cost and high performance system with the coil-less AFT.

FEATURES

MFM radio receiving is available without FM radio IC and external filter WM Built-in FM radio carrier indicator MCoil-less AFT. Mi The PLL-SPLIT system provides good sound sensitivity and reduces buzz. Video output is 2.0Vp-p through EQAMP. MBuilt-in QIF AGC. Hi lmprove over modulation characteristics and Vcc ripple rejection. RECOMMENDED OPERATING CONDITIONS Supply Voltage Range (Vcc)* + * ***+*+475 to 525V Rated Supply Voltage (Vcc) ** 2 22222 50V APPLICATION TV,VIR PIN CONFIGURATION (TOP VIEW) RF AGC DELAY L1_| O SIF CARRIER DET LEVEL AFT OUT APC FILTER RF AGC OUT VIDEO QUT Nc La] = NTSC / OTHER SW VIF IN [5 | RS Vec MFIN Le | N Vec GND 2 [ae ] VCO COIL GND [ | Tr VCO COIL SIFIN [9 | U SIF CARRIER DET OUT IF AGC FILTER / FM RADIO QIF OUT FM DET COIL AF FILTER AUDIO OUT LIMITER IN 24pin SSOP 2tENESAS 1

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF BLOCK DIAGRAM and PERIPHERAL CIRCUIT Veco 5V ara s > VCO COIL 2 3 5549 Seer Ei i if O | i So z jo ar we [}[oIF DET = : a x —a [SIF AWP SIF AW S 1P1 yw S TPS by f 7 25 ¥ 8 3 | [™

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x > 5923 8 5V rm ¥ wh ah stENESAS 2

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF ABSOLUTE MAXIMUM RATINGS (Ta = 25°C, unless otherwise noted ) Supply Voltage 1 Vee Vv Power Consumption 1190 mW Operating 6 Temperature Topr -20 to +75 c Storage 6 Temperature Characteristics ( maximum ratings ) = Mounting in standard circuit board = re ee 2 714 Ss 750 > | see ee ee ® 500 — a | | | | fe) a @ 250 2 0 a -20 0 25 50 75 100 125 150 Ambient temperature Ta(°C) 2tENESAS 3

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF ELECTRICAL CHARACTERISTICS (Vcc=5V,Ta=25°C unless otherwise noted) JV Mode Measurement condition Test |Test Input britches sett Limits ; Parameter — | Symbol[cireuit | point SG to¥eL position 1 unless Unit |Note otherwise noted TYP | MAX 1 | Veo=5v ect] 1 | A | i | sot sige? 30 | 43 | 56 | mA Video Output 2 /pc Voltage 1 V22 1 | TP22A SW10=2 3.2/3.5 |3.8] V Video Output VIF 3 | Voltage 1 1 | TP22A) jy | SG1 1.8) 2.1 | 2.4] Vp-p ; Video f+ | wonosn PSRe| oe] [sce|—[- | onane [si] 6 | [oe | + Video g Input VIN VIF | Sensitivity MIN 1 | TP22A) IN SG4 48 | 52 3 Maximum Allowable | VIN VIF 7 | Input Max] 1 |1P22A] jy | SG5 101/105 dBu | 4 AGC Control Range Input GR 50 | 57 VIF IF AGC Voltage | Vi0) 14 TP10 IN SG6 2.9/3.2 |3.5] y Maximum IF AGC} Minimum IF AGC VIF Maximum RF VIF 12 | acc Voltage | V3H| 1 | TP3| |, | SG6 4.2|4.7 Vv Minimum RF VIF 13 | acc Voltage | V3L | 1 | TP3] jy | SG7 01/05] v RF AGC VIF 14 | Delay Point v3 | 1 | TP3| i | S68 swi=1 92 | 95 | dBy Capture Ri Capture Range VIF 16 L CL-L| 4 TP22A| IN SG9 1.8 | 2.4 MHz Capture Range 17 T CL-T 3.4) 4.4 MHz BET Senslthy: Fa [i [ee] lot -|-| fan | 25 | 70 |x| 0 | AFT Maximum VIE 19 | Voltage V2H TP2 IN SG10 3.85/4.15 Vv 10 AFT Minimum VIF 20 | voltage v2L | 1 TP2 IN $G10 0.7/1.2] v | 10 ztENESAS 4

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Measurement_condition Test |Test Input 3, to posi imits . NO} Parameter | Symbolcircuit | point SG Siro vial ness mere ote Fan | rye | max] Note Inter VIF Vari- Differential VIF Phase IN Syne. tip v22 VIF 24 evel sYNcl 41 |TP22A| IN SG2 0.85/1.15]1.45) v VIF Input capacitance ztENESAS 5

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Measurement condition mi rest | Test inp [BEE ewches eet to SUL ; NO| Parameter —|Symbal) oo it | point SG position 1 unless Unit|Note QIF Output VIF IN | SG2 QIF Output VIF IN | SG2 Voltage 2 ove] + for em fSSe]—|—| [om » [rea foe | | AF Output LIM imVrms 28 (4.5MHz) MoAry 1 [tet IN sof-|-| | 300 | 430 | 615 AFOutput Distortion | THD LIM 5 30 | @.5MHz) ari | 1 |TP12] jy [SSS 0.2 |1.0] % Limiting Sensitivit AM Rejection LIM 32] (4.5MHz) AMR1] 1 |TP12 in. |SCt? 40 13 AF SIN AF LIM 33] @.smHz) |sint| ' /TP12) ,y |SGI9 53 14 SIF Input 34] Resistor RINS}| 2 | TP9 15 ka SIF Input FM Radio Mode Measurement condition Test | Test | I Input | Sov itches sett ; | NO] Parameter — [symbol | O77 | point yea es eet pation 1 unless Unit|Note otherwise noted TYP | MAX SIF detection out SIF 33 | “Lowvatage | 164 TP16| jy | SG20 SW10=2 0.2 }1.0] Vv SIF detection TSIF SIF 34 | Threshold Point 1 |TPI6| yy | $G21 SW10=2 dBu | 15 RF AGC SIF SW1=2 35) Delay Pont | YF] 1 | TP3 | iy sea 0 | —| swio=2 dBy | 16 ztENESAS 6

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Measuring Circuit Diagram1 BPF swig “f

1 Veco=5V Kk ==

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R CF ° Isw - an z 5549 hin 2 i, | rn | wl oe x i i o SWi3 s 2 i i TPI6 PH wd “ I é i oy ~ LIM AMP. Radio [LIM AMP] adap VIDEO Cl DET rap | i — Ty a | [SIF AMP] sr ave C) ee | Sf as Fs hy eS, Va coy CoN \\ Pi a es C2) 43 4 £5) 16 78 9 10 11) 12} We | o NC ad oat rg porn - rc) & f i Oo H 6 x ° H H 3} N is we 5V S1E (1) sar J 2. ~ SV A> J. Fw aet coil mid OY 3 5 dr > 5923 B tp SIF IN swio, Vor — apa jm ¥ VIF IN ft ~ I, ve * All capacitor is 0.01uF, unless otherwise noted. * The Measuring Circuit 1 is Mitsubishi standard evaluation fixture. 2tENESAS 7

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Measuring Circuit Diagram2 (24 2323 21 20-18 18) 17) 16) 18-14) 113) Radio [Lim Amp] [at 1 S < VIDEO 7 DET = . Ss TV [| SIF AMP | Sr ANP roi fet hom fel tt @Lo meter @Lo meter * All capacitor is 0.01uF, unless otherwise noted. 7tENESAS 8

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF INPUT SIGNAL | 6 | fo-58.75MHz 80dBy Ow |_@ | fo-3.75MHz LevelVariable Cw | 9 | fo=FrequencyVariable AM20KHz 77.8% 90dBy BE ee 11 f2=55.17MHz 80dBu Cw Mixed Signal £3=54.25MHz_ 80 dBu Cw Sync Tip Level 90 dBu ztENESAS 9

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Notes 1. Video S/N Input SG2 into VIF IN and measure the video out(Pin 22) noise in r.m.s at TP22-B through a SMHz (-3dB) L.P.F. 0.7XVo det SIN=20 log (22xvesee (a8) NOISE 2. Video Band width: BW 1. Measure the 1MHz component level of Video output TP22A with a spectrum analyzer when SG3(f2=57.75MHZz) is input into VF IN. At that time, measure the voltage at TP10 with SW10, set to position 2, and then fix V10 at that voltage. 2. Reduce f2 and measure the value of (f2-f1) when the (f2-f1) component level reaches -3dB from the 1MHz component level as shown below. TP22 \\ | i | ! (f2-f1)

1 MHz BW

  1. Input Sensitivity: VIN MIN Input SG4 (Vi=90dBy) into VIF IN , and then gradually reduce Vi and measure the input level when the 20KHz component of Video output TP22A reaches -3dB from Vo det level. 4. Maximum Allowable Input: VN MAX 1. Input SG5 (Vi=90dBuy) into VIF IN , and measure the level of the 20KHz component of Video output. 2. Gradually increase the Vi of SG and measure the input level when the output reaches -3dB. 2tENESAS 10

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF 5. AGC Control Range: GR GR=VIN MAX -VIN MIN — (dB) 6. RF AGC Operating Voltage: V3 Input SG8 into VIF IN and gradually reduce Vi and then measure the input level when RF AGC output TP3 reaches 1/2 VCC, as shown below. TP3 Voltage V2VCC VaL Vi Vi(dBu) 7. Capture range: CL-U 1. Increase the frequency of SG9 until the VCO is out of locked-oscillation. 2. Decrease the frequency of SG9 and measure the frequency fU when the VCO locks. CL - U= fU - 58.75 (MHz) 8. Capture range: CL -L 1. Decrease the frequency of SG9 until the VCO is out of locked-oscillation. 2. Increase the frequency of SG9 and measure the frequency fL when the VCO locks. CL -L = 58.75 - fL (MHz) 9. Capture range: CL- T CL-T=CL-U+CL-L (MHz) 2tENESAS 4

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF 10. AFT sensitivity u, Maximum AFT voltage V2H, Minimum AFT voltage V2L 1. Input SG10 into VIF IN, and set the frequency of SG10 so that the voltage of AFT output TP2 is 3V. This frequency is named f(3). 2. Set the frequency of SG10 so that the AFT output voltage is 2V. This frequency is named f(2) 3. IN the graph, maximum and minimum DC voltage is V2H and V2L, respectively. TP2 Voltage i y= —1000_(m (mV/ kHz) Va | f(2) - (8) (KHz) whet es | H | i Vat (3) (2) f(MHz) 11. Inter modulation: IM 1. Input SG11 into VIF IN, and measure EQ output TP22A with an oscilloscope. 2. Adjust AGC filter voltage V10 so that the minimum DC level of the output waveform is 1.0V. 3. Atthis time, measure TP22A with a spectrum analyzer . The inter modulation is defined as a difference between 0.92MHz and 3.58 MHz frequency components. 7tENESAS 12

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF 12. Limiting Sensitivity: LIM 1. Input SG16 (Vi=90dBuy) into SIF IN, and measure the 400Hz component level of AF output TP12. 2. Lower the input level of SG16, and measure the level of SG16 when the VoAF level reaches -3dB. a ! -3dB Audio output i [mVrms] i , ' ' 1 I 1 1 ' ! LIM 90 Input lev el [Bu] 13. AM Rejection: AMR 1. Input SG17 into SIF IN, and measure the output level of AF OUT (TP 12). This level is named VAM. 2. AMR is; AMR = 20log ( VoAF (mVr.m.s) ) VAM (mVr.m.s) (dB) 14. AF SIN: AF S/N 1. Input SG19 into SIF IN, and measure the output noise level of AF OUT (TP 12). This level is named VN. 2. SINis; VoAETinV SIN = 20I0g (vost inves _} VN (mVr.m.s) (dB) 2tENESAS 13

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF 15. SIF detection threshold level TSIF $G21 is applied to SIF IN and the input amplitude is swept. Then, the level of SG21, TSIF, is measured atthe time when the DC voltage of SIF CARRIER DET OUT (TP16) has just begun to vary. 16. RF AGC voltage V3F $G21 is applied to SIF IN and the input amplitude is swept. Then, the level of SG21, V3F, is measured at the time when the DC voltage of RF AGC OUT (TP3) has just reached 1/2Vcc. 17. AF S/N (S/N F) 1. SG19 is applied to SIF IN and the output noise of AUDIO OUT (TP12) is measured. The measured noise is named VNF. 2. SINF is, SIN F = 20log f YOR Imvr.m.s] ) [dB] VNF [mVr.m.s] 2tENESAS 14

MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF VCO coil adjustment methods 1. Input SG2 (fo=58.75MHz, 90dBy CW) into VIF IN. 2. And adjust the coil until the voltage of AFT output reaches about Vec/2=2.5V. FM DET coil adjustment methods 1. The first thing, adjust the VCO coil. 2. Input SG13 (fo=54.25MHz, 95dBuy CW) into SIF IN. 3. Change the switch of SW13 and SW15 to 2 position. 4. Change to FM RADIO mode (V10=0V). 5. Adjust the DC voltage of AFT OUT to Vec/2 and SIF det OUT to Low (under 1V). ztENESAS 15

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MITSUBISHI ICs (TV) M52769FP PLL-SPLIT VIF/SIF Keep safety first in your circuit designs! ®@Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your drcuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ji) use of non- flammable material or (iii) prevention against any malfiinction or mishap. Notes regarding these materials @These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the aistomer’s application; they do not convey any license under any intellectual property tights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party's tights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. @Al] information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Mitsubishi Electric Corporation by various means, induding the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com). @\\When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total systern before making a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. ®@Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. @The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. lf these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. @Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein. ztENESAS 17