M52767FP

M52767FP RENESAS | Alldatasheet

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Technical content

Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 7tENESAS Renesas Technology Corp.

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF

DESCRIPTION

M52767FP is a semiconductor integrated circuit consisting of VIF/SIF signal processing for CTVs and VCRs. M52767FP provide low cost and high performance system with the coil-less AFT.

FEATURES

HCoil-less AFT. MPLL FM demodulation for Audio. No external parts and adjustment. MThe PLL-SPLIT system provides good sound sensitivity and reduces buzz. WVideo output is 1.3Vp-p through EQ AMP. MEasy to add Buzz canceler. WHi speed IF AGC. MBuilt-in QIF AGC. Milmprove over modulation characteristics and Vcc ripple rejection. RECOMMENDED OPERATING CONDITIONS Supply Voltage Range (Vec)********47 to53V Rated Supply Voltage (Vcc) > * * ** 222 50V APPLICATION TV,VTR PIN CONFIGURATION (TOP VIEW) EQ OUT EQF/B Vreg.OUT IF AGC FILTER APC FILTER = RF AGC DELAY EQ IN MIF IN Gc] 9 Vec No 20 1 VIF IN veocoi Ls} NN GND VCO COIL sat AFT OUT IFAGCFILTER L8| oT] RF AGC OUT vpeooutls| U QIF DET IN air out L1] NFB GND AUDIO OUT LIMITER IN QIF AGC FILTER 24pin SSOP rRENESAS 1

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF BLOCK DIAGRAM and PERIPHERAL CIRCUIT IF "? RF AGC |_4 f Delay ‘St veo LL son RF AGC an os Ao our Tt zal bs] ea) ba] olla] tz] te) ns] ral [| RF AGC | | Le AMP a ieee a i} [2] [s} la} is) Ie} [zl [sl fa} toatl Vreg. af Vee [ — 7 il a: EQ OUT OUT + i a i T 7 h = MIDEO OUT 4.5MHzB.P.F. 4.5MHz Trap ztENESAS 2

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF ABSOLUTE MAXIMUM RATINGS (Ta = 25°C, unless otherwise noted ) Supply Voltage 1 Veo Vv Power Consumption 1190 mW Operating 0 Temperature Topr “20 to +75 c Storage 6 Temperature Characteristics ( maximum ratings ) = Mounting in standard circuit board ro Z lm | | S 750 > _| : ee eee fo) aa se) toy a — I wm 250 me = 0 md -20 i} 25 50 75 100 125 150 Ambient temperature Ta(°C) 2tENESAS 3

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF

ELECTRICAL CHARACTERISTICS

VIF Section (Vec=5V,Ta=25°C unless otherwise noted) No.| Parameter ymbo! Test Test Input Input switches set to position 1 Unit |Note Circuit] Point |Point] SG | iniess otherwise noted TYP | MAX Circuit Current 1 1 lWee=8v leet A SW5=2 36 54 | mA Vreg. 2 |output Voltage | Vreg.| 1 | 1P2 3.2 | 3.5 v Video Output ja Merges ws | 1 | ws |e [sor] oat] 06 [ore en | Video Output VIF 5 |Video SIN Video! 4 | wie | VF | gop swi=2 51 1 S/N IN Video Band Width} sw | 1 | 1a | VIF | ggg | SwW8=2 7.0 2 IN V8=Variable ei VIN VIF Maximum Allowable | VIN VIF AGC Control Range Input GR 62 5 we [sce] fas fan foe |v | VIF 11. |IF AGC Voltage 2) V23 1 TP23 IN SG6 28/31/34] Vv we ry pws} far dar] = fy | Minimum RF AGC VIF RF AGC 1 VIF 92 6 "4 |Delay Point bad rir | in |S ee ztENESAS 4

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF No.| Parameter [Symbol ue it ree ae switches set to position 1 Unit Note ICU Soin unless otherwise noted TYP | MAX se arr Sensitivity Tes sei || | my a | ag |AFT Maximum =| vigh | 4 |tPis | VIF | soto 3.85 | 4.15 v | 10 Voltage IN 20 [AFT Minimum =| age | 1 |rpig | YF | soto 07/12] v | 40 Voltage IN AFT VIF VIF =. 23 | Differential pe | 1 Iria | SF | sor 2 Gain IN Differential VIF 25 |s : vi VIF yne. tiplevel | ovyg| 1 |TPIA in | 82 11)14) Vv ztENESAS 5

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF SIF Section (Vec=5V,Ta=25°C unless otherwise noted) Test |Tes | Input | Input itIN : F iti lote Parameter |Symbol Circuit| Point | Point| sq _ | sM#tshessetto postion 1 jan [ve | max |" unless otherwise noted QIF Output VIF IN) SG2 IFA 1 | TP10 s|OR ce i fort | + [ren | QIF IN| SG13 [| 00 |e ese || QIF Output VIF IN) SG2 SIF Detection VIF AF Output VoAF SIF SG16 (4.5MHz) owe Ts frm) SF [sate] | eo | cn |rcnfoone | Eton THD AFOutput Distortion SIF Limiting Sensitivity LIM SIF 32 |AM Rejection AMR tia | SIF | seis 62 13 (4.5MHz) 1 IN 33 |AF SIN (4.5MHz) | AF | 4 |tpta| SIF | seta 62 14 SIN 1 IN 2tENESAS 6

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF Measuring Circuit Diagram VIF IN 5 Vee. SIF IN Vge I T [ Y LL 150K= 7 T = mf TPIBO 51 fe TP23, [oan 150K O.tu ° JOS TP17 ; q T 24k 27 7 Oo == Ke 7.5K O.tu 20] eteam | = I [tr ac | | QIF AMP ee AMP VIDEO QIF AGC DET LAT ] Lair DET] ees a it} [2] 3) tals} le] [7] [8iapglo} tol a] bra] thal he e7] [+ L 1S o2 S, 33u veo 51 7 15u COIL ve

5 TP2 W330 TP9

TPIA |. amid © +S 620 LIM IN ma 4.5MHz Trap sWw5 1, 7 O Vee pe) SL Note 1) All the capacitors are 0.01uF, unless otherwise noted. 2) The Measuring Circuit is Mitsubishi standard evaluation fixture. 7tENESAS 7

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF INPUT SIGNAL f2 = Frequency Variable 70 dBu Cw fe | for 45.75MHe sodbuow Ps | =45 75h ow Levlvanabe Lo | fo=Frequency Variable AM20KH= 77.8% 90aBu | | BAGS BRE } wore 11 f2=42.17MHz 80dBu Cw Mixed Signal f3 = 41.25MHz 80dBu Cw Syne Tip Level 90 dBu 7tENESAS 8

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF Notes 1. Video S/N Input SG2 to VIF IN and measure the video out(Pin 1) noise in r.m.s at TP1B through a 5MHz (-3dB) L.P.F. SiN=20 | ( 0.7Vo det ) NOISE [dB] 2. Video Band Width: BW 1. Measure the 1MHz component level of Video output TP1A with a spectrum analyzer when SG3(f2=44.75MHz) is input to VIF IN. At that time, measure the voltage at TP8 with SW8, set to position 2, and then fix V8 at that voltage. 2. Reduce f2 and measure the value of (f2-f1) when the (f2-f1) component level reaches -3dB from the 1MHz component level as shown below. TPIA (f2 - f1 )

1 MHz BW

3._Input Sensitivity: VIN MIN Input SG4 (V=90dBy) to VIF IN, and then gradually reduce Vi and measure the input level when the 20KHz component of Video output TP1A reaches - 3dB from Vo det level. 4. Maximum Allowable Input: VIN MAX 1. Input SG5 (Vi=90dBy) to VIF IN , and measure the level of the 20KHz component of Video output. 2. Gradually increase the Vi of SG and measure the input level when the output reaches -3dB. 2tENESAS 9

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF 5. AGC Control Range: GR GR=VIN MAX -VIN MIN [dB] 6. RF AGC Operating Voltage: V17 Input SG8 to VIF IN and gradually reduce Vi and then measure the input level when RF AGC output TP17 reaches 1/2 VCC, as shown below. TP17 Voltage} 1/2VCC. Viz Vi Vi(dBu) 7. Capture range: CL -U 1. Increase the frequency of SG9 until the VCO is out of locked-oscillation. 2. And decrease the frequency of SG9 and measure the frequency fU when the VCO is locked. CL - U= fU - 45.75 [MHz] 8. Capture range: CL -L 1. Decrease the frequency of SG9 until the VCO is out of locked-oscillation. 2. And increase the frequency of SG9 and measure the frequency fL when the VCO is locked. CL-L= 45.75 -fL [MHz] 9. Capture range: CL -T CL-T=CL-U+CL-L [MHz] 2tENESAS 10

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF 10. AFT sensitivity y, Maximum AFT voltage V1isH_, Minimum AFT voltage Vis. 1. Input SG10 to VIF IN , and set the frequency of SG10 so that the voltage of AFT output TP18 is 3[V] . This frequency is named f(3). 2. Set the frequency of SG10 so that the AFT output voltage is 2[V]. This frequency is named f(2) 3. IN the graph, maximum and minimum DC voltage are V18H and Vi8L, respectively. TP18 Voltage 1000 [mV | y= Ss mVIkHZ] Mis f(2)-f(8) [kHz] ov bY iH 1 (3) (2) f(MHz) 11. Inter modulation: IM 1. Input SG11 to VIF IN, and measure video output TP9 with an oscilloscope. 2. Adjust AGC filter voltage V23 so that the minimum DC level of the output waveform is 1.5V. 3. Atthis time, measure TP9 with a spectrum analyzer. The inter modulation is defined as a difference between 0.92MHz and 3.58 MHz frequency components. 2tENESAS 4

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF 12. Limiting Sensitivity: LIM 1. Input SG17 to SIF IN, and measure the 400Hz component level of AF output TP14. 2. Input SG20 to SIF IN, and measure the 400Hz component level of AF output TP14 . 3. The input limiting sensitivity is defined as the input level when a difference between each 400Hz components of audio output (TP14) is 30dB, as shown below. Audio Outpu; (mVrms) Audio output while SG17 isinput. 30dB Audio output while SG20 is input. (dBy) SIF Input 13. AM Rejection: AMR 1. Input SG18 to SIF IN ,and measure the output level of Audio output (TP14). This level is named VAM. 2. AMRis; SAF RAV BRmRi= 20t0g (ese enue.) VAM (mVr.m.s) [dB] 14. AF S/N: AF S/N 1. Input SG19 to SIF IN ,and measure the output noise level of Audio output (TP 14). This level is named VN. 2. SINis; VoAF (mV. Sic Deg (eerie) __) _ VN (mVr.m.s) [AB] 2tENESAS 12

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF Pin peripheral circuit explanation Pin 1 (EQ OUTPUT) An output amplitude is positive 1.3Vp-p in case of 87.5% video modulation. internal | | driving current : 1mA sisssusevesserese 11V6-p Pin 2_(REG.OUTPUT) Itis a regulated 3.5V output which has current drive capability of approximately 5mA Pin 3 (APC FILTER) In the locked state,the cut-off frequency of the filter is adjusted ae 1” effectively by an external resistor so that it will be in the range of around 30 to 200kHz. In case the cut-off frequency is lower,the pull-in speed becomes slow.On the other hand,a higher cut-off frequency widen the pull-in range and band width, which results in a degradation in the S/N ratio.So, in the actual TV system design,the appropriate constant should be chosen for getting desirable performance considering above conditions. V3] Pin 3 output, 2.8Vo-p on toi FM mod frequency ‘—iokfscuench On [IF input frequency) 100KHz 2tENESAS 13

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF PIN4 (EQ INPUT) The input is Open Base. ES If DC information is not input to Pin 9,IF AGC 7 dose not work normally. w Please pay attention. z @ os PIN 5 (Vec) Yec Itis Vee pin (only one Vcc pin in this |C) re PIN6 and 7 (VCO COIL) Connecting a tuning coil and capacitor to these pins enables an oscillation. The oscillation frequency is tuned in f0.

3 In the actual adjustment, the coil is tuned so that the AFT

9500 8500 . . | ee voltage is reached to Vec/2 with f0 as an input. Cot @-; The printed pattern around these pins should be it 5 designed carefully to prevent an pull-in error of VCO, 4880 “4380 caused by the leakage interference from the large signal level oscillator to adjacent pins. The interconnection should be designed as short as possible. 8 pS In case the printed pattern has the interference problem, a capacitor of about 1pF is connected between pin 6 or 7 and GND so as to cancel the interference and keep enough pull-in range even in a low input level. 7tENESAS 14

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF PIN 8 .PIN 23 (IF AGC FILTER) 2-pin filter characteristics are available by Vgc utilizing the dynamic AGC circuit. And AGC speed can be changed, if pin-23 on the external resistors is variable. 1KO 10K, i, We 8 1v23] [ 3) weak strong 0 electric field electric field a [IF input] PINS (VIDEO OUTPUT) An output amplitude is positive 0.6Vp-p in case of 87.5% | | | video modulation. internal driving current1.5 mA PIN 10 (QIF OUTPUT) terminal voltage:2.25V In the split system,the carrier signal to SIF @) im provided from pin 10 through an emitter follower. 8 ae And, please open this pin ,when it is used INTER. driving current :0.6mA PIN 11 (GND) i This is GND of the SIF. ztENESAS 15

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF PIN 12 (LIMITER INPUT: terminal voltage : 2.35V ow KO Ko The input impedance is 6kQ PIN 13_ (QIF AGC FILTER) AGC speed can be changed by this pin's external capacity. PIN 14 (AF OUTPUT) The FM detector can respond to several kinds of SIF @ signals without an adjustment and external internal 8 F ; driving current:1mA components by adopting the PLL technique. The capacitor between pin 14 and 15,which fixes the deemphasis characteristics,can be determined considering the combination of an equivalent resistance of the IC and this capacitor itself. PIN 15 (AUDIO F/B) re) 9 Frequency characteristic of audio output is [coxa a decided with 15-pin external capacitor value. soko bed 1 And audio output amplitude can make it small 8 8e when it connected 15-pin external capacitor and resistance in series. ztENESAS 16

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF PIN 16 (QIF INPUT, INTER SW) terminal voltage : 2.4V Ss The input impedance is 1.5kQ. [ge SAT 1.5KQ [ d PIN 17 (RF AGC OUTPUT A current mode output is available in the reverse AGC operation. The maximum outflow current is NY cy see wesereeea aera 04mA (i?) (V17] (in operrloop condition ) The maximum inflow current is 04 mA High [IF input] Connecting a nonpolarity capacitor of 1 uF between pin 17 and pin 22 improves AGC operating speed. In that case , the capacitors between pin1 7/pin22 and ground should be removed. PIN 18 (AFT OUTPUT) Since an AFT output is provided bya high impedance source,the detection sensitivity can be set by an veo external resistor. Tae heRenira ? The muting operation will be on in following two aun current is Ter cases; he ; ® {| 1) the APC is out of locking, ifereunent is af 2) the video output becomes small enough in a low 02mA input level. Veco [V18] Vee | 4 in oper-loop condition ) 0 q [fo] note) AFT maximum voltage is about 4.2 V.IRF AGC maximum voltage is about 4.7 V. Those do not increase it over.Please pay attention. 2tENESAS 17

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF PIN 19 (GND) i This is GND other than SIF part. PIN 20,PIN 24 (VIF INPUT) terminal voltage : 1.45V Slew) Bia a —L [om Itshould be designed considering careful impedance Ka matching with the SAW filter. PIN 22 (RF AGC DELAY) Yec An applied voltage to the pin 22 is for changing a RF AGC i delay point. PIN 24 (EQ F/B) iio Both the external coil and capacitor determine the 4) frequency response of EQ output. The series connected resistor is for damping. 5KQ Bias ska, fe) 5KO. 2tENESAS 18

MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF DETAILED DIAGRAM OF PACKAGE OUTLINE a ie} Phat eloul |i Rlouls| | - 3 $|S]aifo| '|5])5)u5] "Jos 3 = f= E zl 3 |Z

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MITSUBISHI ICs (TV) M52767FP PLL-SPLIT VIF/SIF Keep safety first in your circuit designs! ®@Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non- flammable material or (iii) prevention against any malfunction or mishap. Notes regarding these materials ®@These materials are intended as a refrence to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property tights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. ®Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party's tights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. @All information contained in these materials, induding product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com). @When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. ®@Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. @[f these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control Jaws and regulations of Japan and/or the country of destination is prohibited. @Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for firther details on these materials or the products contained therein. ztENESAS 20