M52758SP RENESAS | Alldatasheet

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REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 1 of 14 M52758SP/FP Wide Band Analog Switch REJ03F0196-0201 Rev.2.01 Mar 31, 2008

Description

The M52758 is a semiconductor integrated circuit for the RGBHV interface. The device features switching signals input from two types of image and outputting them to CRT display etc. Synchronous signal meeting the frequency band of 10 kHz to 200 kHz are output at TTL. The frequency band of video signals is 250 MHz, acquiring high-resolution images, and are optimum as an interface IC with high-resolution CRT display and various new media.

Features

  • Frequency band: RGB 250 MHz HV 10 Hz to 200 kHz
  • Input level: RGB 0.7 V P-P (typ.) HV TTL input 2.0 V O-P (both channel)
  • Only the G channel is provided with sync-on video output.
  • The TTL format is adopted for HV output. Application Display monitor Recommended Operating Condition Supply voltage range: 4.75 to 5.5 V Rated supply voltage: 5.0 V

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 2 of 14 Block Diagram M52758FP 1815 16 17141312111098654321 7 1922 21 2023242526272829313233343536 30 VCC1 (R) INPUT1 (R) VCC1 (G) NC INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) NC GND INPUT2 (B) INPUT2 (H) INPUT2 (V) VCC2 (R) OUTPUT (R) GND NC NC VCC2 (G) OUTPUT (G) GND VCC2 (B) OUTPUT (B) GND OUTPUT (for sync -onG) NCVCC OUTPUT (H) OUTPUT (V) GND SWITCH M52758SP 15 16 141312111098654321 7 1922 21 20232425262728293132 30 VCC1 (R) INPUT1 (R) VCC1 (G) INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) GND INPUT2 (B) INPUT2 (H) INPUT2 (V) VCC2 (R) OUTPUT (R) GND VCC2 (G) OUTPUT (G) GND VCC2 (B) OUTPUT (B) GND OUTPUT (for sync -onG) NC VCC OUTPUT (H) OUTPUT (V) GND SWITCH

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 3 of 14 Pin Arrangement M52758FP (Top view) Outline: PRSP0036GA-B (36P2R-D) VCC1 (R) INPUT1 (R) VCC1 (G) NC INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) NC GND INPUT2 (B) INPUT2 (H) INPUT2 (V) VCC2 (R) OUTPUT (R) GND NC NC V CC2 (G) OUTPUT (G) GND V CC2 (B) OUTPUT (B) GND OUTPUT (for sync-onG) V CC NC OUTPUT (H) OUTPUT (V) GND SWITCH V CC1 (R) INPUT1 (R) VCC1 (G) INPUT1 (G) VCC1 (B) INPUT1 (B) INPUT1 (H) INPUT1 (V) GND INPUT2 (R) GND INPUT2 (G) GND INPUT2 (B) INPUT2 (H) INPUT2 (V) VCC2 (R) OUTPUT (R) GND V CC2 (G) OUTPUT (G) GND V CC2 (B) OUTPUT (B) GND OUTPUT (for sync-onG) NC V CC OUTPUT (H) OUTPUT (V) GND SWITCH M52758SP (Top view) Outline: PRDP0032BA-A (32P4B) NC: No connection

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 4 of 14 Absolute Maximum Ratings (Ta = 25°C) Item Symbol Ratings Unit Supply voltage VCC 7.0 V Power dissipation Pd 1068 (FP) 1603 (SP) mW Ambient temperature Topr −20 to +85 °C Storage temperature Tstg −40 to +150 °C Recommended supply voltage Vopr 5.0 V Recommended supply voltage range Vopr' 4.75 to 5.5 V Electrostatic discharge Surge ±200 V

Electrical Characteristics

Pin No is FP (VCC = 5 V, Ta = 25°C, unless otherwise noted) T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.25 T.P.25 T.P.25 T.P.25 T.P.2 T.P.5 T.P.7 T.P.11 T.P.13 T.P.16 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.31 T.P.28 T.P.25 V CC (V) VCC SW2 Rin1 SW5 Gin1 SW7 Bin1 SW8 Hin1 SW9 Vin1 SW11 Rin2 SW13 Gin2 SW16 Bin2 SW17 Hin2 SW18 Vin2 SW19 SwitchMin. Limits Input SW Typ. Max. Unit Test Point (s) ICC1 ICC2 VDC1 VDC2 VDC3 VDC4 GV1 ∆GV1 GV2 GV3 GV4 FC1 ∆FC1 FC2 FC3 FC4 ∆FC2 ∆GV2 Symbol Circuit current1 (no signal) Circuit current2 (no signal) Output DC voltage1 Output DC voltage2 Output DC voltage3 Output DC voltage4 Maximum allowable input1 Maximum allowable input2 Voltage gain1 Voltage gain2 Voltage gain3 Voltage gain4 Frequency characteristic1 (100 MHz) Frequency characteristic3 (250 MHz) Frequency characteristic4 (250 MHz) Relative frequency characteristic1 (100 MHz) Frequency characteristic2 (100 MHz) Relative frequency characteristic2 (100 MHz) Relative voltage gain1 Relative voltage gain2 Item (RGB SW) 46 66 86 mA A 5 bbb b bbbb bbb bbb b bbbb bba bbb b bbbb bbb bbb b bbbb bbb ba SG2 a SG2 b b bbbb bbb b bbbb bbb bb a bbbb b bbbb b b abb SG1 bab SG1 bba SG1 abb SG2 bab SG2 bba SG2 abb SG4 bab SG4 bba SG4 b bbbb bbbabb SG5 bab SG5 bba SG5 abb SG4 bab SG4 bba SG4 bbabbbb b a b b SG5 bab SG5 bba SG5 abb SG1 bab SG1 bba SG1 bb b bbb bbb bb Relative to measured values above Relative to measured values above Relative to measured values above Relative to measured values above bbb bbb bbb b bbbb bba bbbb bbbb bbbb bba b bba bba abb SG2 bab SG2 bba SG2 bbbb b bba AmA V V V V VP-P VP-P dB dB dB dB dB dB dB dB dB dB dB dB 46 66 86 1.85 2.05 2.25 1.85 2.05 2.25 0.75 1.15 1.55 0.75 1.15 1.55 2.0 2.4  2.0 2.4  0.3 0.9 1.5 0.3 0.9 1.5 −0.4 0 0.4 −0.4 0 0.4 −0.4 0.2 0.8 −0.4 0.2 0.8 −1.0 0 1.0 −1.0 0 1.0 −1.0 0 1.0 −1.0 0 1.0 −3.0 −1.5 1.0 −3.0 −1.5 1.0 Vimax1 Vimax2

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 5 of 14 Electrical Characteristics (cont.) T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.35 T.P.30 T.P.27 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.21 T.P.22 T.P.19 T.P.19 T.P.21 T.P.22 T.P.8 T.P.9 T.P.17 T.P.18 T.P.35 T.P.30 T.P.27 V CC (V) VCC SW2 Rin1 SW5 Gin1 SW7 Bin1 SW8 Hin1 SW9 Vin1 SW11 Rin2 SW13 Gin2 SW16 Bin2 SW17 Hin2 SW18 Vin2 SW19 SwitchMin. Limits Input SW Typ. Max. Unit Test Point (s) Crosstalk between two inputs1 (10 MHz) Crosstalk between channels1 (10 MHz) Crosstalk between channels2 (10 MHz) Crosstalk between two inputs2 (10 MHz) Crosstalk between two inputs3 (100 MHz) Crosstalk between channels3 (100 MHz) Crosstalk between channels4 (100 MHz) Pulse characteristic1 Pulse characteristic2 High level output voltage1 High level output voltage2 Low level output voltage1 Low level output voltage2 Input selectional voltage1 Input selectional voltage2 Rising delay time1 Rising delay time2 Falling delay time1 Falling delay time2 Switching selectional voltage1 Switching selectional voltage2 Crosstalk between two inputs4 (100 MHz) Item 5b b b b b b b bbbbbbb5 dB dB dB dB dB dB dB dB dB dB dB dB dB dB ns ns ns ns V V ns ns ns ns − 60 −50  −60 −50  −40 −35  −40 −35 − 50 −40 − 50 −40 − 30 −25 − 30 −25  1.6 2.5  1.6 2.5  1.6 2.5  1.6 2.5  0.2 0.5  0.2 0.5  100 150  100 150  50 100  50 100 1.4 1.8 2.0 1.4 1.8 2.0 0.5 1.5 2.0 0.5 1.5 2.0 4.5 0.5 4.5 0.5 C.T.I.1 C.T.I.2 C.T.I.3 C.T.I.4 C.T.C.1 C.T.C.2 C.T.C.3 C.T.C.4 Tr1 Tf1 Tr2 Tf2 VOH1 VOH2 VOL1 VOL2 Vith1 Vith2 Vsth1 Vsth2 Trd1 Trd2 Tfd1 Tfd2 Symbol abb SG3 bab SG3 bba SG3 abb SG3 bab SG3 bba SG3 bbbbbbb bbbbbbb abb SG4 bab SG4 bba SG4 abb SG4 bab SG4 bba SG4 bbbbbbbb bbabbbbb abb SG3 bab SG3 bba SG3 abb SG3 bab SG3 bba SG3 bbbbbbbb bbbbbbbb bbabbbbb abb SG4 bab SG4 bba SG4 abb SG4 bab SG4 bba SG4 b a a b a b b a a SG6 a SG6 a SG6 bbbbbbbb bbb bbb bbb bbabbbbb a SG6 a SG6 a SG6 c 5.0 V c 5.0 V c 5.0 V c 5.0 V a SG6 a SG6 a SG6 bba a bbb bbb bb bbbbb bbb bbb bbbc 0 V c 0 V c 0 V c 0 V a bbb bbbbb bbb bbb bbba SG7 a SG7 a SG7 a SG7 a SG7 a bbb bbbbb bbb bbb bb bbbbb ba SG7 a SG7 a SG7 a SG7 a SG1 a SG1 a SG1 a SG7 a SG7 a SG1 a SG1 a SG1 a SG7 a c c bbb bbbbb bbbbb bbb bbb bbbc Variable c Variable c Variable c Variable a bbb bbbbb a SG6 a SG6 a SG6 (HV SW)

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 6 of 14 Electrical Characteristics Test Method (Pin No is FP) It omits the SW.No accorded with signal input pin because it is already written in Table. SW A, SW1, SW3, SW5 is in side a if there is not defined specially. ICC1, ICC2, Circuit Current (no signal) The condition is shown as Table. Set SW19 to GND (or OPEN) and SW A to side b, measure the current by current meter A. The current is as ICC1 (ICC2). VDC1, VDC2 Output DC Voltage DC voltage is as VDC1 (or VDC2). VDC3, VDC4 Output DC Voltage Measure the DC voltage of T.P.25 same as Table, the DC voltage is as VDC3 (or VDC4). Vimax1, Vimax2 Maximum Allowable Input Set SW19 to GND, SG1 as the input signal of pin 2. Rising up the amplitude of SG1 slowly, read the amplitude of input signal when the output waveform is distorted. The amplitude is as Vimax1. And measure Vimax1 when SG2 as the input signal of pin 5, pin 7 in same way. Next, set SW to OPEN, measure Vimax2 when SG2 as the input signal of pin 11, 13, 16. G V1, ∆GV1, GV2, ∆GV2 1. The condition is shown as Table. amplitude is as VOR1. 3. Voltage gain G V1 is GV1 = 20log [dB]0.7 [VP-P] VOR1 [VP-P] 4. The method as same as 2 and 3, measure the voltage gain G V1 when SG2 as the input signal of pin 5, 7. 5. The difference of each channe l relative voltage gain is as ∆GV1. 6. Set SW19 to OPEN, measure G V2, ∆GV12 in the same way. GV3, GV4, Voltage Gain 1. The condition is shown as Table. This test is by active probe. 2. Measure the amplitude output from T.P.25. 3. Measure the G V3, GV4 by the same way as GV1, ∆GV1, GV2, ∆GV2. FC1, ∆FC1, FC2, ∆FC2 1. The condition is shown as Table. This test is by active probe. as VOR1. By the same way, measure the output when SG4 is as input signal of pin 2, the output is as VOR2. 3. The frequency characteristic F C1 is FC1 = 20log [dB]VOR1 [VP-P] VOR2 [VP-P] 4. The method as same as 2 and 3, measure the frequency F C1 when input signal to pin 5, 7. 5. The difference between of each ch annel frequency characteristic is as ∆FC1. 6. Set SW19 to OPEN, measure F C2, ∆FC2. FC3, FC4 Frequency Characteristic By the same way as Table measure the FC3, FC4 when SG5 of input signal.

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 7 of 14 1. The condition is shown as Table. This test is by active prove. VOR3. 4 The crosstalk between two inputs C.T.I.1 is C.T.I.1 = 20log [dB]VOR3 [VP-P] VOR3' [VP-P] 5. By the same way, measure the crosstalk between two inputs when SG3 as the input signal of pin 5, pin 7. 6. Next, set SW19 to OPEN, SG3 as the input signal of pin 11, measure the amplitude output from T.P.35. The amplitude is as V OR4. 8 The crosstalk between two inputs C.T.I.2 is C.T.I.2 = 20log [dB]VOR4 [VP-P] VOR4' [VP-P] 9. By the same way, measure the crosstalk between channels when SG3 as the input signal of pin 13, 16. 1. The condition is as Table. This test is by active prove. as VOR5. 4. The crosstalk between channels C.T.C.1 is C.T.C.1 = 20log [dB]VOR5 VOG5 or VOB5 5. Measure the crosstalk between channels when SG3 is as the input signal of pin 5, pin 7. 6. Next, set SW19 to OPEN, SG3 as the input signal of pin 11, measure the amplitude output from T.P.35. The amplitude is as VOR6. 8. The crosstalk between channels C.T.C.2 is C.T.C.2 = 20log [dB]VOR6 VOG6 or VOB6 9. By the same way, measure the crosstalk between channels when input signal to pin 13, 16.

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 8 of 14 Tr1, Tf1, Tr2, Tf2 Pulse Characteristic 1. The condition is as Table. Set SW19 to GND (or OPEN). 2. The rising of 10% to 90% for i nput pulse is Tri, the falling of 10% to 90% for input pulse is Tfi. 3. Next, the rising of 10% to 90% for output pulse is Tr o, the falling of 10% to 90% for output pulse is Tfo. 4. The pulse characteristic Tr1, Tf1 (Tr2, Tf2) is 100% 0% 10% 90% Tr Tf Tr1 (Tr2) = √ (Tro)2 − (Tri)2 (ns) Tf1 (Tf2) = √ (Tfo)2 − (Tfi)2 (ns) VOH1, VOH2 High Level Output Voltage The condition is as Table. Set SW19 to GND (OPEN), input 5 V at input terminal. Measure the output voltage, the voltage is as VOH1 (VOH2). VOL1, VOL2 Low Level Output Voltage The condition is as Table. Set SW19 to GND (OPEN), input 0 V at input terminal. Measure the output voltage, the voltage is as V OL1 (VOL2). Vith1, Vith2 Input Selectional Voltage The condition is as Table. Set SW19 to GND (OPEN), increasing gradually the voltage of input terminal from 0 V, measure the voltage of input terminal when output terminal is 4.5 V. The input voltage is as Vith1 (Vith2). Trd1, Trd2 Rising Delay Time, Tfd1, Tfd2 Falling delay time The condition is as Table. Set SW19 to GND (OPEN), SG7 is as the input signal of input terminal, measure the waveform of output. Rising delay time is as Trd1 (Trd2). Falling delay time is as Tfd1 (Tfd2). Reference to the figure as shown below. 50% 50% SG7 Output waveform Trd Tfd

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 9 of 14 Vsth1, Vsth2 Switching Selectional Voltage 1. The condition is as Table. SG1 is as the input signal of pin 2, pin 5, pin 7, and SG7 is as the input signal of pin 8, pin 9. There is no input at another pins. 3. Increase gradually the voltage of terminal pin 19. Read the voltage when there is no signal output from the terminals listed as above. The voltage is as Vsth1. 4. SG1 as the input signal of pin 11, pin 13, pin 16, and SG7 as the input signal of pin 17, pin 18. There is no input at another pins. 6. Decreasing gradually the voltage of terminal pin 19. Read the voltage when there are signals output from the terminals listed as above. The voltage is as Vsth2. Input Signal SG No. Input Signal SG1 Sine wave (f = 60 kHz, 0.7 VP-P, amplitude variable)

0.7 VP-P (amplitude variable)

SG2 Sine wave (f = 1 MHz, amplitude 0.7 VP-P) SG3 Sine wave (f = 10 MHz, amplitude 0.7 VP-P) SG4 Sine wave (f = 100 MHz, amplitude 0.7 VP-P) SG5 Sine wave (f = 250 MHz, amplitude 0.7 VP-P) SG6 Pulse with amplitude 0.7 VP-P (f = 60 kHz, duty 80%)

0.7 VP-P

SG7 Square wave (Amplitude 5.0 VO-P TTL, f = 60 kHz, duty 50%) 5 V 0 V

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 10 of 14 Test Circuit (FP) A SW2 SW A VCC 5 V RG BH TP25 GOUT (for Sync on G) TP22TP35 TP30 TP27 TP21 SW19 OPEN SW GND: INPUT1 SW OPEN: INPUT2 V SG1 SG2 SG3 SG4 SG5 SG6 SG7 SW5 SW7 SW11 SW9SW8 SW13 SW16 SW17 SW18 TP5TP2 TP7 TP8 TP9 TP11 TP13 TP16 TP17 TP18 ab ab ab ab ab ab abacba c b a cba c b a c b + + ++ + + + 1922 21 2023242526272829313233343536 30 1815 16 17141312111098654321 7 M52758FP VCC VCC VCC VCC VCC VCC VCCGND GND GND GND GND NC NC NC NC NC 0.01 µ 47 µ 0.01 µ 0.01 µ 100 µ 0.01 µ 100 µ 0.01 µ 100 µ 0.01 µ 100 µ 0.01 µ 100 µ 0.01 µ 100 µ 47 µ0.01 µ 47 µ 0.01 µ 0.01 µ 0.01 µ 47 µ 0.01 µ 0.01 µ 47 µ

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 11 of 14 Typical Characteristics Power Dissipation Pd (mW) 1250 1500 1750 250 500 750 1000 1068 1603 −20 0 25 50 75 85 100 125 150 SP FP Ambient Temperature Ta (°C) Thermal Derating (Maximum Rating) Pin Description Pin No. (FP) Name DC Voltage (V) Peripheral Circuit Function VCC1 (R) VCC1 (G) VCC1 (B) 5.0   Input1 (R) Input1 (G) Input1 (B) 1.5 2.59 mA 2.2 V 800 620 Input signal with low impedance Input1 (H) Input1 (V) 0.2 mA Input pulse between 2 V and 5 V 2 to 5 V 0 to 0.8 V 10, 12, 15, 20, 26, 29, GND GND  

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 12 of 14 Pin Description (cont.) Pin No. (FP) Name DC Voltage (V) Peripheral Circuit Function Input2 (R) Input2 (G) Input2 (B) 1.5 2.59 mA 2.2 V 800 620 Input signal with low impedance. Input2 (H) Input2 (V) 0.2 mA Input pulse between 2 V and 5 V. 2 to 5 V 0 to 0.8 V 19 Switch 2.6 10 k 12 k 7.3 k

2.3 V13 k

GND. Output (V) Output (H) 1 k Output impedance is built-in

24 V CC

(H, V, Switch) 5   4, 14, 23, 32, NC    Output (sync on G) Output (B) Output (G) Output (R) 1.15 2.05 500 430 27, 30, 35 Output impedance is built-in VCC2 (R) VCC2 (G) VCC2 (B) 5  

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 13 of 14 Note How to Use This IC (Pin No is FP) 1. R, G, B input signal is 0.7 V P-P of standard video signal. 2. H, V input is 2.0 V (min.) TTL type. 3. Input signal with sufficient low impedance to input terminal. 4. The terminal of H, V output pin are shown as figure 1. It is possible to reduce rise time by insert the resister between V CC line and H, V output pin, but set the value of resister in order that the current is under 7.5 mA. Setting the value of R is more than 2 kΩ as shown in figure 1. 1 kΩ R I < 7.5 mA

5 V 5 V

  1. The terminal of R, G, B output pin (pin 27, 30, 35). It is possible to add a pull-up resister according as drive ability. But set the value of resister in order that the current is under 10 mA. Setting the value of R is more than 500 Ω as shown in figure 2. R I < 10 mA 5 V 50 Ω 430 Ω Figure 2 6. Switch (pin 19) can be changed wh en this terminal is GND or OPEN When GND: Signal output from input 1 When OPEN: Signal output from input 2 When the switch is being used as figure 3 0 to 0.5 V: Signal output from input 1 2 to 5 V: Signal output from input 2 It is not allowable to set voltage higher than V CC. Figure 3 Notice of Making Printed Circuit Board
  • Please notice following as shown below. It will maybe cause something oscillation because of the P.C.B. layout of the wide band analog switch.
  • The distance between resister and output pin is as short as possible when insert a output pull-down resister.
  • The capacitance of output terminal as small as possible.
  • Set the capacitance between VCC and GND near the pins if possible.
  • Using stable power-source (if possible the separated power-source will be better).
  • It will reduce the oscillation when add a resister that is tens of ohms between output pin and next stage.
  • Assign an area as large as possible for grounding.

REJ03F0196-0201 Rev.2.01 Mar 31, 2008 Page 14 of 14 Package Dimensions DO NOT INCLUDE MOLD FLASH. NOTE) DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1732 SEATING PLANE *3 *3 E L A A1 A2 D e b3 b2bp c 5.08 15° e 1.778 c L 3.0 0.51 0.9 1.0 1.3 A E 8.75 8.9 9.05 D 27.8 28.0 28.2 Reference Symbol Dimension in Millimeters Min Nom Max 0.22 0.27 0.34 P-SDIP32-8.9x28-1.78 2.2g MASS[Typ.] 32P4BPRDP0032BA-A RENESAS CodeJEITA Package Code Previous Code bp 0.35 0.45 0.55 10.169.86 10.46 b2 0.63 0.73 1.03 A2 3.8 1.528 2.028 bp HE y 0.10 e 0.8 c 0° 8° L 0.3 0.5 0.7 0 0.1 0.2 A 2.35 11.63 11.93 12.23 A2 2.05 E 8.2 8.4 8.6 D 14.8 15.0 15.2 Reference Symbol Dimension in Millimeters Min Nom Max 0.3 0.35 0.45 0.18 0.2 0.25 P-SSOP36-8.4x15-0.80 0.5g MASS[Typ.] 36P2R-DPRSP0036GA-B RENESAS CodeJEITA Package Code Previous Code 0.65 0.95 DO NOT INCLUDE MOLD FLASH. NOTE) DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. y Index mark 1 18 1936 F E HE D e bp A c Detail F L

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