M51996AP

M51996AP RENESAS | Alldatasheet

Document overview

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PDF pages: 36

Technical content

Features

500kHz operation to MOS FET
Output current : ±1 A
Output rise time 60 ns, fall time 40 ns
Modified totempole output method with small through current
Compact and light-weight power supply  Small start-up current : 100 µA typ.  Big difference between “start-up voltage” and “stop voltage” makes the smoothing capacitor of the power input section small.  Start-up threshold 16 V , stop voltage 10 V  Packages with high power dissipation are used to with-stand the heat generated by the gate-drive current of MOS FET.  14-pin DIP, 16-pin SOP 1.5W (at 25°C)
Simplified peripheral circuit with protection circuit and built-in large-capacity totempole output  High-speed current limiting circuit using pulse-by-pulse method (CLM+pin)  Over-voltage protection circuit with an externally re-settable latch (OVP)  Protection circuit for output miss action at low supply voltage (UVLO)
High-performance and highly functional power supply  Triangular wave oscillator for easy dead time setting  SOFT start function by expanding period Application Feed forward regulator, fly-back regulator

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 2 of 35 Recommended Operating Conditions

Supply voltage range: 12 to 30 V
Operating frequency: less than 500 kHz
Oscillator frequency setting resistance
T-ON pin resistance  RON: 10 k to 75 kΩ
T-OFF pin resistance  ROFF: 2 k to30 kΩ Block Diagram Under voltage lockout Voltage regulator 7.1 V 5.8 V 15.2 k 3 k 500 F/BREG (7.8 V) DET GND VCC LatchOVP CF T-ON T-OFF CLM+SOFT Collector VOUT Emitter

6 S1 S

1 S1 S

2.5 V Current limit detectionOscillator (triangle)

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 3 of 35 Pin Arrangement Collector M51996AP (Top view) Outline: PRDP0014AA-A (14P4) M51996AFP (Top view) Outline: PRSP0016DE-A (16P2N-A) VOUT Emitter OVP F/B DET REG Collector VOUT Emitter Heat sink pin DET REG VCC CLM+ GND T-OFF CF T-ON SOFT VCC CLM+ GND Heat sink pin T-ON SOFT OVP F/B T-OFF CF Note: Connect the heat sink pin to GND.

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 4 of 35 Absolute Maximum Ratings Item Symbol Ratings Unit Condition Supply voltage V CC 31 V Collector voltage V C 31 V ±1 Peak Output current I O ±0.15 A Continuous VREG terminal output current I VREG −6 mA SOFT terminal voltage V SOFT V REG + 0.2 V CLM+ terminal voltage V CLM+ −0.3 to +3 V DET terminal voltage V DET 6 V OVP terminal current I OVP 10 mA F/B terminal current I FB –10 mA T-ON terminal input current I TON –1 mA T-OFF terminal input current I TOFF –2 mA Power dissipation Pd 1.5 W Ta = 25°C Thermal derating K θ 12 mW/ °C Ta > 25°C Operating temperature Topr −30 to +85 °C Storage temperature Tstg −40 to +125 °C Notes: 1. “ +” sign shows the direction of current flowing into the IC and “−” sign shows the current flowing out from the IC. 2. The low impedance voltage supply should not be applied to the OVP terminal.

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 5 of 35

Electrical Characteristics

(VCC = 18 V, Ta = 25°C, unless otherwise noted) Limits Block Item Symbol Min. Typ. Max. Unit Test Conditions Operating supply voltage range VCC V CC(STOP) — 30 V Operation start up voltage VCC(START) 15.2 16.2 17.2 V Operation stop voltage V CC(STOP) 9.0 9.9 10.9 V VCC(START), VCC(STOP) difference ∆VCC 5.0 6.3 7.6 V ∆VCC = VCC(START) − VCC(STOP) 65 100 150 V CC = 14.5 V, Ta = 25°C Stand-by current I CCL 50 100 200 µA VCC = 14.5 V, –30 ≤ Ta ≤ 85°C 7.3 11 17 V CC = 15 V, f = 188 kHz Operating circuit current ICCO 8 12 19 mA VCC = 30 V, f = 188 kHz 1.3 2.0 3.0 mA V CC = 25 V Supply voltage/ circuit current Circuit current in OVP state I CCOVP 140 210 320 µA V CC = 9.5 V Current at 0% duty I FBMIND –2.1 –1.5 –1.0 mA F/B terminal input current Current at maximum duty IFBMAXD –0.9 –0.6 –0.4 mA F/B terminal input current Current difference between max and 0% duty ∆IFB –1.35 –0.99 –0.70 mA ∆IFB = IFBMIND − IFBMAXD F/B terminal voltage V FB 4.9 5.9 7.1 V F/B terminal input current = 0.95 mA F/B OVP terminal resistance RFB 420 600 780 Ω OVP terminal H threshold voltage VTHOVPH 540 750 960 mV OVP terminal hysteresis voltage ∆VTHOVP — 30 — mV ∆VTHOVP = VTHOVPH − VTHOVPL OVP terminal threshold current ITHOVP 80 150 250 µA OVP terminal input current IINOVP 80 150 250 µA V OVP = 400 mV OVP reset supply voltage VCCOVPC 7.5 9.0 10.0 V Difference supply voltage between operation stop and OVP reset V CC(STOP) − VCCOVPC 0.55 1.20 — V OVP terminal is open. (high impedance) –480 –320 –213 V CC = 30 V OVP Current from OVP terminal for OVP reset ITHOVPC –210 –140 –93 µA VCC = 18 V CLM+ terminal threshold voltage VTHCLM+ 180 200 220 mV CLM+ terminal current I INCLM+ –280 –200 –140 µA V CLM+ = 0 V CLM+ Delay time from CLM+ to VOUT TPDCLM+ — 150 — ns

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 6 of 35 (VCC = 18 V, Ta = 25°C, unless otherwise noted) Limits Block Item Symbol Min. Typ. Max. Unit Test Conditions Oscillating frequency f OSC 170 188 207 kHz Maximum ON duty T DUTY 47 50 53 % RON = 20 kΩ , ROFF = 17 kΩ CF = 220 pF, –5 ≤ Ta ≤ 85°C Upper limit voltage of oscillation waveform VOSCH 3.97 4.37 4.77 V Lower limit voltage of oscillation waveform VOSCL 1.76 1.96 2.16 V Voltage difference between upper limit and lower limit of OSC waveform OSC 2.11 2.41 2.71 V RON = 20 kΩ , ROFF = 17 kΩ CF = 220 pF T-ON terminal voltage V T-ON 3.8 4.5 5.4 V R ON = 20 kΩ Oscillator T-OFF terminal voltage V T-OFF 2.9 3.5 4.2 V R OFF = 17 kΩ VSOFT = 5.5 V 170 188 207 VSOFT = 2.5 V 111 131 151 Oscillating frequency during SOFT operation V SOFT = 0.2 V fOSCSOFT 19.0 23.3 27.0 kHz R ON = 20 kΩ , ROFF = 17 kΩ CF = 220 pF SOFT terminal input current ISOFTIN –0.5 –0.1 — µA V SOFT = 1 V SOFT SOFT terminal discharging current ISOFDIS 1 3.3 — mA Discharge current of SOFT terminal at VCC less than VCC(STOP) REG Regulator output voltage VREG 6.8 7.8 8.8 V VOL1 — 0.04 0.4 V V CC = 18 V, IO = 10 mA VOL2 — 0.7 1.4 V V CC = 18 V, IO = 100 mA VOL3 — 0.85 1.0 V V CC = 5 V, IO = 1 mA Output low voltage VOL4 — 1.3 2.0 V V CC = 5 V, IO = 100 mA VOH1 16.0 16.7 — V V CC = 18 V, IO = –10 mA Output high voltage VOH2 15.5 16.5 — V V CC = 18 V, IO = –100 mA Output voltage rise time TRISE — 60 — ns Output Output voltage fall time T FALL — 40 — ns Detection voltage V DET 2.4 2.5 2.6 V DET terminal input current IINDET — 1.0 3.0 µA V DET = 2.5 V Detection Voltage gain of detection amp GAVDET 30 40 — dB

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 7 of 35 Main Characteristics CLM+ Terminal Threshold Voltage vs. Ambient Temperature CLM+ Terminal Threshold Voltage VTHCLM+ (mV) Ambient Temperature Ta (°C) −60 −40 0−20 20 40 60 80 100 210 200 205 195 190 SOFT Terminal Input Voltage vs. Expansion Rate of Period SOFT Terminal Input Voltage VSOFT (V) Expansion Rate of Period (Times) 0 2 4 6 8 1 01 21 41 61 82 0 5.0 4.0 3.0 2.0 1.0 (fOSC = 100 kHz) (1) (2) (4) (5) (6)(3) (1) RON = 15 kΩ, ROFF = 27 kΩ (2) RON = 18 kΩ, ROFF = 24 kΩ (3) RON = 22 kΩ, ROFF = 22 kΩ (4) RON = 24 kΩ, ROFF = 20 kΩ (5) RON = 22 kΩ, ROFF = 12 kΩ (6) RON = 36 kΩ, ROFF = 6.2 kΩ Power Dissipation Pd (mW) Thermal Derating (Maximum Rating) Ambient Temperature Ta (°C) Circuit Current vs. Supply Voltage (Normal Operation) Supply Voltage VCC (V) Circuit Current ICC (A) 1800 1500 1200 900 600 300 16 m 14 m 12 m 10 m 150 µ 100 µ 50 µ 0 25 50 75 100 125 150 85 01 0 2 0 3 0 4 0 Ta = 25 °C Ta = 85 °C Ta = −30 °C RON = 18 kΩ ROFF = 20 kΩ fOSC = 500 kHz fOSC = 100 kHz SOFT Terminal Input Voltage vs. Expansion Rate of Period SOFT Terminal Input Voltage VSOFT (V) Expansion Rate of Period (Times) 0 2 4 6 8 1 01 21 41 61 82 0 5.0 4.0 3.0 2.0 1.0 (fOSC = 500 kHz) (1) (2) (4) (5) (6) (3) (1) RON = 15 kΩ, ROFF = 27 kΩ (2) RON = 18 kΩ, ROFF = 24 kΩ (3) RON = 22 kΩ, ROFF = 22 kΩ (4) RON = 24 kΩ, ROFF = 20 kΩ (5) RON = 22 kΩ, ROFF = 12 kΩ (6) RON = 36 kΩ, ROFF = 6.2 kΩ SOFT Terminal Input Current vs. Input Voltage SOFT Terminal Input Current ISOFTIN (nA) SOFT Terminal Input Voltage VSOFT (V) −100 −90 −80 −70 −60 −50 −40 −30 −20 −10 0123456789 1 0 Ta = 25 °C Ta = 85 °C Ta = −30 °C

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 8 of 35 Detection Terminal Input Current vs. Ambient Temperature Detection Terminal Input Current IINDET (µA) Ambient Temperature Ta (°C) 1.4 1.3 1.2 1.1 1.0 0.9 0.8 0.7 −60 −40 −20 0 20 40 60 80 100 Detection Voltage vs. Ambient Temperature Detection Voltage VDET (V) Ambient Temperature Ta (°C) 2.55 2.50 2.45 2.40 −60 −40 −20 0 20 40 60 80 100 REG Output Voltage vs. Ambient Temperature REG Output Voltage VREG (V) Ambient Temperature Ta (°C) 8.5 8.0 7.5 7.0 −60 −40 −2 00 2 04 06 08 0 1 0 0 CLM+ Terminal Current vs. CLM+ Terminal Voltage CLM+ Terminal Current IINCLM+ (µA) CLM+ Terminal Voltage VCLM+ (V) 400 300 200 100 Ta = 25 °C Ta = 85 °C Ta = −30 °C RC = ∞ RC = 3.6 k RC = 1.5 k Output High Voltage vs. Source Current Output High Voltage VCC-VOH (V) Source Current IOH (A) 4.5 3.9 4.2 3.6 3.3 3.0 2.7 2.4 1.8 2.1 1.5 1.2 −3 10−2 10−1 100 101 VCC = 18 V Ta = 25°C 3333 10−3 10−2 10−1 100 1013333 Output Low Voltage vs. Sink Current Sink Current IOL (A) Output Low Voltage VOL (V) 5.0 4.5 4.0 3.0 2.0 1.0 3.5 2.5 1.5 0.5 Ta = 25°C VCC = 18 V VCC = 5 V

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 9 of 35 ON Duty vs. F/B Terminal Input Current ON Duty (%) F/B Terminal Input Current IF/B (mA) Voltage Gain of Detection AMP vs. Frequency Frequency f (Hz) Voltage Gain of Detection AMP GDET (dB) 50 102 103 104 105 1063333 100 101 102 103 1043333 ON Duty vs. F/B Terminal Input Current ON Duty (%) F/B Terminal Input Current IF/B (mA) Ta = 25 °C Ta = 85 °C Ta = −30 °C (fOSC = 100 kHz) RON = 18 kΩ ROFF = 20 kΩ Ta = 25 °C Ta = 85 °C Ta = −30 °C (fOSC = 200 kHz) RON = 18 kΩ ROFF = 20 kΩ ON Duty vs. F/B Terminal Input Current ON Duty (%) F/B Terminal Input Current IF/B (mA) Ta = 25 °C Ta = 85 °C Ta = −30 °C (fOSC = 500 kHz) RON = 18 kΩ ROFF = 20 kΩ Upper & Lower Limit Voltage of OSC vs. Ambient Temperature Upper & Lower Limit Voltage of OSC VOSCH, VOSCL (V) Ambient Temperature Ta (°C) 5.2 4.8 4.4 4.0 2.2 2.0 1.8 −60 −40 −2 00 2 04 06 08 0 1 0 0 fOSC = 500 kHz fOSC = 200 kHz fOSC = 100 kHz RON = 18 kΩ ROFF = 20 kΩ fOSC = 100 kHz fOSC = 200 kHz fOSC = 500 kHz Oscillating Frequency vs. CF Terminal Capacitance CF Terminal Capacitance (pF) Oscillating Frequency fOSC (kHz) 104 103 102 101 100 RON = 22 kΩ ROFF = 12 kΩ RON = 36 kΩ ROFF = 6.2 kΩ RON = 24 kΩ ROFF = 20 kΩ

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 10 of 35 ON Duty vs. ROFF ON Duty (%) ROFF (kΩ) 100 0 35 7 101 35 7 102 51 kΩ 36 kΩ 24 kΩ 22 kΩ 18 kΩ 15 kΩ 10 kΩ RON = 75 kΩ Oscillator Frequency vs. Ambient Temperature Oscillator Frequency fOSC (kHz) Ambient Temperature Ta (°C) 120 110 100 −60 −40 −20 0 20 40 60 80 100 RON = 24 kΩ ROFF = 20 kΩ CF = 330 pF Oscillator Frequency fOSC (kHz) Oscillator Frequency vs. Ambient Temperature Ambient Temperature Ta (°C) 700 600 500 400 300 200 −60 −40 −20 0 20 40 60 80 100 RON = 24 kΩ ROFF = 20 kΩ CF = 47 pF ON Duty vs. Ambient Temperature Ambient Temperature Ta (°C) ON Duty (%) −60 −40 −20 0 20 40 60 80 100 100 RON = 36 kΩ, ROFF = 6.2 kΩ RON = 22 kΩ, ROFF = 12 kΩ RON = 24 kΩ, ROFF = 20 kΩ RON = 22 kΩ, ROFF = 22 kΩ RON = 18 kΩ, ROFF = 24 kΩ RON = 15 kΩ, ROFF = 27 kΩ (fOSC = 100 kHz) ON Duty vs. Ambient Temperature ON Duty (%) Ambient Temperature Ta (°C) 100 −60 −40 −20 0 20 40 60 80 100 RON = 36 kΩ, ROFF = 6.2 kΩ RON = 22 kΩ, ROFF = 12 kΩ RON = 24 kΩ, ROFF = 20 kΩ RON = 22 kΩ, ROFF = 22 kΩ RON = 18 kΩ, ROFF = 24 kΩ RON = 15 kΩ, ROFF = 27 kΩ (fOSC = 200 kHz) ON Duty vs. Ambient Temperature Ambient Temperature Ta (°C) ON Duty (%) −60 −40 −20 0 20 40 60 80 100 100 RON = 36 kΩ, ROFF = 6.2 kΩ RON = 22 kΩ, ROFF = 12 kΩ RON = 24 kΩ, ROFF = 20 kΩ RON = 22 kΩ, ROFF = 22 kΩ RON = 18 kΩ, ROFF = 24 kΩ RON = 15 kΩ, ROFF = 27 kΩ (fOSC = 500 kHz)

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 11 of 35 Current from OVP Terminal for OVP Reset ITHOVPC (µA) Supply Voltage VCC (V) Current from OVP Terminal for OVP Reset vs. Supply Voltage 800 400 600 700 200 100 300 500 01 0 1 5 2 5 4 0 3552 0 3 0 Ta = 25 °C Ta = 85 °C Ta = −30 °C Output Through Current Waveform at Rising Edge of Output Pulse Output Through Current Waveform at Falling Edge of Output Pulse OVP Terminal Input Current IOVP (A) OVP Terminal Input Current vs. Input Voltage OVP Terminal Input Voltage VOVP (V) 1 m 100 µ 10 µ 1 µ Ta = 25 °C Ta = 85 °C Ta = −30 °C OVP Terminal Threshold Voltage vs. Ambient Temperature Ambient Temperature Ta (°C) OVP Terminal Threshold Voltage VTHOVP (V) 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 −40 −20 0 20 40 60 80 100 H threshold voltage (VTHOVPH) L threshold voltage (VTHOVPL) Circuit Current ICC (mA) Supply Voltage VCC (V) Circuit Current vs. Supply Voltage (OVP Operation) 8.0 7.0 6.0 5.0 4.0 3.0 2.0 1.0 01 0 2 0 3 0 4 0 OVP reset point

8.87 V (−30 °C)

8.94 V (25 °C)

9.23 V (85 °C)

Ta = 25 °C Ta = 85 °C Ta = −30 °C Horizontal-axis: 20 ns/div Vertical-axis: 50 mA/div Horizontal-axis: 20 ns/div Vertical-axis: 5 mA/div VCC = 18 V

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 12 of 35 Application Example (1) Application Example for Feed Forward Regulator + + VCC Collector F/B SOFT OVP T-ON T-OFF REG DET CF Emitter CLM+ VOUT GND Line filter AC input Rush current prevention circuit CFIN CVCC M51996A RON CF ROFF Feedback (TL431) OVP DC output R (2) Application Example for Fly-back Regulator + + VCC Collector F/B SOFT OVP T-ON T-OFF REG DET CF Emitter CLM+ VOUT GND Line filter AC input Rush current prevention circuit M51996A CFIN CVCC R22 R21 RFB CFB RON CF ROFF DC output R RNF RCLMCNF

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 13 of 35 Function Description Type M51996AP and M51996AFP are especially designed for off-line primary PWM control IC of switching mode power supply to get DC voltage from AC power supply. Using this IC, smart SMPS can be realized with reasonable cost and compact size as the number of external electric parts can be reduced and also parts can be replaced by reasonable one. In the following circuit diagram, MOS FET is used for output transistor, however bipolar transistor can be replaced with no problem. Start-up Circuit Section The start-up current is such low current level as typical 100 µA, as shown in figure 1, when the VCC voltage is increased from low level to start-up voltage VCC(START). In this voltage range, only a few parts in this IC, which has the function to make the output voltage low level, is alive and ICC current is used to keep output low level. The large voltage difference between V CC(START) and VCC(STOP) makes start-up easy, because it takes rather long duration from VCC(START) to VCC(STOP). Circuit Current ICC (mA) Supply Voltage VCC (V) ICCO ≈ 11 mA ICCL ≈ 100 µA VCC (STOP) ≈ 9.9 V VCC (START) ≈ 16.2 V Figure 1 Circuit Current vs. Supply Voltage

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 17 of 35 PWM Comparator, PWM Latch and Current Limit Latch Section Figure 7 shows the schematic diagram of PWM comparator and PWM latch section. The on-duration of output waveform coincides with the rising duration of CF terminal waveform, when the no output current flows from F/B terminal. When the F/B terminal has finite impedance and current flows out from F/B terminal, “A” point potential shown in figure 7 depends on this current. So the “A” point potential is close to GND level when the flow-out current becomes large. “A” point potential is compared with the CF terminal oscillator waveform and PWM comparator, and the latch circuit is set when the potential of oscillator waveform is higher than “A” point potential. The latch circuit is reset during the dead-time of oscillation (falling duration of oscillation current). So the “B” point potential or output waveform of latch circuit is the one shown in figure 8. The final output waveform or “C” point potential is got by combining the “B” point signal and dead-time signal logically. (please refer to figure 8) ≈ 7.1 V 5.8 V Point A Point D PWM COMP. CF CLM+M51996A F/B

6 S 1 S

500 Ω 200 µA 3 k 15.2 k Notes: 1. Resistor to determine current limit sensitivety 2. High level during dead time Figure 7 PWM Comparator PWM Latch and Current Limit Latch Section Waveform of OSC & point A Point B Point C OSC waveform Waveform at point A Figure 8 Waveforms of PWM Comparator Input Point A, Latch Circuit Points B and C

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 20 of 35 OVP Circuit (Over Voltage Protection Circuit) Section OVP circuit is basically positive feedback circuit constructed by Q2, Q3 as shown in figure 13. Q2, Q3 turn on and the circuit operation of IC stops, when the input signal is applied to OVP terminal. (threshold voltage ≈ 750 mV) The current value of I2 is about 150µA when the OVP does not operates but it decreases to about 2 µA when OVP operates. It is necessary to input the sufficient larger current (800 µA to 8 mA) than I2 for triggering the OVP operation. The reason to decrease I2 is that it is necessary that I CC at the OVP rest supply voltage is small. It is necessary that OVP state holds by circuit current from R1 in the application example, so this IC has the characteristic of small ICC at the OVP reset supply voltage (≈ stand-by current + 20 µA) On the other hand, the circuit current is large in the higher supply voltage, so the supply voltage of this IC doesn’t become so high by the voltage drop across R1. This characteristic is shown in figure 14. The OVP terminal input current in the voltage lower than the OVP threshold voltage is based on I2 and the input current in the voltage higher than the OVP threshold voltage is the sum of the current flowing to the base of Q3 and the current flowing from the collector of Q2 to the base. For holding in the latch state, it is necessary that the OVP terminal voltage is kept in the voltage higher than V BE of Q3. So if the capacitor is connected between the OVP terminal and GND, even though Q2 turns on in a moment by the surge voltage, etc, this latch action does not hold if the OVP terminal voltage does not become higher than V BE of Q3 by charging this capacitor. For resetting OVP state, it is necessary to make the OVP terminal voltage lower than the OVP L threshold voltage or make VCC lower than the OVP reset supply voltage. As the OVP reset voltage is settled on the rather high voltage of 9.0 V, SMPS can be reset in rather short time from the switch-off of the AC power source if the smoothing capacitor is not so large value. VCC OVP GND 8 k 12 k Q1 2.5 k 400 7.8 V 100 µA Note: I1 = 0 when OVP operates Figure 13 Detail Diagram of OVP Circuit

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 21 of 35 Circuit Current ICC (mA) Supply Voltage VCC (V) 0 5 10 15 25 35 20 30 40 OVP reset point Ta = 25 °C Ta = 85 °C Ta = −30 °C Figure 14 Circuit Current vs. Supply Voltage (OVP Operation) Output Section It is required that the output circuit have the high sink and source abilities for MOS FET drive. It is well known that the “totempole circuit has high sink and source ability. However, it has the demerit of high through current. For example, the through current may reach such the high current level of 1 A, if type M51996A has the “conventional” totempole circuit. For the high frequency application such as higher than 100 kHz, this through current is very important factor and will cause not only the large I CC current and the inevitable heat-up of IC but also the noise voltage. This IC uses the improved totempole circuit, so without deteriorating the characteristic of operating speed, its through current is approximately 100 mA.

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 24 of 35 4. Power supply circuit for easy start-up When IC start to operate, the voltage of the CVCC begins to decrease till the CVCC becomes to be charged from the third winding of main-transformer as the ICC of the IC increases abruptly. In case shown in figure 15 and 16, some “unstable start-up” or “fall to start-up” may happen, as the charging interval of CVCC is very short duration; that is the charging does occur only the duration while the induced winding voltage is higher than the C VCC voltage, if the induced winding voltage is nearly equal to the “operation-stop voltage” of type M51996A. It is recommended to use the 10 to 47 µF for CVCC1, and about 5 times capacity bigger than CVCC1 for CVCC2. + + VCC GND CVCC1 CVCC2 Main transformer third winding M51996A Figure 18 DC Source Circuit for Stable Start-up

REJ03D0836-0201 Rev.2.01 Nov 14, 2007 Page 35 of 35 Package Dimensions DO NOT INCLUDE MOLD FLASH. NOTE) DIMENSION "*3" DOES NOT INCLUDE TRIM OFFSET. 1.421.12 bp HE y 0.1 e 1.27 c 0° 8° L 0.4 0.6 0.8 0 0.1 0.2 A 2.1 7.5 7.8 8.1 A2 1.8 E 5.2 5.3 5.4 D 10.0 10.1 10.2 Reference Symbol Dimension in Millimeters Min Nom Max 0.35 0.4 0.5 0.18 0.2 0.25 MASS[Typ.] 16P2N-APRSP0016DE-A RENESAS CodeJEITA Package Code Previous Code Detail F A1A2 L 1 8 916 F Index mark y c bp A e D E HE INCLUDE TRIM OFFSET.DIMENSION "*3" DOES NOT NOTE) DO NOT INCLUDE MOLD FLASH. 14 8 SEATING PLANE E D e L A A1 A2 c b3 bp 2.792.29 4.5 15° e 2.54 c L 3.0 0.51 1.4 1.5 1.8 A E 6.15 6.3 6.45 D 18.8 19.0 19.2 Reference Symbol Dimension in Millimeters Min Nom Max 0.22 0.27 0.34 P-DIP14-6.3x19-2.54 1.0g MASS[Typ.] 14P4PRDP0014AA-A RENESAS CodeJEITA Package Code Previous Code bp 0.4 0.5 0.6 e1 7.627.32 7.92 A2 3.3

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Summary

Switching Regulator Control

Description

M51996A is the primary switching regulator controller which is especially designed to get the regulated DC voltage from AC power supply. This IC can directly drive the MOS FET with fast rise and fast fall output pulse and with a large-drive totempole output. Type M51996A has the functions of not only high frequency OSC and fast output drive but also current limit with fast response and high sensibility so the true “fast switching regulator” can be realized. The M51996A is equivalent to the M51978 with externally re-settable OVP (over voltage protection) circuit.

Source title M51996AP Datasheet(PDF) - Renesas Technology Corp

Read M51996AP online.