M48Z02_07 STMICROELECTRONICS | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 20

Technical content

Datasheet sections

  • 1 Summary
  • 2 Operation modes
  • 2.1 Read mode
  • 2.2 Write mode
  • 2.3 Data retention mode
  • 3 Maximum rating
  • 4 DC and AC parameters
  • 5 Package mechanical data
  • 6 Part numbering
  • 7 Revision history

Features

■ Integrated, ultra low power SRAM and power- fail control circuit ■ Unlimited WRITE cycles ■ READ cycle time equals WRITE cycle time ■ Automatic power-fail chip deselect and WRITE protection ■ WRITE protect voltages PFD = Power-fail deselect voltage): –M 4 8 Z 0 2 : VCC = 4.75 to 5.5V; 4.5V ≤ VPFD ≤ 4.75V –M 4 8 Z 1 2 : VCC = 4.5 to 5.5V; 4.2V ≤ VPFD ≤ 4.5V ■ Self-contained battery in the CAPHAT™ DIP package ■ Pin and function compatible with JEDEC standard 2K x 8 SRAMs ■ RoHS compliant – Lead-free second level interconnect PCDIP24 (PC) battery CAPHAT™

1 Summary

functional compatible with the DS1220. life lithium button cell to form a highly integrated battery backed-up memory solution. over commercial operating temperature range. the number of WRITEs that can be performed. Figure 1. Logic diagram Table 1. Signal names

2 Operation modes

Table 2. Operating modes IH or VIL; VSO = Battery back-up switchover voltage.

2.1 Read mode

Enable Access time (tELQV) or Output Enable Access time (tGLQV). for Output Data Hold time (tAXQX) but will go indeterminate until the next Address Access.

  1. See Table 10 on page 16 for details.

Figure 4. Read mode AC waveforms Note: WRITE Enable (W ) = High. Table 3. Read mode AC characteristics

2.2 Write mode

and G, a low on W will disable the outputs tWLQZ after W falls.

Table 4. Write mode AC characteristics

2.3 Data retention mode

of the power supply lines is recommended. on page 11 illustrates how a BOK check routine could be structured. For more information on a Battery Storage Life refer to the Application Note AN1012.

Figure 7. Checking the BOK flag status

2.4 V CC noise and negative going transients

Figure 8 on page 12) is recommended in order to provide the needed filtering. CC to VSS (cathode connected to VCC, anode to VSS). recommended for surface mount.

Figure 8. Supply voltage protection

3 Maximum rating

Program and other relevant quality documents. Table 5. Absolute maximum ratings

  1. Soldering temperature not to exceed 260°C for 10 se conds (total thermal budget not to exceed 150°C for

4 DC and AC parameters

Table 6. Operating and AC measurement conditions Note: Output Hi-Z is defined as the point where data is no longer driven. Figure 9. AC testing load circuit Table 7. Capacitance

  1. Effective capacitance measured with power supply at 5V. Sampled only, not 100% tested.

Table 8. DC characteristics Figure 10. Power down/up mode AC waveforms

Table 9. Power down/up AC characteristics Table 10. Power down/up trip points DC characteristics

  1. V PFD (max) to VPFD (min) fall time of less than tF may result in deselection/write protection not occurring

until 200µs after VCC passes VPFD (min).

  1. V PFD (min) to VSS fall time of less than tFB may cause corruption of RAM data.
  2. All voltages referenced to V SS.

5 Package mechanical data

conditions are also marked on the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at: www.st.com. Figure 11. PCDIP24 – 24-pin plastic DIP, battery CAPHAT™, package outline Note: Drawing is not to scale. Table 11. PCDIP24 – 24-pin plastic DIP, battery CAPHAT™, package mechanical

6 Part numbering

Table 12. Ordering information scheme of this device, please contact the ST sales office nearest you.

7 Revision history

Table 13. Document revision history