Microcontroller

M430G2402IPW14RG4

Texas Instruments

MIXED SIGNAL MICROCONTROLLER REVISED MAY 2013

Manufacturer: Texas Instruments

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MSP430G2X32 TI | Alldatasheet

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 MIXEDSIGNALMICROCONTROLLER 1FEATURES 23• Low Supply VoltageRange: 1.8V to3.6V • Up to16 Capacitive-TouchEnabled I/OPins

Ultra-LowPower Consumption • UniversalSerialInterface(USI)SupportingSPI and I2C– ActiveMode: 220 µA at1 MHz, 2.2V
10-Bit200-kspsAnalog-to-Digital(A/D)– Standby Mode: 0.5µA ConverterWith InternalReference,Sample-– OffMode (RAM Retention):0.1µA and-Hold,and Autoscan (MSP430G2x32 Only)• FivePower-Saving Modes • Brownout Detector• Ultra-FastWake-Up From Standby Mode in • SerialOnboard Programming,Less Than 1 µs No ExternalProgramming VoltageNeeded,• 16-BitRISC Architecture,62.5-nsInstruction Programmable Code Protectionby SecurityCycle Time Fuse
Basic Clock Module Configurations • On-Chip EmulationLogic With Spy-Bi-Wire – InternalFrequenciesup to16 MHz With Interface Four CalibratedFrequencies • FamilyMembers areSummarized inTable1 – InternalVery-Low-Power Low-Frequency • Package Options(LF)Oscillator – TSSOP: 14 Pin,20 Pin– 32-kHz Crystal – PDIP: 20 Pin– ExternalDigitalClock Source – QFN: 16 Pin• One 16-BitTimer_A With Three • For Complete Module Descriptions,See theCapture/Compare Registers MSP430x2xx FamilyUser’s Guide (SLAU144 )

DESCRIPTION

The Texas InstrumentsMSP430 ™ familyofultra-low-powermicrocontrollersconsistofseveraldevicesfeaturing differentsetsof peripheralstargetedforvariousapplications.The architecture,combined withfivelow-power modes isoptimizedtoachieveextendedbatterylifeinportablemeasurement applications.The devicefeaturesa powerful16-bitRISC CPU, 16-bitregisters,and constantgeneratorsthatcontributetomaximum code efficiency. The digitallycontrolledoscillator(DCO) allowswake-up fromlow-powermodes toactivemode inlessthan1 µs. The MSP430G2x32 and MSP430G2x02 series of microcontrollersare ultra-low-powermixed signal microcontrollerswith built-in16-bittimers,and up to 16 I/O capacitive-touchenabled pins and built-in communicationcapabilityusingtheuniversalserialcommunicationinterface.The MSP430G2x32 serieshave a 10-bitA/D converter.For configurationdetails,see Table1.Typicalapplicationsincludelow-costsensorsystems thatcaptureanalog signals,convertthem to digitalvalues,and then process the data fordisplayor for transmissiontoa hostsystem. Pleasebe aware thatan importantnoticeconcerningavailability,standardwarranty,and use incriticalapplicationsof Texas Instrumentssemiconductorproductsand disclaimerstheretoappearsattheend ofthisdatasheet. 2MSP430 isa trademarkofTexas Instruments. 3Allothertrademarksarethepropertyoftheirrespectiveowners. PRODUCTION DATA informationiscurrentas ofpublicationdate. Copyright© 2010–2013,Texas InstrumentsIncorporatedProductsconform to specificationsper the terms of the Texas Instrumentsstandardwarranty.Productionprocessingdoes not necessarilyincludetestingofallparameters.

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table1.AvailableOptions(1) Flash RAM ADC10 PackageDevice EEM Timer_A USI CLOCK I/O(KB) (B) Channel Type (2) MSP430G2432IN20 16 20-PDIP MSP430G2432IPW20 16 20-TSSOP 1 8 256 1x TA3 8 1 LF,DCO, VLO MSP430G2432IRSA16 10 16-QFN MSP430G2432IPW14 10 14-TSSOP MSP430G2332IN20 16 20-PDIP MSP430G2332IPW20 16 20-TSSOP 1 4 256 1x TA3 8 1 LF,DCO, VLO MSP430G2332IRSA16 10 16-QFN MSP430G2332IPW14 10 14-TSSOP MSP430G2232IN20 16 20-PDIP MSP430G2232IPW20 16 20-TSSOP 1 2 256 1x TA3 8 1 LF,DCO, VLO MSP430G2232IRSA16 10 16-QFN MSP430G2232IPW14 10 14-TSSOP MSP430G2132IN20 16 20-PDIP MSP430G2132IPW20 16 20-TSSOP 1 1 128 1x TA3 8 1 LF,DCO, VLO MSP430G2132IRSA16 10 16-QFN MSP430G2132IPW14 10 14-TSSOP MSP430G2402IN20 16 20-PDIP MSP430G2402IPW20 16 20-TSSOP 1 8 256 1x TA3 - 1 LF,DCO, VLO MSP430G2402IRSA16 10 16-QFN MSP430G2402IPW14 10 14-TSSOP MSP430G2302IN20 16 20-PDIP MSP430G2302IPW20 16 20-TSSOP 1 4 256 1x TA3 - 1 LF,DCO, VLO MSP430G2302IRSA16 10 16-QFN MSP430G2302IPW14 10 14-TSSOP MSP430G2202IN20 16 20-PDIP MSP430G2202IPW20 16 20-TSSOP 1 2 256 1x TA3 - 1 LF,DCO, VLO MSP430G2202IRSA16 10 16-QFN MSP430G2202IPW14 10 14-TSSOP MSP430G2102IN20 16 20-PDIP MSP430G2102IPW20 16 20-TSSOP 1 1 128 1x TA3 - 1 LF,DCO, VLO MSP430G2102IRSA16 10 16-QFN MSP430G2102IPW14 10 14-TSSOP (1) Forthemost currentpackage and orderinginformation,see thePackage OptionAddendum attheend ofthisdocument,orsee theTI web siteatwww.ti.com. (2) Package drawings,thermaldata,and symbolizationareavailableatwww.ti.com/packaging.

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2P1.0/T A0CLK/ACLK/A0 5P1.3/ADC10CLK/VREF-/VEREF-/A3 8P2.0 9P2.1 10P2.2 1 1 P2.3 12 P2.4 13 P2.5

16 RST/NMI/SBWTDIO

17 TEST/SBWTCK

18 XOUT/P2.7 19 XIN/P2.6/T A0.1

20 DVSS

P1.6/T A0.1/ TDI/TCLKSDO/SCL/A6/ P1.7/SDI/SDA/A7/TDO/TDI P1.1/T A0.0/A1 P1.2/T A0.1/A2 P1.4/T A0.2/SMCLK/A4/ /TCKVREF+/VEREF+ P1.5/T A0.0 A5/TMS/SCLK/ 5 6 7 8

9 RST/NMI/SBWTDIO

10 TEST/SBWTCK

11 XOUT/P2.7 12 XIN/P2.6/TA0.1 AVSS DVSS AVCC DVCC P1.0/TA0CLK/ACLK/A0 P1.3/ADC10CLK/A3/VREF-/VEREF- P1.6/TA0.1/SDO/SCL/A6□TDI/TCLK/ P1.7/ /TDO/TDISDI/SDA/A7 P1.1/TA0.0/A1 P1.2/TA0.1/A2 P1.4/SMCLK/A4/VREF+/VEREF+/TCK P1.5/TA0.0/SCLK/A5/TMS 1DVCC 7 8

10 RST/NMI/SBWTDIO

12 XOUT/P2.7 13 XIN/P2.6/T A0.1

14 DVSS

P1.0/T A0CLK/ACLK/A0 P1.3/ADC10CLK/A3/VREF-/VEREF- P1.6/T A0.1/SDO/SCL/A6/TDI/TCLK P1.7 /TDO/TDI/SDI/SDA/A7 P1.1/T A0.0/A1 P1.2/T A0.1/A2 P1.4/T A0.2/SMCLK/A4/VREF+/VEREF+/TCK P1.5/T A0.0/SCLK/A5/TMS MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 DEVICE PINOUTS PW PACKAGE (TOP VIEW) NOTE: ADC10 pinfunctionsareavailableonlyon MSP430G2x32. RSA PACKAGE (TOP VIEW) NOTE: ADC10 pinfunctionsareavailableonlyon MSP430G2x32. N OR PW PACKAGE (TOP VIEW) NOTE: ADC10 pinfunctionsareavailableonlyon MSP430G2x32. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 3

Timer0_A3 3 CC Registers 16MHz CPU incl. 16 Registers Emulation 2BP JTAG Interface SMCLK ACLK MDB MAB Port P1

8 I/O

P1.x Spy-Bi Wire XIN XOUT RAM 256B 256B 256B 128B Flash 8KB 4KB 2KB 1KB P2.x Port P2 up□to 8 I/O Interrupt capability pull-up/down resistors up to 8 USI Universal Serial Interface SPI, I2C Clock System Brownout Protection RST/NMI DVCC DVSS MCLK Watchdog WDT+ 15-Bit Timer0_A3 3 CC Registers 16MHz CPU incl. 16 Registers Emulation 2BP JTAG Interface SMCLK ACLK MDB MAB Port P1 P1.x Spy-Bi Wire XIN XOUT RAM 256B 256B 256B 128B Flash 8KB 4KB 2KB 1KB P2.x Port P2 up□to 8 I/O Interrupt capability pullup/down resistors up to 8 USI Universal Serial Interface SPI, I2C ADC 10-Bit 8 Ch. Autoscan 1 ch DMA MSP430G2x32 MSP430G2x02 SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com FUNCTIONAL BLOCK DIAGRAMS FunctionalBlock Diagram,MSP430G2x32 NOTE: PortP2: Two pinsare availableon the 14-pinand 16-pinpackage options.Eightpinsare availableon the 20-pin package options. FunctionalBlock Diagram,MSP430G2x02 NOTE: PortP2: Two pinsare availableon the 14-pinand 16-pinpackage options.Eightpinsare availableon the 20-pin package options.

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 TERMINAL FUNCTIONS Table2.TerminalFunctions TERMINAL NO. I/O DESCRIPTION NAME N14, RSA1 N20, PW14 6 PW20 P1.0/ General-purposedigitalI/Opin TA0CLK/ Timer0_A,clocksignalTACLK input 2 1 2 I/O ACLK/ ACLK signaloutput A0 ADC10 analoginputA0 (1) P1.1/ General-purposedigitalI/Opin TA0.0/ 3 2 3 I/O Timer0_A,capture:CCI0A input,compare:Out0 output A1 ADC10 analoginputA1 (1) P1.2/ General-purposedigitalI/Opin TA0.1/ 4 3 4 I/O Timer0_A,capture:CCI1A input,compare:Out1 output A2 ADC10 analoginputA2 (1) P1.3/ General-purposedigitalI/Opin ADC10CLK/ ADC10, conversionclockoutput(1) 5 4 5 I/O A3/ ADC10 analoginputA3 (1) VREF-/VEREF ADC10 negativereferencevoltage(1) P1.4/ General-purposedigitalI/Opin TA0.2/ Timer0_A,capture:CCI2A input,compare:Out2 output SMCLK/ SMCLK signaloutput 6 5 6 I/O A4/ ADC10 analoginputA4 (1) VREF+/VEREF+/ ADC10 positivereferencevoltage(1) TCK JTAG testclock,inputterminalfordeviceprogrammingand test P1.5/ General-purposedigitalI/Opin TA0.0/ Timer0_A,compare:Out0 output A5/ 7 6 7 I/O ADC10 analoginputA5 (1) SCLK/ USI:clkinputinI2C mode; clkin/outputinSPI mode TMS JTAG testmode select,inputterminalfordeviceprogrammingand test P1.6/ General-purposedigitalI/Opin TA0.1/ Timer0_A,compare:Out1 output A6/ ADC10 analoginputA6 (1) SDO/ 8 7 14 I/O USI:Data outputinSPI mode SCL/ USI:I2C clockinI2C mode TDI/ JTAG testdatainputortestclockinputduringprogrammingand test TCLK P1.7/ General-purposedigitalI/Opin A7/ ADC10 analoginputA7 (1) SDI/ 9 8 15 I/O USI:Data inputinSPI mode SDA/ USI:I2C datainI2C mode TDO/TDI (2) JTAG testdataoutputterminalortestdatainputduringprogrammingand test P2.0 - - 8 I/O General-purposedigitalI/Opin P2.1 - - 9 I/O General-purposedigitalI/Opin P2.2 - - 10 I/O General-purposedigitalI/Opin P2.3 - - 11 I/O General-purposedigitalI/Opin (1) Availableonlyon MSP430G2x32 devices. (2) TDO orTDI isselectedviaJTAG instruction. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 5

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table2.TerminalFunctions(continued) TERMINAL NO. I/O DESCRIPTION NAME N14, RSA1 N20, PW14 6 PW20 P2.4 - - 12 I/O General-purposedigitalI/Opin P2.5 - - 13 I/O General-purposedigitalI/Opin XIN/ Inputterminalofcrystaloscillator P2.6/ 13 12 19 I/O General-purposedigitalI/Opin TA0.1 Timer0_A,compare:Out1 output XOUT/ Outputterminalofcrystaloscillator(3) 12 11 18 I/O P2.7 General-purposedigitalI/Opin RST/ Reset NMI/ 10 9 16 I Nonmaskable interruptinput SBWTDIO/ Spy-Bi-Wiretestdatainput/outputduringprogrammingand test TEST/ Selectstestmode forJTAG pinson Port1.The deviceprotectionfuseis connectedtoTEST.11 10 17 I SBWTCK Spy-Bi-Wiretestclockinputduringprogrammingand test DVCC 1 16 1 NA Supplyvoltage AVCC NA 15 NA NA Supplyvoltage DVSS 14 14 20 NA Ground reference AVSS NA 13 NA NA Ground reference NC - - - NA Not connected QFN Pad - Pad - NA QFN package pad connectiontoVSS recommended. (3) IfXOUT/P2.7 isused as an input,excesscurrentflowsuntilP2SEL.7 iscleared.Thisisdue totheoscillatoroutputdriverconnectionto thispad afterreset.

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 SHORT-FORM DESCRIPTION CPU The MSP430 ™ CPU has a 16-bitRISC architecture that is highlytransparentto the application.All operations,otherthan program-flowinstructions,are performedas registeroperationsinconjunctionwith seven addressingmodes forsourceoperandand four addressingmodes fordestinationoperand. The CPU isintegratedwith16 registersthatprovide reduced instructionexecutiontime.The register-to- registeroperationexecutiontimeisone cycleof the CPU clock. Four of the registers,R0 to R3, are dedicatedas program counter,stackpointer,statusregister,and constant generator,respectively.The remaining registersaregeneral-purposeregisters. Peripheralsare connected to the CPU using data, address,and controlbuses,and can be handledwith allinstructions. The instructionset consistsof the original51 instructionswith threeformatsand seven address modes and additionalinstructionsforthe expanded addressrange.Each instructioncan operateon word and bytedata. InstructionSet The instructionset consistsof 51 instructionswith three formats and seven address modes. Each instructioncan operate on word and byte data. Table 3 shows examples of the three types of instructionformats;Table 4 shows the address modes. Table3.InstructionWord Formats FORMAT EXAMPLE OPERATION Dualoperands,source-destination ADD R4,R5 R4 + R5 — > R5 Singleoperands,destinationonly CALL R8 PC — >(TOS),R8 — > PC Relativejump,un/conditional JNE Jump-on-equalbit= 0 Table4.Address Mode Descriptions(1) ADDRESS MODE S D SYNTAX EXAMPLE OPERATION Register ✓ ✓ MOV Rs,Rd MOV R10,R11 R10 ––> R11 Indexed ✓ ✓ MOV X(Rn),Y(Rm) MOV 2(R5),6(R6) M(2+R5) ––> M(6+R6) Symbolic(PC relative) ✓ ✓ MOV EDE,TONI M(EDE) ––> M(TONI) Absolute ✓ ✓ MOV &MEM, &TCDAT M(MEM) ––> M(TCDAT) Indirect ✓ MOV @Rn,Y(Rm) MOV @R10,Tab(R6) M(R10) ––> M(Tab+R6) M(R10) ––> R11Indirectautoincrement ✓ MOV @Rn+,Rm MOV @R10+,R11 R10 + 2 ––> R10 Immediate ✓ MOV #X,TONI MOV #45,TONI #45 ––> M(TONI) (1) S = source,D = destination Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 7

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com OperatingModes The MSP430 deviceshave one activemode and fivesoftwareselectablelow-powermodes of operation.An interrupteventcan wake up thedevicefromany ofthelow-powermodes, servicetherequest,and restoreback tothelow-powermode on returnfromtheinterruptprogram. The followingsixoperatingmodes can be configuredby software:

Activemode (AM) – Allclocksareactive
Low-power mode 0 (LPM0) – CPU isdisabled – ACLK and SMCLK remainactive,MCLK isdisabled
Low-power mode 1 (LPM1) – CPU isdisabled – ACLK and SMCLK remainactive,MCLK isdisabled – DCO's dc generatorisdisabledifDCO notused inactivemode
Low-power mode 2 (LPM2) – CPU isdisabled – MCLK and SMCLK aredisabled – DCO's dc generatorremainsenabled – ACLK remainsactive
Low-power mode 3 (LPM3) – CPU isdisabled – MCLK and SMCLK aredisabled – DCO's dc generatorisdisabled – ACLK remainsactive
Low-power mode 4 (LPM4) – CPU isdisabled – ACLK isdisabled – MCLK and SMCLK aredisabled – DCO's dc generatorisdisabled – Crystaloscillatorisstopped

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 InterruptVectorAddresses The interruptvectorsand thepower-upstartingaddressare locatedintheaddressrange 0FFFFh to0FFC0h. The vectorcontainsthe16-bitaddressoftheappropriateinterrupthandlerinstructionsequence. Iftheresetvector(locatedataddress0FFFEh) contains0FFFFh (forexample,ifflashisnotprogrammed) the CPU goes intoLPM4 immediatelyafterpower-up. Table5.InterruptSources,Flags,and Vectors SYSTEM WORDINTERRUPT SOURCE INTERRUPT FLAG PRIORITYINTERRUPT ADDRESS Power-Up PORIFG ExternalReset RSTIFG Watchdog Timer+ WDTIFG Reset 0FFFEh 31,highest Flashkey violation KEYV (2) PC out-of-range(1) NMI NMIIFG (non)-maskable Oscillatorfault OFIFG (non)-maskable 0FFFCh 30 Flashmemory accessviolation ACCVIFG (2)(3) (non)-maskable 0FFFAh 29 0FFF8h 28 0FFF6h 27 Watchdog Timer+ WDTIFG maskable 0FFF4h 26 Timer0_A3 TACCR0 CCIFG (4) maskable 0FFF2h 25 Timer0_A3 TACCR2 TACCR1 CCIFG. maskable 0FFF0h 24TAIFG Table3(4) 0FFEEh 23 0FFECh 22 ADC10 (5) ADC10IFG (4)(5) maskable 0FFEAh 21 USI USIIFG,USISTTIFG (2)(4) maskable 0FFE8h 20 I/OPortP2 (uptoeightflags) P2IFG.0toP2IFG.7(2)(4) maskable 0FFE6h 19 I/OPortP1 (uptoeightflags) P1IFG.0toP1IFG.7(2)(4) maskable 0FFE4h 18 0FFE2h 17 0FFE0h 16 See (6) 0FFDEh to 15 to0,lowest0FFC0h (1) A resetisgeneratediftheCPU triestofetchinstructionsfromwithinthemodule registermemory addressrange(0hto01FFh) orfrom withinunused addressranges. (2) Multiplesourceflags (3) (non)-maskable:theindividualinterrupt-enablebitcan disablean interruptevent,butthegeneralinterruptenablecannot. (4) Interruptflagsarelocatedinthemodule. (5) MSP430G2x32 only (6) The interruptvectorsataddresses0FFDEh to0FFC0h arenotused inthisdeviceand can be used forregularprogramcode if necessary. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 9

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com SpecialFunctionRegisters(SFRs) Most interruptand module enablebitsarecollectedintothelowestaddressspace.Specialfunctionregisterbits notallocatedtoa functionalpurposearenotphysicallypresentinthedevice.Simplesoftwareaccessisprovided withthisarrangement. Legend rw: Bitcan be readand written. rw-0,1: Bitcan be readand written.Itisresetorsetby PUC. rw-(0,1): Bitcan be readand written.Itisresetorsetby POR. SFR bitisnotpresentindevice. Table6.InterruptEnable Register1 and 2 Address 7 6 5 4 3 2 1 0 00h ACCVIE NMIIE OFIE WDTIE rw-0 rw-0 rw-0 rw-0 WDTIE Watchdog Timerinterruptenable.Inactiveifwatchdogmode isselected.ActiveifWatchdog Timerisconfiguredin intervaltimermode. OFIE Oscillatorfaultinterruptenable NMIIE (Non)maskableinterruptenable ACCVIE Flashaccessviolationinterruptenable Address 7 6 5 4 3 2 1 0 01h Table7.InterruptFlagRegister1 and 2 Address 7 6 5 4 3 2 1 0 02h NMIIFG RSTIFG PORIFG OFIFG WDTIFG rw-0 rw-(0) rw-(1) rw-1 rw-(0) WDTIFG Seton watchdogtimeroverflow(inwatchdogmode) orsecuritykey violation. Reseton VCC power-onora resetconditionattheRST/NMI pininresetmode. OFIFG Flagseton oscillatorfault. PORIFG Power-On Resetinterruptflag.Seton VCC power-up. RSTIFG Externalresetinterruptflag.Seton a resetconditionatRST/NMI pininresetmode. Reseton VCC power-up. NMIIFG SetviaRST/NMI pin Address 7 6 5 4 3 2 1 0 03h

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 Memory Organization Table8.Memory Organization MSP430G2102 MSP430G2202 MSP430G2302 MSP430G2402 MSP430G2132 MSP430G2232 MSP430G2332 MSP430G2432 Memory Size 1kB 2kB 4kB 8kB Main:interruptvector Flash 0xFFFF to0xFFC0 0xFFFF to0xFFC0 0xFFFF to0xFFC0 0xFFFF to0xFFC0 Main:code memory Flash 0xFFFF to0xFC00 0xFFFF to0xF800 0xFFFF to0xF000 0xFFFF to0xE000 Informationmemory Size 256 Byte 256 Byte 256 Byte 256 Byte Flash 010FFh to01000h 010FFh to01000h 010FFh to01000h 010FFh to01000h RAM Size 128 B 256 B 256 B 256 B 0x027F to0x0200 0x02FF to0x0200 0x02FF to0x0200 0x02FF to0x0200 Peripherals 16-bit 01FFh to0100h 01FFh to0100h 01FFh to0100h 01FFh to0100h 8-bit 0FFh to010h 0FFh to010h 0FFh to010h 0FFh to010h 8-bitSFR 0Fh to00h 0Fh to00h 0Fh to00h 0Fh to00h FlashMemory The flashmemory can be programmed viatheSpy-Bi-Wire/JTAGportor in-systemby theCPU. The CPU can performsingle-byteand single-wordwritestotheflashmemory. Featuresoftheflashmemory include:

Flash memory has n segments of main memory and foursegments of informationmemory (A to D) of 64 byteseach.Each segment inmain memory is512 bytesinsize.
Segments 0 ton may be erasedinone step,oreach segment may be individuallyerased.
Segments A toD can be erasedindividuallyoras a groupwithsegments 0 ton.Segments A toD arealso calledinformationmemory .
Segment A containscalibrationdata.Afterreset,segment A isprotectedagainstprogrammingand erasing.It can be unlocked,butcareshouldbe takennottoerasethissegment ifthedevice-specificcalibrationdatais required. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 11

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Peripherals Peripheralsare connectedtotheCPU throughdata,address,and controlbuses and can be handledusingall instructions.Forcompletemodule descriptions,see theMSP430x2xx FamilyUser'sGuide (SLAU144 ). Oscillatorand System Clock The clocksystem issupportedby the basicclockmodule thatincludessupportfora 32768-Hz watch crystal oscillator,an internalvery-low-powerlow-frequencyoscillator,and an internaldigitallycontrolledoscillator(DCO). The basic clockmodule is designed to meet the requirementsof both low system cost and low power consumption.The internalDCO providesa fastturn-onclocksourceand stabilizesinlessthan1 µs.The basic clockmodule providesthefollowingclocksignals:

Auxiliaryclock(ACLK),sourcedeitherfroma 32768-Hz watchcrystalortheinternalLF oscillator.
Main clock(MCLK),thesystemclockused by theCPU.
Sub-Mainclock(SMCLK), thesub-systemclockused by theperipheralmodules. The DCO settingstocalibratetheDCO outputfrequencyarestoredintheinformationmemory segment A. CalibrationData StoredinInformationMemory Segment A CalibrationdataisstoredforboththeDCO and forADC10 organizedina tag-length-valuestructure. Table9.Tags Used by theADC CalibrationTags NAME ADDRESS VALUE DESCRIPTION TAG_DCO_30 0x10F6 0x01 DCO frequencycalibrationatVCC = 3 V and TA = 30°C atcalibration TAG_ADC10_1 0x10DA 0x10 ADC10_1 calibrationtag TAG_EMPTY - 0xFE Identifierforempty memory areas Table10.LabelsUsed by theADC CalibrationTags LABEL CONDITION AT CALIBRATION /DESCRIPTION SIZE ADDRESS OFFSET CAL_ADC_25T85 INCHx = 0x1010,REF2_5 = 1,TA = 85°C word 0x0010 CAL_ADC_25T30 INCHx = 0x1010,REF2_5 = 1,TA = 30°C word 0x000E CAL_ADC_25VREF_FACTOR REF2_5 = 1,TA = 30°C, I(VREF+) = 1 mA word 0x000C CAL_ADC_15T85 INCHx = 0x1010,REF2_5 = 0,TA = 85°C word 0x000A CAL_ADC_15T30 INCHx = 0x1010,REF2_5 = 0,TA = 30°C word 0x0008 CAL_ADC_15VREF_FACTOR REF2_5 = 0,TA = 30°C, I(VREF+) = 0.5mA word 0x0006 CAL_ADC_OFFSET ExternalVREF = 1.5V,f(ADC10CLK) = 5 MHz word 0x0004 CAL_ADC_GAIN_FACTOR ExternalVREF = 1.5V,f(ADC10CLK) = 5 MHz word 0x0002 CAL_BC1_1MHz - byte 0x0009 CAL_DCO_1MHz - byte 0x00008 CAL_BC1_8MHz - byte 0x0007 CAL_DCO_8MHz - byte 0x0006 CAL_BC1_12MHz - byte 0x0005 CAL_DCO_12MHz - byte 0x0004 CAL_BC1_16MHz - byte 0x0003 CAL_DCO_16MHz - byte 0x0002

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DCO(RSEL,DCO+1)DCO(RSEL,DCO) average DCO(RSEL,DCO) DCO(RSEL,DCO+1) 32 × f × f f = MOD × f + (32 – MOD) × f MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 Main DCO Characteristics

Allranges selectedby RSELx overlapwithRSELx + 1: RSELx = 0 overlapsRSELx = 1, ...RSELx = 14 overlapsRSELx = 15.
DCO controlbitsDCOx have a stepsizeas definedby parameterSDCO .
ModulationcontrolbitsMODx selecthow oftenfDCO(RSEL,DCO+1) isused withinthe periodof 32 DCOCLK cycles.The frequencyfDCO(RSEL,DCO) isused fortheremainingcycles.The frequencyisan averageequalto: Brownout The brownoutcircuitisimplementedtoprovidetheproperinternalresetsignaltothedeviceduringpower on and power off. DigitalI/O Therearetwo 8-bitI/Oportsimplemented:
AllindividualI/Obitsareindependentlyprogrammable.
Any combinationofinput,output,and interruptcondition(portP1 and portP2 only)ispossible.
Edge-selectableinterruptinputcapabilityforalltheeightbitsofportP1 and portP2,ifavailable.
Read/writeaccesstoport-controlregistersissupportedby allinstructions.
Each I/Ohas an individuallyprogrammablepullup/pulldownresistor.
Each I/O has an individuallyprogrammable pin-oscillatorenable bitto enable low-costcapacitive-touch detection. WDT+ Watchdog Timer The primaryfunctionof the watchdog timer(WDT+) module isto performa controlledsystem restartaftera softwareproblem occurs.Ifthe selectedtime intervalexpires,a system resetisgenerated.Ifthe watchdog functionisnotneeded inan application,themodule can be disabledorconfiguredas an intervaltimerand can generateinterruptsatselectedtimeintervals. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 13

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Timer0_A3 Timer0_A3 is a 16-bittimer/counterwiththreecapture/compareregisters.Timer0_A3 can supportmultiple capture/compares,PWM outputs,and intervaltiming.Timer0_A3 also has extensiveinterruptcapabilities. Interruptsmay be generatedfrom the counteron overflowconditionsand from each of the capture/compare registers. Table11.Timer0_A3 SignalConnections(1) INPUT PIN NUMBER DEVICE MODULE MODULE OUTPUT PIN NUMBERMODULEINPUT INPUT OUTPUTBLOCKN20, PW20 PW14 RSA16 N20, PW20 PW14 RSA16SIGNAL NAME SIGNAL P1.0-2 P1.0-2 P1.0-1 TACLK TACLK ACLK ACLK Timer NA SMCLK SMCLK PinOsc PinOsc PinOsc INCLK ACLK CCI0B P1.5-7 P1.5-7 P1.5-6 CCR0 TA0 VSS GND VCC VCC CAOUT CCI1B P1.6-14 P1.6-8 P1.6-7 CCR1 TA1 VSS GND P2.6-19 P2.6-13 P2.6-12 VCC VCC PinOsc PinOsc PinOsc TA0.2 CCI2B CCR2 TA2 VSS GND VCC VCC (1) Onlyone pin-oscillatormust be enabledata time. USI The universalserialinterface(USI)module is used forserialdata communicationand providesthe basic hardwareforsynchronouscommunicationprotocolslikeSPI and I2C. ADC10 (MSP430G2x32 Only) The ADC10 module supportsfast,10-bitanalog-to-digitalconversions.The module implementsa 10-bitSAR core,sample selectcontrol,referencegeneratorand datatransfercontroller,or DTC, forautomaticconversion resulthandling,allowingADC samplestobe convertedand storedwithoutany CPU intervention.

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PeripheralFileMap Table12.PeripheralsWith Word Access REGISTERMODULE REGISTER DESCRIPTION OFFSETNAME ADC10 (MSP430G2x32 devicesonly) ADC datatransferstartaddress ADC10SA 01BCh ADC memory ADC10MEM 01B4h ADC controlregister1 ADC10CTL1 01B2h ADC controlregister0 ADC10CTL0 01B0h Timer0_A3 Capture/compareregister TACCR2 0176h Capture/compareregister TACCR1 0174h Capture/compareregister TACCR0 0172h Timer_A register TAR 0170h Capture/comparecontrol TACCTL2 0166h Capture/comparecontrol TACCTL1 0164h Capture/comparecontrol TACCTL0 0162h Timer_A control TACTL 0160h Timer_A interruptvector TAIV 012Eh FlashMemory Flashcontrol3 FCTL3 012Ch Flashcontrol2 FCTL2 012Ah Flashcontrol1 FCTL1 0128h Watchdog Timer+ Watchdog/timercontrol WDTCTL 0120h Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 15

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table13.PeripheralsWith Byte Access REGISTERMODULE REGISTER DESCRIPTION OFFSETNAME ADC10 (MSP430G2x32 devicesonly) Analogenable0 ADC10AE0 04Ah ADC datatransfercontrolregister1 ADC10DTC1 049h ADC datatransfercontrolregister0 ADC10DTC0 048h USI USI control0 USICTL0 078h USI control1 USICTL1 079h USI clockcontrol USICKCTL 07Ah USI bitcounter USICNT 07Bh USI shiftregister USISR 07Ch Basic Clock System+ Basicclocksystemcontrol3 BCSCTL3 053h Basicclocksystemcontrol2 BCSCTL2 058h Basicclocksystemcontrol1 BCSCTL1 057h DCO clockfrequencycontrol DCOCTL 056h PortP2 PortP2 selection2 P2SEL2 042h PortP2 resistorenable P2REN 02Fh PortP2 selection P2SEL 02Eh PortP2 interruptenable P2IE 02Dh PortP2 interruptedge select P2IES 02Ch PortP2 interruptflag P2IFG 02Bh PortP2 direction P2DIR 02Ah PortP2 output P2OUT 029h PortP2 input P2IN 028h PortP1 PortP1 selection2 P1SEL2 041h PortP1 resistorenable P1REN 027h PortP1 selection P1SEL 026h PortP1 interruptenable P1IE 025h PortP1 interruptedge select P1IES 024h PortP1 interruptflag P1IFG 023h PortP1 direction P1DIR 022h PortP1 output P1OUT 021h PortP1 input P1IN 020h SpecialFunction SFR interruptflag2 IFG2 003h SFR interruptflag1 IFG1 002h SFR interruptenable2 IE2 001h SFR interruptenable1 IE1 000h

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Supply voltage range , during flash memory programming Supply voltage range , during program execution Legend:

16 MHz

12 MHz

6 MHz

1.8 V Supply Voltage - V 3.3 V2.7 V2.2 V 3.6 V MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 AbsoluteMaximum Ratings(1) VoltageappliedatVCC toVSS –0.3V to4.1V Voltageappliedtoany pin(2) –0.3V toVCC + 0.3V Diodecurrentatany devicepin ±2 mA Unprogrammed device –55°C to150°C Storagetemperaturerange,Tstg (3) Programmed device –55°C to150°C (1) Stressesbeyond thoselistedunder"absolutemaximum ratings"may cause permanentdamage tothedevice.These arestressratings only,and functionaloperationofthedeviceattheseorany otherconditionsbeyond thoseindicatedunder"recommended operating conditions"isnotimplied.Exposuretoabsolute-maximum-ratedconditionsforextendedperiodsmay affectdevicereliability. (2) AllvoltagesreferencedtoVSS .The JTAG fuse-blowvoltage,VFB ,isallowedtoexceed theabsolutemaximum rating.The voltageis appliedtotheTEST pinwhen blowingtheJTAG fuse. (3) Highertemperaturemay be appliedduringboardsolderingaccordingtothecurrentJEDEC J-STD-020specificationwithpeak reflow temperaturesnothigherthanclassifiedon thedevicelabelon theshippingboxes orreels. Recommended OperatingConditions TypicalvaluesarespecifiedatVCC = 3.3V and TA = 25°C (unlessotherwisenoted) MIN NOM MAX UNIT Duringprogramexecution 1.8 3.6 VCC Supplyvoltage V Duringflashprogramming/erase 2.2 3.6 VSS Supplyvoltage 0 V TA Operatingfree-airtemperature -40 85 °C VCC = 1.8V, dc 6Dutycycle= 50% ± 10% Processorfrequency(maximum MCLK frequency VCC = 2.7V,fSYSTEM dc 12 MHzusingtheUSART module)(1)(2) Dutycycle= 50% ± 10% VCC = 3.3V, dc 16Dutycycle= 50% ± 10% (1) The MSP430 CPU isclockeddirectlywithMCLK. Boththehighand lowphase ofMCLK must notexceed thepulsewidthofthe specifiedmaximum frequency. (2) Modules mighthave a differentmaximum inputclockspecification.See thespecificationoftherespectivemodule inthisdatasheet. Note: Minimum processorfrequencyisdefinedby system clock.Flashprogram oreraseoperationsrequirea minimum VCC of2.2V. Figure1. Safe OperatingArea Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 17

0.0 1.0 2.0 3.0 4.0 5.0 VCC − Supply Voltage − V Active Mode Current − mA fDCO = 1 MHz fDCO = 8 MHz fDCO = 12 MHz fDCO = 16 MHz 0.0 1.0 2.0 3.0 4.0 fDCO − DCO Frequency − MHz Active Mode Current − mA TA = 25 °C TA = 85 °C VCC = 2.2 V VCC = 3 V TA = 25 °C TA = 85 °C MSP430G2x32 MSP430G2x02 SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com ElectricalCharacteristics ActiveMode Supply CurrentIntoVCC ExcludingExternalCurrent overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(1)(2) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fDCO = fMCLK = fSMCLK = 1 MHz, 2.2V 220 fACLK = 32768 Hz, Program executesinflash,Activemode (AM)IAM,1MHz BCSCTL1 = CALBC1_1MHZ, µAcurrent(1MHz) 3 V 320 400DCOCTL = CALDCO_1MHZ, CPUOFF = 0,SCG0 = 0,SCG1 = 0, OSCOFF = 0 (1) Allinputsaretiedto0 V ortoVCC .Outputsdo notsourceorsinkany current. (2) The currentsarecharacterizedwitha MicroCrystalCC4V-T1A SMD crystalwitha loadcapacitanceof9 pF.The internaland external loadcapacitanceischosen tocloselymatch therequired9 pF. TypicalCharacteristics– ActiveMode Supply Current(IntoVCC ) Figure2.ActiveMode Currentvs VCC ,TA = 25°C Figure3.ActiveMode Currentvs DCO Frequency

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0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0.0 I − Low−power mode current − µALPM3 V = 3.6 VCC TA − Temperature − °C V = 1.8 VCC V = 3 VCC V = 2.2 VCC 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 TA − Temperature − C V = 3.6 VCC TA − Temperature − C I − Low−power mode current − µALPM4 V = 1.8 VCC V = 3 VCC V = 2.2 VCC MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 Low-Power Mode Supply Currents(IntoVCC )ExcludingExternalCurrent overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(1)(2) PARAMETER TEST CONDITIONS TA VCC MIN TYP MAX UNIT fMCLK = 0 MHz, fSMCLK = fDCO = 1 MHz, fACLK = 32768 Hz,Low-power mode 0ILPM0,1MHz BCSCTL1 = CALBC1_1MHZ, 25°C 2.2V 55 µA(LPM0) current(3) DCOCTL = CALDCO_1MHZ, CPUOFF = 1,SCG0 = 0,SCG1 = 0, OSCOFF = 0 fMCLK = fSMCLK = 0 MHz, fDCO = 1 MHz, fACLK = 32768 Hz,Low-power mode 2ILPM2 BCSCTL1 = CALBC1_1MHZ, 25°C 2.2V 22 µA(LPM2) current(4) DCOCTL = CALDCO_1MHZ, CPUOFF = 1,SCG0 = 0,SCG1 = 1, OSCOFF = 0 fDCO = fMCLK = fSMCLK = 0 MHz, Low-power mode 3 fACLK = 32768 Hz,ILPM3,LFXT1 25°C 2.2V 0.7 1.0 µA(LPM3) current(4) CPUOFF = 1,SCG0 = 1,SCG1 = 1, OSCOFF = 0 fDCO = fMCLK = fSMCLK = 0 MHz, Low-power mode 3 fACLK frominternalLF oscillator(VLO),ILPM3,VLO 25°C 2.2V 0.5 0.7 µAcurrent,(LPM3)(4) CPUOFF = 1,SCG0 = 1,SCG1 = 1, OSCOFF = 0 fDCO = fMCLK = fSMCLK = 0 MHz, 25°C 2.2V 0.1 0.5 µA Low-power mode 4 fACLK = 0 Hz,ILPM4 (LPM4) current(5) CPUOFF = 1,SCG0 = 1,SCG1 = 1, 85°C 2.2V 0.8 1.5 µA OSCOFF = 1 (1) Allinputsaretiedto0 V ortoVCC .Outputsdo notsourceorsinkany current. (2) The currentsarecharacterizedwitha MicroCrystalCC4V-T1A SMD crystalwitha loadcapacitanceof9 pF. (3) Currentforbrownoutand WDT clockedby SMCLK included. (4) Currentforbrownoutand WDT clockedby ACLK included. (5) Currentforbrownoutincluded. TypicalCharacteristicsLow-Power Mode Supply Currents overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) Figure4.LPM3 Currentvs Temperature Figure5.LPM4 Currentvs Temperature Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 19

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Schmitt-TriggerInputs– PortsPx (1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT 0.45VCC 0.75VCC VIT+ Positive-goinginputthresholdvoltage V 3 V 1.35 2.25 0.25VCC 0.55VCC VIT– Negative-goinginputthresholdvoltage V 3 V 0.75 1.65 Vhys Inputvoltagehysteresis(VIT+ – VIT–) 3 V 0.3 1 V Forpullup:VIN = VSSR Pull Pullup/pulldownresistor 3 V 20 35 50 kΩForpulldown:VIN = VCC C I Inputcapacitance VIN = VSS orVCC 5 pF (1) An externalsignalsetstheinterruptflageverytimetheminimum interruptpulsewidtht(int)ismet.Itmay be seteven withtriggersignals shorterthant(int). Leakage Current– PortsPx overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN MAX UNIT Ilkg(Px.x) High-impedanceleakagecurrent (1)(2) 3 V ±50 nA (1) The leakagecurrentismeasured withVSS orVCC appliedtothecorrespondingpin(s),unlessotherwisenoted. (2) The leakageofthedigitalportpinsismeasured individually.The portpinisselectedforinput,and thepullup/pulldownresistoris disabled. Outputs – PortsPx overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VOH High-leveloutputvoltage I(OHmax) = –6 mA (1) 3 V VCC – 0.3 V VOL Low-leveloutputvoltage I(OLmax) = 6 mA (1) 3 V VSS + 0.3 V (1) The maximum totalcurrent,I(OHmax) and I(OLmax),foralloutputscombined shouldnotexceed ±48 mA toholdthemaximum voltagedrop specified. Output Frequency – PortsPx overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fPx.y Portoutputfrequency(withload) Px.y,C L = 20 pF,R L = 1 kΩ(1)(2) 3 V 12 MHz fPort_CLK Clockoutputfrequency Px.y,C L = 20 pF (2) 3 V 16 MHz (1) A resistivedividerwithtwo 0.5-kΩ resistorsbetween VCC and VSS isused as load.The outputisconnectedtothecentertapofthe divider. (2) The outputvoltagereachesatleast10% and 90% VCC atthespecifiedtogglefrequency.

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VOH − High-Level Output Voltage − V −25.0 −20.0 −15.0 −10.0 −5.0 0.0 VCC = 2.2 V P1.7 TYPICAL HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE TA = 25°C TA = 85°C OHI − Typical High-Level Output Current − mA VOH − High-Level Output Voltage − V −50.0 −40.0 −30.0 −20.0 −10.0 0.0 VCC = 3 V P1.7 TYPICAL HIGH-LEVEL OUTPUT CURRENT vs HIGH-LEVEL OUTPUT VOLTAGE TA = 25°C TA = 85°C OHI − Typical High-Level Output Current − mA VOL − Low-Level Output Voltage − V 0.0 5.0 10.0 15.0 20.0 25.0 30.0 VCC = 2.2 V P1.7 TYPICAL LOW -LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TA = 25°C TA = 85°C OLI − Typical Low-Level Output Current − mA VOL − Low-Level Output Voltage − V 0.0 10.0 20.0 30.0 40.0 50.0 VCC = 3 V P1.7 TYPICAL LOW -LEVEL OUTPUT CURRENT vs LOW-LEVEL OUTPUT VOLTAGE TA = 25°C TA = 85°C OLI − Typical Low-Level Output Current − mA MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 TypicalCharacteristics– Outputs overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) Figure6. Figure7. Figure8. Figure9. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 21

CLOAD − External Capacitance − pF 0.00 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50 10 50 100 P1.y P2.6, P2.7 VCC = 2.2 V TYPICAL OSCILLATING FREQUENCY vs LOAD CAPACITANCE fosc − Typical Oscillation Frequency − MHz CLOAD − External Capacitance − pF 0.00 0.15 0.30 0.45 0.60 0.75 0.90 1.05 1.20 1.35 1.50 10 50 100 P1.y P2.6, P2.7 VCC = 3.0 V TYPICAL OSCILLATING FREQUENCY vs LOAD CAPACITANCE fosc − Typical Oscillation Frequency − MHz MSP430G2x32 MSP430G2x02 SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Pin-OscillatorFrequency – PortsPx overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT P1.y,C L = 10 pF,R L = 100 kΩ(1)(2) 1400 foP1.x Portoutputoscillationfrequency 3 V kHz P1.y,C L = 20 pF,R L = 100 kΩ(1)(2) 900 P2.0toP2.5,C L = 10 pF,R L = 100 kΩ(1)(2) 1800 foP2.x Portoutputoscillationfrequency 3 V kHz P2.0toP2.5,C L = 20 pF,R L = 100 kΩ(1)(2) 1000 P2.6and P2.7,C L = 20 pF,R L = 100foP2.6/7 Portoutputoscillationfrequency 3 V 700 kHzkΩ(1)(2) (1) A resistivedividerwithtwo 50-kΩ resistorsbetween VCC and VSS isused as load.The outputisconnectedtothecentertapofthe divider. (2) The outputvoltageoscillateswitha typicalamplitudeof700 mV atthespecifiedtogglefrequency. TypicalCharacteristics– Pin-OscillatorFrequency Figure10. Figure11.

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t d(BOR) VCC V(B_IT−) Vhys(B_IT−) VCC(star t) MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 POR, BOR (1)(2) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VCC(start) See Figure12 dVCC /dt≤ 3 V/s 0.7× V(B_IT–) V V(B_IT–) See Figure12 throughFigure14 dVCC /dt≤ 3 V/s 1.40 V Vhys(B_IT–) See Figure12 dVCC /dt≤ 3 V/s 140 mV td(BOR) See Figure12 2000 µs Pulselengthneeded atRST/NMI pintot(reset) 2.2V 2 µsacceptedresetinternally (1) The currentconsumptionofthebrownoutmodule isalreadyincludedintheICC currentconsumptiondata.The voltagelevelV(B_IT–) + Vhys(B_IT–)is≤ 1.8V. (2) Duringpower up,theCPU beginscode executionfollowinga periodoftd(BOR) afterVCC = V(B_IT–) + Vhys(B_IT–).The defaultDCO settings must notbe changed untilVCC ≥ VCC(min),where VCC(min) istheminimum supplyvoltageforthedesiredoperatingfrequency. Figure12. POR and BOR vs Supply Voltage Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 23

0.5 1.5 VCC(drop) t pw tpw − Pulse Width − µs VCC(drop) − V 3 V 0.001 1 1000 tf tr tpw − Pulse Width − µs tf = tr Typical Conditions VCC = 3 V VCC(drop) VCC 3 V t pw 0.5 1.5 0.001 1 1000 Typical Conditions 1 ns 1 ns tpw − Pulse Width − µs VCC(drop) − V tpw − Pulse Width − µs VCC = 3 V MSP430G2x32 MSP430G2x02 SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com TypicalCharacteristics– POR/Brownout Reset (BOR) Figure13.VCC(drop) LevelWith a Square VoltageDrop toGenerate a POR or BOR Signal Figure14.VCC(drop) LevelWith a TriangleVoltageDrop toGenerate a POR or BOR Signal

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 DCO Frequency overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT RSELx < 14 1.8 3.6 V VCC Supplyvoltage RSELx = 14 2.2 3.6 V RSELx = 15 3 3.6 V fDCO(0,0) DCO frequency(0,0) RSELx = 0,DCOx = 0,MODx = 0 3 V 0.06 0.14 MHz fDCO(0,3) DCO frequency(0,3) RSELx = 0,DCOx = 3,MODx = 0 3 V 0.07 0.17 MHz fDCO(1,3) DCO frequency(1,3) RSELx = 1,DCOx = 3,MODx = 0 3 V 0.15 MHz fDCO(2,3) DCO frequency(2,3) RSELx = 2,DCOx = 3,MODx = 0 3 V 0.21 MHz fDCO(3,3) DCO frequency(3,3) RSELx = 3,DCOx = 3,MODx = 0 3 V 0.30 MHz fDCO(4,3) DCO frequency(4,3) RSELx = 4,DCOx = 3,MODx = 0 3 V 0.41 MHz fDCO(5,3) DCO frequency(5,3) RSELx = 5,DCOx = 3,MODx = 0 3 V 0.58 MHz fDCO(6,3) DCO frequency(6,3) RSELx = 6,DCOx = 3,MODx = 0 3 V 0.54 1.06 MHz fDCO(7,3) DCO frequency(7,3) RSELx = 7,DCOx = 3,MODx = 0 3 V 0.80 1.50 MHz fDCO(8,3) DCO frequency(8,3) RSELx = 8,DCOx = 3,MODx = 0 3 V 1.6 MHz fDCO(9,3) DCO frequency(9,3) RSELx = 9,DCOx = 3,MODx = 0 3 V 2.3 MHz fDCO(10,3) DCO frequency(10,3) RSELx = 10,DCOx = 3,MODx = 0 3 V 3.4 MHz fDCO(11,3) DCO frequency(11,3) RSELx = 11,DCOx = 3,MODx = 0 3 V 4.25 MHz fDCO(12,3) DCO frequency(12,3) RSELx = 12,DCOx = 3,MODx = 0 3 V 4.30 7.30 MHz fDCO(13,3) DCO frequency(13,3) RSELx = 13,DCOx = 3,MODx = 0 3 V 6.00 9.60 MHz fDCO(14,3) DCO frequency(14,3) RSELx = 14,DCOx = 3,MODx = 0 3 V 8.60 13.9 MHz fDCO(15,3) DCO frequency(15,3) RSELx = 15,DCOx = 3,MODx = 0 3 V 12.0 18.5 MHz fDCO(15,7) DCO frequency(15,7) RSELx = 15,DCOx = 7,MODx = 0 3 V 16.0 26.0 MHz FrequencystepbetweenSRSEL SRSEL = fDCO(RSEL+1,DCO) /fDCO(RSEL,DCO) 3 V 1.35 ratiorangeRSEL and RSEL+1 FrequencystepbetweenSDCO SDCO = fDCO(RSEL,DCO+1) /fDCO(RSEL,DCO) 3 V 1.08 ratiotapDCO and DCO+1 Dutycycle Measured atSMCLK output 3 V 50 % Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 25

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com CalibratedDCO Frequencies– Tolerance overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS TA VCC MIN TYP MAX UNIT BCSCTL1= CALBC1_1MHZ,1-MHz toleranceover DCOCTL = CALDCO_1MHZ, 0°C to85°C 3 V -3 ±0.5 +3 %temperature(1) calibratedat30°C and 3 V BCSCTL1= CALBC1_1MHZ, 1-MHz toleranceoverVCC DCOCTL = CALDCO_1MHZ, 30°C 1.8V to3.6V -3 ±2 +3 % calibratedat30°C and 3 V BCSCTL1= CALBC1_1MHZ, 1-MHz toleranceoverall DCOCTL = CALDCO_1MHZ, -40°C to85°C 1.8V to3.6V -6 ±3 +6 % calibratedat30°C and 3 V BCSCTL1= CALBC1_8MHZ,8-MHz toleranceover DCOCTL = CALDCO_8MHZ, 0°C to85°C 3 V -3 ±0.5 +3 %temperature(1) calibratedat30°C and 3 V BCSCTL1= CALBC1_8MHZ, 8-MHz toleranceoverVCC DCOCTL = CALDCO_8MHZ, 30°C 2.2V to3.6V -3 ±2 +3 % calibratedat30°C and 3 V BCSCTL1= CALBC1_8MHZ, 8-MHz toleranceoverall DCOCTL = CALDCO_8MHZ, -40°C to85°C 2.2V to3.6V -6 ±3 +6 % calibratedat30°C and 3 V BCSCTL1= CALBC1_12MHZ,12-MHz toleranceover DCOCTL = CALDCO_12MHZ, 0°C to85°C 3 V -3 ±0.5 +3 %temperature(1) calibratedat30°C and 3 V BCSCTL1= CALBC1_12MHZ, 12-MHz toleranceoverVCC DCOCTL = CALDCO_12MHZ, 30°C 2.7V to3.6V -3 ±2 +3 % calibratedat30°C and 3 V BCSCTL1= CALBC1_12MHZ, 12-MHz toleranceoverall DCOCTL = CALDCO_12MHZ, -40°C to85°C 2.7V to3.6V -6 ±3 +6 % calibratedat30°C and 3 V BCSCTL1= CALBC1_16MHZ,16-MHz toleranceover DCOCTL = CALDCO_16MHZ, 0°C to85°C 3.3V -3 ±0.5 +3 %temperature(1) calibratedat30°C and 3 V BCSCTL1= CALBC1_16MHZ, 16-MHz toleranceoverVCC DCOCTL = CALDCO_16MHZ, 30°C 3.3V to3.6V -3 ±2 +3 % calibratedat30°C and 3 V BCSCTL1= CALBC1_16MHZ, 16-MHz toleranceoverall DCOCTL = CALDCO_16MHZ, -40°C to85°C 3.3V to3.6V -6 ±3 +6 % calibratedat30°C and 3 V (1) Thisisthefrequencychange fromthemeasured frequencyat30°C overtemperature.

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DCO Frequency − MHz 0.10 1.00 10.00 0.10 1.00 10.00 DCO Wake Time − us RSELx = 0...1 1 RSELx = 12...15 MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 Wake-Up From Lower-Power Modes (LPM3. LPM4) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT DCO clockwake-up timefromLPM3 BCSCTL1 = CALBC1_1MHZ,tDCO,LPM3/4 3 V 1.5 µsorLPM4 (1) DCOCTL = CALDCO_1MHZ CPU wake-up timefromLPM3 or 1/fMCLK +tCPU,LPM3/4 LPM4 (2) tClock,LPM3/4 (1) The DCO clockwake-up timeismeasured fromtheedge ofan externalwake-up signal(forexample,a portinterrupt)tothefirstclock edge observableexternallyon a clockpin(MCLK orSMCLK). (2) ParameterapplicableonlyifDCOCLK isused forMCLK. TypicalCharacteristics– DCO Clock Wake-Up Time From LPM3 or LPM4 Figure15.DCO Wake-Up Time From LPM3 vs DCO Frequency Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 27

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com CrystalOscillator,XT1, Low-Frequency Mode (1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT LFXT1 oscillatorcrystalfLFXT1,LF XTS = 0,LFXT1Sx = 0 or1 1.8V to3.6V 32768 Hzfrequency,LF mode 0,1 LFXT1 oscillatorlogiclevel fLFXT1,LF,logic squarewave inputfrequency,XTS = 0,XCAPx = 0,LFXT1Sx = 3 1.8V to3.6V 10000 32768 50000 Hz LF mode XTS = 0,LFXT1Sx = 0, 500fLFXT1,LF = 32768 Hz,C L,eff= 6 pFOscillationallowanceforOA LF kΩLF crystals XTS = 0,LFXT1Sx = 0, 200fLFXT1,LF = 32768 Hz,C L,eff= 12 pF XTS = 0,XCAPx = 0 1 XTS = 0,XCAPx = 1 5.5IntegratedeffectiveloadC L,eff pFcapacitance,LF mode (2) XTS = 0,XCAPx = 2 8.5 XTS = 0,XCAPx = 3 11 XTS = 0,Measured atP2.0/ACLK,Dutycycle LF mode 2.2V 30 50 70 %fLFXT1,LF = 32768 Hz Oscillatorfaultfrequency,fFault,LF XTS = 0,XCAPx = 0,LFXT1Sx = 3(4) 2.2V 10 10000 HzLF mode (3) (1) To improveEMI on theXT1 oscillator,thefollowingguidelinesshouldbe observed. (a) Keep thetracebetween thedeviceand thecrystalas shortas possible. (b) Designa good groundplanearoundtheoscillatorpins. (c)PreventcrosstalkfromotherclockordatalinesintooscillatorpinsXIN and XOUT. (d) AvoidrunningPCB tracesunderneathoradjacenttotheXIN and XOUT pins. (e) Use assemblymaterialsand praxistoavoidany parasiticloadon theoscillatorXIN and XOUT pins. (f)Ifconformalcoatingisused,ensurethatitdoes notinducecapacitiveorresistiveleakagebetween theoscillatorpins. (g) Do notroutetheXOUT linetotheJTAG headertosupporttheserialprogrammingadapteras shown inotherdocumentation.This signalisno longerrequiredfortheserialprogrammingadapter. (2) Includesparasiticbond and package capacitance(approximately2 pF perpin). Because thePCB adds additionalcapacitance,itisrecommended toverifythecorrectloadby measuringtheACLK frequency.Fora correctsetup,theeffectiveloadcapacitanceshouldalwaysmatch thespecificationoftheused crystal. (3) FrequenciesbelowtheMIN specificationsetthefaultflag.Frequenciesabove theMAX specificationdo notsetthefaultflag. Frequenciesinbetween mightsettheflag. (4) Measured withlogic-levelinputfrequencybutalsoappliestooperationwithcrystals. InternalVery-Low-Power Low-Frequency Oscillator(VLO) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TA VCC MIN TYP MAX UNIT fVLO VLO frequency -40°C to85°C 3 V 4 12 20 kHz dfVLO /dT VLO frequencytemperaturedrift -40°C to85°C 3 V 0.5 %/°C dfVLO /dVCC VLO frequencysupplyvoltagedrift 25°C 1.8V to3.6V 4 %/V Timer_A overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT SMCLKfTA Timer_A inputclockfrequency fSYSTEM MHzDutycycle= 50% ± 10% tTA,cap Timer_A capturetiming TA0, TA1 3 V 20 ns

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VOL − Low-Level Output Voltage − V 0.0 1.0 2.0 3.0 4.0 5.0 VCC = 2.2 V TA = 25°C OLI − Low-Level Output Current − mA TA = 85°C VOL − Low-Level Output Voltage − V 0.0 1.0 2.0 3.0 4.0 5.0 VCC = 3 V TA = 25°C OLI − Low-Level Output Current − mA TA = 85°C MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 USI,UniversalSerialInterface overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT External:SCLK,fUSI USI module clockfrequency fSYSTEM MHzDutycycle= 50% ± 10% f(SCLK) Serialclockfrequency,slavemode SPI slavemode 3 V 6 MHz USI module inI2C mode, VSSVOL,I2C Low-leveloutputvoltageon SDA and SCL 3 V VSS VI(OLmax) = 1.5mA + 0.4 TypicalCharacteristics– USI Low-Level Output Voltageon SDA and SCL Figure16.USI Low-Level Output Voltagevs Output Current Figure17.USI Low-Level Output Voltagevs Output Current Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 29

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com 10-BitADC, Power Supply and InputRange Conditions(MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted)(1) PARAMETER TEST CONDITIONS TA VCC MIN TYP MAX UNIT VCC Analogsupplyvoltage VSS = 0 V 2.2 3.6 V AllAx terminals,AnaloginputsVAx Analoginputvoltage(2) 3 V 0 VCC VselectedinADC10AE register fADC10CLK = 5.0MHz, ADC10ON = 1,REFON = 0,IADC10 ADC10 supplycurrent(3) 25°C 3 V 0.6 mAADC10SHT0 = 1,ADC10SHT1 = 0, ADC10DIV = 0 fADC10CLK = 5.0MHz, ADC10ON = 0,REF2_5V = 0, 0.25 REFON = 1,REFOUT = 0Referencesupplycurrent,IREF+ 25°C 3 V mAreferencebufferdisabled(4) fADC10CLK = 5.0MHz, ADC10ON = 0,REF2_5V = 1, 0.25 REFON = 1,REFOUT = 0 fADC10CLK = 5.0MHz, Referencebuffersupply ADC10ON = 0,REFON = 1,IREFB,0 25°C 3 V 1.1 mAcurrentwithADC10SR = 0(4) REF2_5V = 0,REFOUT = 1, ADC10SR = 0 fADC10CLK = 5.0MHz, Referencebuffersupply ADC10ON = 0,REFON = 1,IREFB,1 25°C 3 V 0.5 mAcurrentwithADC10SR = 1(4) REF2_5V = 0,REFOUT = 1, ADC10SR = 1 Onlyone terminalAx can be selectedC I Inputcapacitance 25°C 3 V 27 pFatone time R I InputMUX ON resistance 0 V ≤ VAx ≤ VCC 25°C 3 V 1000 Ω (1) The leakagecurrentisdefinedintheleakagecurrenttablewithPx.x/Axparameter. (2) The analoginputvoltagerangemust be withintheselectedreferencevoltagerangeVR+ toVR – forvalidconversionresults. (3) The internalreferencesupplycurrentisnotincludedincurrentconsumptionparameterIADC10 . (4) The internalreferencecurrentissuppliedviaterminalVCC .ConsumptionisindependentoftheADC10ON controlbit,unlessa conversionisactive.The REFON bitenablesthebuilt-inreferencetosettlebeforestartingan A/D conversion.

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 10-BitADC, Built-InVoltageReference(MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT IVREF+ ≤ 1 mA, REF2_5V = 0 2.2Positivebuilt-inreferenceVCC,REF+ Vanalogsupplyvoltagerange IVREF+ ≤ 1 mA, REF2_5V = 1 2.9 Maximum VREF+ loadILD,VREF+ 3 V ±1 mAcurrent IVREF+ = 500 µA ± 100 µA, AnaloginputvoltageVAx ≈ 0.75V, ±2 REF2_5V = 0 VREF+ loadregulation 3 V LSB IVREF+ = 500 µA ± 100 µA, AnaloginputvoltageVAx ≈ 1.25V, ±2 REF2_5V = 1 IVREF+ = 100 µA→900 µA, VREF+ loadregulation VAx ≈ 0.5× VREF+, 3 V 400 nsresponsetime Errorofconversionresult≤ 1 LSB, ADC10SR = 0 Maximum capacitanceatC VREF+ IVREF+ ≤ ±1 mA, REFON = 1,REFOUT = 1 3 V 100 pFpinVREF+ ppm/TC REF+ Temperaturecoefficient(1) IVREF+ = constwith0 mA ≤ IVREF+ ≤ 1 mA 3 V ±100 °C Settlingtimeofinternal IVREF+ = 0.5mA, REF2_5V = 0,tREFON referencevoltageto99.9% 3.6V 30 µsREFON = 0 → 1VREF IVREF+ = 0.5mA,SettlingtimeofreferencetREFBURST REF2_5V = 1,REFON = 1, 3 V 2 µsbufferto99.9% VREF REFBURST = 1,ADC10SR = 0 (1) Calculatedusingthebox method:(MAX(-40to85°C) – MIN(-40to85°C))/MIN(-40to85°C) /(85°C – (–40°C)) Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 31

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com 10-BitADC, ExternalReference(1)(MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VEREF+ > VEREF –, 1.4 VCCSREF1 = 1,SREF0 = 0PositiveexternalreferenceinputVEREF+ Vvoltagerange(2) VEREF – ≤ VEREF+ ≤ VCC – 0.15V, 1.4 3SREF1 = 1,SREF0 = 1 (3) NegativeexternalreferenceinputVEREF – VEREF+ > VEREF – 0 1.2 Vvoltagerange(4) Differentialexternalreference ΔVEREF inputvoltagerange, VEREF+ > VEREF – (5) 1.4 VCC V ΔVEREF = VEREF+ – VEREF –

0 V ≤ VEREF+ ≤ VCC , ±1SREF1 = 1,SREF0 = 0

IVEREF+ StaticinputcurrentintoVEREF+ 3 V µA 0 V ≤ VEREF+ ≤ VCC – 0.15V ≤ 3 V, 0SREF1 = 1,SREF0 = 1(3) IVEREF – StaticinputcurrentintoVEREF – 0 V ≤ VEREF – ≤ VCC 3 V ±1 µA (1) The externalreferenceisused duringconversiontochargeand dischargethecapacitancearray.The inputcapacitance,C I,isalsothe dynamicloadforan externalreferenceduringconversion.The dynamicimpedance ofthereferencesupplyshouldfollowthe recommendationson analog-sourceimpedance toallowthechargetosettlefor10-bitaccuracy. (2) The accuracylimitstheminimum positiveexternalreferencevoltage.Lower referencevoltagelevelsmay be appliedwithreduced accuracyrequirements. (3) Under thisconditiontheexternalreferenceisinternallybuffered.The referencebufferisactiveand requiresthereferencebuffersupply currentIREFB .The currentconsumptioncan be limitedtothesample and conversionperiodwithREBURST = 1. (4) The accuracylimitsthemaximum negativeexternalreferencevoltage.Higherreferencevoltagelevelsmay be appliedwithreduced accuracyrequirements. (5) The accuracylimitstheminimum externaldifferentialreferencevoltage.Lower differentialreferencevoltagelevelsmay be appliedwith reducedaccuracyrequirements. 10-BitADC, Timing Parameters (MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT ADC10SR = 0 0.45 6.3ADC10 inputclock ForspecifiedperformanceoffADC10CLK 3 V MHzfrequency ADC10 linearityparameters ADC10SR = 1 0.45 1.5 ADC10 built-inoscillatorADC10DIVx = 0,ADC10SSELx = 0,fADC10OSC 3 V 3.7 6.3 MHzfrequency fADC10CLK = fADC10OSC ADC10 built-inoscillator,ADC10SSELx = 0, 3 V 2.06 3.51fADC10CLK = fADC10OSC tCONVERT Conversiontime µs13 ×fADC10CLK fromACLK, MCLK, orSMCLK: ADC10DIV ×ADC10SSELx ≠ 0 1/fADC10CLK Turn-onsettlingtimeoftADC10ON (1) 100 nstheADC (1) The conditionisthattheerrorina conversionstartedaftertADC10ON islessthan±0.5LSB. The referenceand inputsignalarealready settled. 10-BitADC, LinearityParameters (MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT EI Integrallinearityerror 3 V ±1 LSB ED Differentiallinearityerror 3 V ±1 LSB EO Offseterror Sourceimpedance R S < 100 Ω 3 V ±1 LSB EG Gain error 3 V ±1.1 ±2 LSB ET Totalunadjustederror 3 V ±2 ±5 LSB

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www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 10-BitADC, Temperature Sensor and Built-InVMID (MSP430G2x32 Only) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT Temperaturesensorsupply REFON = 0,INCHx = 0Ah,ISENSOR 3 V 60 µAcurrent(1) TA = 25°C TC SENSOR ADC10ON = 1,INCHx = 0Ah (2) 3 V 3.55 mV/°C Sample timerequiredifchannel ADC10ON = 1,INCHx = 0Ah,tSensor(sample) 3 V 30 µs10 isselected(3) Errorofconversionresult≤ 1 LSB IVMID Currentintodivideratchannel11 ADC10ON = 1,INCHx = 0Bh 3 V (4) µA ADC10ON = 1,INCHx = 0Bh,VMID VCC divideratchannel11 3 V 1.5 VVMID ≈ 0.5× VCC Sample timerequiredifchannel ADC10ON = 1,INCHx = 0Bh,tVMID(sample) 3 V 1220 ns11 isselected(5) Errorofconversionresult≤ 1 LSB (1) The sensorcurrentISENSOR isconsumed if(ADC10ON = 1 and REFON = 1)or(ADC10ON = 1 and INCH = 0Ah and sample signalis high).When REFON = 1,ISENSOR isincludedinIREF+ .When REFON = 0,ISENSOR appliesduringconversionofthetemperaturesensor input(INCH = 0Ah). (2) The followingformulacan be used tocalculatethetemperaturesensoroutputvoltage: VSensor,typ= TC Sensor (273+ T [°C] )+ VOffset,sensor[mV]or VSensor,typ= TC Sensor T [°C] + VSensor(TA = 0°C) [mV] (3) The typicalequivalentimpedance ofthesensoris51 kΩ.The sample timerequiredincludesthesensor-ontimetSENSOR(on) . (4) No additionalcurrentisneeded.The VMID isused duringsampling. (5) The on-timetVMID(on) isincludedinthesamplingtimetVMID(sample);no additionalon timeisneeded. FlashMemory overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT VCC(PGM/ERASE) Program and erasesupplyvoltage 2.2 3.6 V fFTG Flashtiminggeneratorfrequency 257 476 kHz IPGM SupplycurrentfromVCC duringprogram 2.2V,3.6V 1 5 mA IERASE SupplycurrentfromVCC duringerase 2.2V,3.6V 1 7 mA tCPT Cumulativeprogramtime(1) 2.2V,3.6V 10 ms tCMErase Cumulativemass erasetime 2.2V,3.6V 20 ms Program and eraseendurance 104 105 cycles tRetention Data retentionduration TJ = 25°C 100 years tWord Word orbyteprogramtime (2) 30 tFTG tBlock,0 Blockprogramtimeforfirstbyteorword (2) 25 tFTG Blockprogramtimeforeach additionaltBlock,1-63 (2) 18 tFTGbyteorword tBlock,End Blockprogramend-sequencewaittime (2) 6 tFTG tMass Erase Mass erasetime (2) 10593 tFTG tSeg Erase Segment erasetime (2) 4819 tFTG (1) The cumulativeprogramtimemust notbe exceeded when writingtoa 64-byteflashblock.Thisparameterappliestoallprogramming methods:individualword orbytewritemode and blockwritemode. (2) These valuesarehardwiredintotheflashcontroller's statemachine (tFTG = 1/fFTG ). Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 33

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com RAM overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN MAX UNIT V(RAMh) RAM retentionsupplyvoltage(1) CPU halted 1.6 V (1) Thisparameterdefinestheminimum supplyvoltageVCC when thedatainRAM remainsunchanged.No programexecutionshould happen duringthissupplyvoltagecondition. JTAG and Spy-Bi-WireInterface overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS VCC MIN TYP MAX UNIT fSBW Spy-Bi-Wireinputfrequency 2.2V 0 20 MHz tSBW,Low Spy-Bi-Wirelowclockpulselength 2.2V 0.025 15 µs Spy-Bi-WireenabletimetSBW,En 2.2V 1 µs(TEST hightoacceptanceoffirstclockedge(1)) tSBW,Ret Spy-Bi-Wirereturntonormaloperationtime 2.2V 15 100 µs fTCK TCK inputfrequency(2) 2.2V 0 5 MHz R Internal Internalpulldownresistanceon TEST 2.2V 25 60 90 kΩ (1) ToolsaccessingtheSpy-Bi-Wireinterfaceneed towaitforthemaximum tSBW,En timeafterpullingtheTEST/SBWCLK pinhighbefore applyingthefirstSBWCLK clockedge. (2) fTCK may be restrictedtomeet thetimingrequirementsofthemodule selected. JTAG Fuse (1) overrecommended rangesofsupplyvoltageand operatingfree-airtemperature(unlessotherwisenoted) PARAMETER TEST CONDITIONS MIN MAX UNIT VCC(FB) Supplyvoltageduringfuse-blowcondition TA = 25°C 2.5 V VFB Voltagelevelon TEST forfuseblow 6 7 V IFB SupplycurrentintoTEST duringfuseblow 100 mA tFB Time toblowfuse 1 ms (1) Once thefuseisblown,no furtheraccesstotheJTAG/Test,Spy-Bi-Wire,and emulationfeatureispossible,and JTAG isswitchedto bypassmode.

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PxOUT.y DVSS DVCC 1 TAx.y TAxCLK Bus Keeper EN PxIN.y EN D PxSEL.y PxREN.y PxSEL2.y INCHx = y * ADC10AE0.y * To ADC10 * PxSEL.y PxSEL2.y PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y Direction 0: Input 1: Output PxDIR.y PxSEL.y PxSEL2.y P1.0/TA0CLK/ACLK/A0* P1.1/TA0.0/A1* P1.2/TA0.1/A2* * Note: MSP430G2x32 devices only. MSP430G2x02 devices have no ADC10. MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PIN SCHEMATICS PortP1 Pin Schematic:P1.0toP1.2,Input/OutputWith SchmittTrigger Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 35

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table14.PortP1 (P1.0toP1.2)Pin Functions CONTROL BITS /SIGNALS (1) TA0CLK/ TA0.TACLK 0 1 0 0 ACLK/ 0 ACLK 1 1 0 0 A0 (2)/ A0 X X X 1 (y= 0) PinOsc Capacitivesensing x 0 1 0 TA0.0/ TA0.0 1 1 0 0 1 TA0.CCI0A 0 1 0 0 A1 (2)/ A1 X X X 1 (y= 1) PinOsc Capacitivesensing X 0 1 0 TA0.1/ TA0.1 1 1 0 0 2 TA0.CCI1A 0 1 0 0 A2 (2)/ A2 X X X 1 (y= 2) PinOsc Capacitivesensing X 0 1 0 (1) X = don'tcare (2) MSP430G2x32 devicesonly

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P1.3/ADC10CLK*/A3*/ VREF-*/VEREF-* Direction 0: Input 1: Output To Module From ADC10 * PxOUT.y DVSS DVCC 1 TAx.y TAxCLK Bus Keeper EN PxIN.y EN D PxSEL.y PxREN.y PxDIR.y 0,2,3 PxSEL2.y PxSEL.y INCHx = y * To ADC10 * To ADC10 VREF- * 1

0 VSS

SREF2 * PxSEL.y PxSEL2.y PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y ADC10AE0.y * * Note: MSP430G2x32 devices only. MSP430G2x02 devices have no ADC10. PxSEL2.y MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PortP1 Pin Schematic:P1.3,Input/OutputWith SchmittTrigger Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 37

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table15.PortP1 (P1.3)Pin Functions CONTROL BITS /SIGNALS (1) ADC10CLK (2)/ ADC10CLK 1 1 0 0 A3 (2)/ A3 X X X 1 (y= 3) VREF- (2)/ VREF- X X X 1 VEREF- (2)/ VEREF- X X X 1 PinOsc Capacitivesensing X 0 1 0 (1) X = don'tcare (2) MSP430G2x32 devicesonly

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P1.4/SMCLK/TA0.2/A4*/ VREF+*/VEREF+*/TCK Direction 0: Input 1: Output To Module SMCLK PxOUT.y DVSS DVCC 1 TAx.y TAxCLK Bus Keeper EN PxIN.y EN D PxSEL.y PxREN.y PxDIR.y PxSEL2.y PxSEL.y INCHx = y * To ADC10 * From/To ADC10 Ref+ * PxSEL.y PxSEL2.y From JTAG To JTAG PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y ADC10AE0.y * * Note: MSP430G2x32 devices only. MSP430G2x02 devices have no ADC10. from Timer MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PortP1 Pin Schematic:P1.4,Input/OutputWith SchmittTrigger Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 39

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table16.PortP1 (P1.4)Pin Functions CONTROL BITS /SIGNALS (1) SMCLK/ SMCLK 1 1 0 0 0 TA0.2/ TA0.2 1 1 1 0 0 TA0.CCI2A 0 1 1 0 0 VREF+ (2)/ 4 VREF+ X X X 1 0 VEREF+ (2)/ VEREF+ X X X 1 0 A4 (2)/ A4 X X X 1 (y= 4) 0 TCK/ TCK X X X 0 1 PinOsc Capacitivesensing X 0 1 0 0 (1) X = don'tcare (2) MSP430G2x32 devicesonly

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P1.5/TA0.0/SCLK/A5*/TMS P1.6/TA0.1/SDO/SCL/A6*/TDI/TCLK P1.7//SDI/SDA/A7*/TDO/TDI To Module From Module PxOUT.y DVSS DVCC 1 TAx.y TAxCLK Bus Keeper EN PxIN.y EN D PxSEL.y PxREN.y PxSEL2.y INCHx = y * To ADC10 * PxSEL.y PxSEL2.y From JTAG To JTAG PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y Direction 0: Input 1: Output PxDIR.y From Module PxSEL.y PxSEL2.y ADC10AE0.y * * Note: MSP430G2x32 devices only. MSP430G2x02 devices have no ADC10. MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PortP1 Pin Schematic:P1.5toP1.7,Input/OutputWith SchmittTrigger Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 41

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table17.PortP1 (P1.5toP1.7)Pin Functions CONTROL BITS /SIGNALS (1) TA0.0/ TA0.0 1 1 0 0 0 0 SCLK/ SPI mode fromUSI 1 0 1 0 0 A5 (2)/ A5 X X X 0 0 1 (y= 5) TMS/ TMS X X X 0 1 0 PinOsc Capacitivesensing X 0 1 0 0 0 TA0.1/ TA0.1 1 1 0 0 0 0 SDO/ SPI mode fromUSI 1 0 ! 0 0 SCL/ 6 I2C mode fromUSI 1 0 ! 0 0 A6 (2)/ A6 X X X 0 0 1 (y= 6) TDI/TCLK/ TDI/TCLK X X X 0 1 0 PinOsc Capacitivesensing X 0 1 0 0 0 SDI/ SPI mode fromUSI 1 0 1 0 0 SDA/ SPI mode fromUSI 1 0 1 0 0 A7 (2)/ A7 X X X 0 0 1 (y= 7) TDO/TDI/ TDO/TDI X X X 0 1 0 PinOsc Capacitivesensing X 0 1 0 0 0 (1) X = don'tcare (2) MSP430G2x32 devicesonly

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P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 Direction 0: Input 1: Output To Module PxOUT.y DVSS DVCC 1 TAx.y TAxCLK PxIN.y EN D PxSEL.y PxREN.y PxSEL2.y PxSEL.y PxSEL2.y PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y PxDIR.y PxSEL.y MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PortP2 Pin Schematic:P2.0toP2.5,Input/OutputWith SchmittTrigger Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 43

SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com Table18.PortP2 (P2.0toP2.5)Pin Functions CONTROL BITS /SIGNALS (1) PIN NAME x FUNCTION(P2.x) P2DIR.x P2SEL.x P2SEL2.x P2.0/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 P2.1/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 P2.2/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 P2.3/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 P2.4/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 P2.5/ P2.x(I/O) I:0;O: 1 0 0 PinOsc Capacitivesensing X 0 1 (1) X = don'tcare

44 SubmitDocumentationFeedback Copyright© 2010–2013,Texas InstrumentsIncorporated

XIN/P2.6/TA0.1 Direction 0: Input 1: Output To Module From Module PxOUT.y DVSS DVCC 1 TAx.y TAxCLK PxIN.y EN D PxSEL.y PxREN.y PxDIR.y PxSEL2.y PxSEL.y PxSEL.y PxSEL2.y PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y XOUT/P2.7LF off LFXT1CLK PxSEL.6 & PxSEL.7 BCSCTL3.LFXT1Sx = 11 MSP430G2x32 MSP430G2x02 www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013 PortP2 Pin Schematic:P2.6,Input/OutputWith SchmittTrigger Table19.PortP2 (P2.6)Pin Functions CONTROL BITS /SIGNALS (1) 1 0XIN/ XIN 0 1 0 0 0P2.6/ P2.x(I/O) I:0;O: 1 X 0 1 0TA0.1/ Timer0_A3.TA1 1 0 0 0 1PinOsc Capacitivesensing X X X (1) X = don'tcare Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 45

XOUT/P2.7 Direction 0: Input 1: Output To Module From Module PxOUT.y DVSS DVCC 1 TAx.y TAxCLK PxIN.y EN D PxSEL.y PxREN.y PxDIR.y PxSEL2.y PxSEL.y PxSEL.y PxSEL2.y PxIRQ.y PxIE.y EN Set Q Interrupt Edge Select PxSEL.y PxIES.y PxIFG.y XIN/P2.6/TA0.1LF off LFXT1CLK PxSEL.6 & PxSEL.7 BCSCTL3.LFXT1Sx = 11 from P2.6 MSP430G2x32 MSP430G2x02 SLAS723H –DECEMBER 2010–REVISED MAY 2013 www.ti.com PortP2 Pin Schematic:P2.7,Input/OutputWith SchmittTrigger Table20.PortP2 (P2.7)Pin Functions CONTROL BITS /SIGNALS (1) 1 0XOUT/ XOUT X 1 0 X XPinOsc Capacitivesensing X 0 1 (1) X = don'tcare

46 SubmitDocumentationFeedback Copyright© 2010–2013,Texas InstrumentsIncorporated

www.ti.com SLAS723H –DECEMBER 2010–REVISED MAY 2013

REVISION HISTORY

SLAS723A Page 1,Changed InternalFrequenciesup to16 MHz WithOne CalibratedFrequency toFour CalibratedFrequencies Added noteconcerningpulldownresistortoPW14 and RSA16 pinoutdrawings. Removed referencetoCAOUT from N20, PW20 pinoutdrawingand Table11 (thereisno comparatormodule on this SLAS723B device). Added "N20, PW20 "toInputPinNumber and OutputPinNumber columnsinTable11. Correctedpinnumbers forP1.0toP1.3forPW14 package inTable2. CorrectedN20,PW20 OutputPinNumber forTA0.0 inTable11. Changed StoragetemperaturerangelimitinAbsoluteMaximum Ratings. SLAS723C Removed CAPD.y column fromTable16. CorrectedControlBits/SignalsinTable20. CorrectedSDA pinname inTable17. Changed TAG_ADC10_1 valueto0x10 inTable9. SLAS723D Added P1.6outputrow forTA0.1 module outputsignalTA1 inTable11. Changed Tstg,Programmed device,to-55°C to150°C inAbsoluteMaximum Ratings. SLAS723E Changed allportschematics(addedbufferafterPxOUT.y mux) inPinSchematics. Correctedsignalnames on pin7 or"N OR PW PACKAGE "(20pin)inDevicePinouts. SLAS723F Correctedpinnumber forP2.6underOuptputPinNumber, PW14 column inTable11. Added noteforTC REF+ in10-BitADC, Built-InVoltageReference(MSP430G2x32 Only). Recommended OperatingConditions,Added testconditionsfortypicalvalues. SLAS723G Pin-OscillatorFrequency– PortsPx,Correctedresistorvalueinnote(1). POR, BOR ,Added note(2). SLAS723H Throughout,Changed allvariationsoftouchsense(1)tocapacitivetouch. (1) TouchSense isa trademarkofImmersionCorporation. Copyright© 2010–2013,Texas InstrumentsIncorporated SubmitDocumentationFeedback 47

www.ti.com 7-Oct-2025 PACKAGING INFORMATION Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) M430G2402IPW14RG4 Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 M430G2402IPW14RG4.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 M430G2402IPW14RG4.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 M430G2402IRSA16RG4 Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 M430G2402IRSA16RG4.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 M430G2402IRSA16RG4.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2102IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2102 MSP430G2102IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2102 MSP430G2102IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2102 MSP430G2102IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2102 MSP430G2102IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2102 MSP430G2102IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2102 MSP430G2102IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2102 MSP430G2102IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2102 MSP430G2132IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2132 Addendum-Page 1

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2132IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2132 MSP430G2132IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2132 MSP430G2132IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2132 MSP430G2132IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2132 MSP430G2132IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2132IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2132IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2132IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2132IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2132IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2132 MSP430G2202IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2202 MSP430G2202IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2202 MSP430G2202IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2202 MSP430G2202IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 MSP430G2202IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 MSP430G2202IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 Addendum-Page 2

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2202IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 MSP430G2202IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 MSP430G2202IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2202 MSP430G2202IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2202 MSP430G2202IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 M430 G2202 MSP430G2202IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2202 MSP430G2202IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2202 MSP430G2202IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2202 MSP430G2202IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2202 MSP430G2202IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2202 MSP430G2232IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2232 MSP430G2232IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2232 MSP430G2232IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2232 MSP430G2232IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2232 MSP430G2232IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 MSP430G2232IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 Addendum-Page 3

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2232IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 MSP430G2232IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 MSP430G2232IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 MSP430G2232IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2232 MSP430G2232IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 M430 G2232 MSP430G2232IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2232 MSP430G2232IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2232 MSP430G2232IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2232 MSP430G2232IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2232 MSP430G2232IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2232 MSP430G2302IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2302 MSP430G2302IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2302 MSP430G2302IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2302 MSP430G2302IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2302 MSP430G2302IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 MSP430G2302IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 MSP430G2302IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 MSP430G2302IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 MSP430G2302IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 MSP430G2302IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2302 Addendum-Page 4

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2302IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2302IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2302IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2302IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2302IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2302IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2302 MSP430G2332IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2332 MSP430G2332IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2332 MSP430G2332IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2332 MSP430G2332IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2332 MSP430G2332IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2332 MSP430G2332IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 M430 G2332 MSP430G2332IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2332 MSP430G2332IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2332 Addendum-Page 5

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2332IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 M430 G2332 MSP430G2332IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2332 MSP430G2332IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2332 MSP430G2402IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2402 MSP430G2402IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2402 MSP430G2402IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2402 MSP430G2402IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2402 MSP430G2402IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2402 MSP430G2402IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2402IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2402IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2402IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2402IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 MSP430G2402IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2402 Addendum-Page 6

www.ti.com 7-Oct-2025 Orderable part number Status (1) Material type (2) Package | Pins Package qty | Carrier RoHS (3) Lead finish/ Ball material (4) MSL rating/ Peak reflow (5) Op temp (°C) Part marking (6) MSP430G2432IN20 Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2432 MSP430G2432IN20.A Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2432 MSP430G2432IN20.B Active Production PDIP (N) | 20 20 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430G2432 MSP430G2432IPW14 Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW14.A Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW14.B Active Production TSSOP (PW) | 14 90 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW14R Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW14R.A Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW14R.B Active Production TSSOP (PW) | 14 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 G2432 MSP430G2432IPW20 Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IPW20.A Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IPW20.B Active Production TSSOP (PW) | 20 70 | TUBE Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IPW20R Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IPW20R.A Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IPW20R.B Active Production TSSOP (PW) | 20 2000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 430G2432 MSP430G2432IRSA16R Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU | SN Level-1-260C-UNLIM -40 to 85 M430 G2432 MSP430G2432IRSA16R.A Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2432 MSP430G2432IRSA16R.B Active Production QFN (RSA) | 16 3000 | LARGE T&R Yes NIPDAU Level-1-260C-UNLIM -40 to 85 M430 G2432 MSP430G2432IRSA16T Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU | SN Level-2-260C-1 YEAR -40 to 85 M430 G2432 MSP430G2432IRSA16T.A Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2432 MSP430G2432IRSA16T.B Active Production QFN (RSA) | 16 250 | SMALL T&R Yes NIPDAU Level-2-260C-1 YEAR -40 to 85 M430 G2432 (1) Status: For more details on status, see our product life cycle. (2) Material type: When designated, preproduction parts are prototypes/experimental devices, and are not yet approved or released for full production. Testing and final process, including without limitation quality assurance, reliability performance testing, and/or process qualification, may not yet be complete, and this item is subject to further changes or possible discontinuation. If available for ordering, purchases will be subject to an additional waiver at checkout, and are intended for early internal evaluation purposes only. These items are sold without warranties of any kind. Addendum-Page 7

www.ti.com 7-Oct-2025 (3) RoHS values: Yes, No, RoHS Exempt. See the TI RoHS Statement for additional information and value definition. (4) Lead finish/Ball material: Parts may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two lines if the finish value exceeds the maximum column width. (5) MSL rating/Peak reflow: The moisture sensitivity level ratings and peak solder (reflow) temperatures. In the event that a part has multiple moisture sensitivity ratings, only the lowest level per JEDEC standards is shown. Refer to the shipping label for the actual reflow temperature that will be used to mount the part to the printed circuit board. (6) Part marking: There may be an additional marking, which relates to the logo, the lot trace code information, or the environmental category of the part. Multiple part markings will be inside parentheses. Only one part marking contained in parentheses and separated by a "~" will appear on a part. If a line is indented then it is a continuation of the previous line and the two combined represent the entire part marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF MSP430G2302, MSP430G2332 :

Enhanced Product : MSP430G2302-EP , MSP430G2332-EP NOTE: Qualified Version Definitions:
Enhanced Product - Supports Defense, Aerospace and Medical Applications Addendum-Page 8

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 TAPE AND REEL INFORMATION Reel Width (W1) REEL DIMENSIONS A0B0K0WDimension designed to accommodate the component lengthDimension designed to accommodate the component thicknessOverall width of the carrier tapePitch between successive cavity centersDimension designed to accommodate the component width TAPE DIMENSIONSK0 P1B0WA0Cavity QUADRANT ASSIGNMENTS FOR PIN 1 ORIENTATION IN TAPE Pocket QuadrantsSprocket HolesQ1Q1Q2Q2Q3Q3Q4Q4User Direction of Feed P1ReelDiameter *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 1

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant Pack Materials-Page 2

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 TAPE AND REEL BOX DIMENSIONS Width (mm) W LH *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) M430G2402IPW14RG4 TSSOP PW 14 2000 353.0 353.0 32.0 M430G2402IRSA16RG4 QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2102IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2102IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2102IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2132IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2132IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2132IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2132IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2202IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2202IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2202IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2202IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2232IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2232IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2232IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2232IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2302IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 Pack Materials-Page 3

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) MSP430G2302IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2302IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2302IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2332IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2332IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2332IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2332IRSA16T QFN RSA 16 250 182.0 182.0 20.0 MSP430G2402IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2402IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2402IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2402IRSA16T QFN RSA 16 250 210.0 185.0 35.0 MSP430G2432IPW14R TSSOP PW 14 2000 353.0 353.0 32.0 MSP430G2432IPW20R TSSOP PW 20 2000 353.0 353.0 32.0 MSP430G2432IRSA16R QFN RSA 16 3000 346.0 346.0 33.0 MSP430G2432IRSA16T QFN RSA 16 250 210.0 185.0 35.0 Pack Materials-Page 4

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 TUBE L - Tube length T - Tube height W - Tube width B - Alignment groove width *All dimensions are nominal Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) MSP430G2102IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2102IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2102IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2102IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2102IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2102IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2102IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2102IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2102IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2102IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2132IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2132IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2132IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2132IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2132IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2132IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2132IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2132IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2132IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 Pack Materials-Page 5

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) MSP430G2132IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2202IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2202IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2202IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2202IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2202IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2232IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2232IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2232IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2232IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2232IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2302IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2302IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2302IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2302IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2302IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2302IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2302IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 Pack Materials-Page 6

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) MSP430G2302IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2302IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2302IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2332IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2332IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2332IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2332IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2332IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2402IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2402IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2402IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2402IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2402IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2432IN20 N PDIP 20 20 506 13.97 11230 4.32 MSP430G2432IN20.A N PDIP 20 20 506 13.97 11230 4.32 MSP430G2432IN20.B N PDIP 20 20 506 13.97 11230 4.32 MSP430G2432IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW14 PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW14.A PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW14.B PW TSSOP 14 90 530 10.2 3600 3.5 MSP430G2432IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 Pack Materials-Page 7

PACKAGE MATERIALS INFORMATION www.ti.com 24-Jul-2025 Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm) MSP430G2432IPW20 PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2432IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2432IPW20.A PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2432IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 MSP430G2432IPW20.B PW TSSOP 20 70 530 10.2 3600 3.5 Pack Materials-Page 8

www.ti.com GENERIC PACKAGE VIEW This image is a representation of the package family, actual package may vary. Refer to the product data sheet for package details. VQFN - 1 mm max heightRSA 16 PLASTIC QUAD FLATPACK - NO LEAD4 x 4, 0.65 mm pitch 4230969/A

www.ti.com PACKAGE OUTLINE C 16X 0.38 0.23 2.7 0.1 16X 0.5 0.3 1.0 0.8 (0.2) TYP 0.05 0.00 12X 0.65 1.95 A 4.1 3.9 B 4.1 3.9 VQFN - 1 mm max heightRSA0016B PLASTIC QUAD FLATPACK - NO LEAD 4219093/A 08/2021 PIN 1 INDEX AREA 0.08 SEATING PLANE 5 8 16 13 X 0.3)(45 PIN 1 ID 0.1 C A B 0.05 C EXPOSED THERMAL PAD SYMM

17 SYMM

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. The package thermal pad must be soldered to the printed circuit board for thermal and mechanical performance. 4. Reference JEDEC registration MO-220. SCALE 3.300

www.ti.com EXAMPLE BOARD LAYOUT

0.07 MIN

0.07 MAX

16X (0.31) 16X (0.6) ( 0.2) TYP VIA 12X (0.65) (3.8) (3.8) (1.1) ( 2.7) (R0.05) TYP (1.1) VQFN - 1 mm max heightRSA0016B PLASTIC QUAD FLATPACK - NO LEAD 4219093/A 08/2021 SYMM 5 8 1316 SYMM LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE:18X NOTES: (continued) 5. This package is designed to be soldered to a thermal pad on the board. For more information, see Texas Instruments literature number SLUA271 (www.ti.com/lit/slua271). 6. Vias are optional depending on application, refer to device data sheet. If any vias are implemented, refer to their locations shown on this view. It is recommended that vias under paste be filled, plugged or tented. SOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK DEFINED METAL SOLDER MASK OPENINGSOLDER MASK DETAILS NON SOLDER MASK DEFINED (PREFERRED)

www.ti.com EXAMPLE STENCIL DESIGN 16X (0.6) 16X (0.31) 12X (0.65) (3.8) (3.8) 4X ( 1.19) (0.695) TYP (0.695) TYP (R0.05) TYP VQFN - 1 mm max heightRSA0016B PLASTIC QUAD FLATPACK - NO LEAD 4219093/A 08/2021 NOTES: (continued) 7. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. SYMM METAL TYP EXPOSED SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL EXPOSED PAD 77% PRINTED SOLDER COVERAGE BY AREA SCALE:25X SYMM 5 8 1316

www.ti.com PACKAGE OUTLINE C 12X 0.65 3.9 14X 0.30 0.17 6.6

6.2 TYP

1.2 MAX

0.15 0.05 0.25 GAGE PLANE 0 -8 4X (0 -12 ) B 4.5 4.3 NOTE 4 A 5.1 4.9 NOTE 3 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023

0.1 C A B

0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT

0.05 MAX

0.05 MIN

14X (1.5) 14X (0.45) 12X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 7 8 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 14X (1.5) 14X (0.45) 12X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0014A SMALL OUTLINE PACKAGE 4220202/B 12/2023 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 7 8

www.ti.com PACKAGE OUTLINE C 18X 0.65 5.85 20X 0.30 0.19 TYP6.6 6.2 0.15 0.05 0.25 GAGE PLANE -80 B NOTE 4 4.5 4.3 A NOTE 3 6.6 6.4 0.75 0.50 (0.15) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017 0.1 C NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M. 2. This drawing is subject to change without notice. 3. This dimension does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15 mm per side. 4. This dimension does not include interlead flash. Interlead flash shall not exceed 0.25 mm per side. 5. Reference JEDEC registration MO-153. SEATING PLANE A 20 DETAIL A TYPICAL SCALE 2.500

www.ti.com EXAMPLE BOARD LAYOUT 20X (1.5) 20X (0.45) 18X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017 NOTES: (continued) 6. Publication IPC-7351 may have alternate designs. 7. Solder mask tolerances between and around signal pads can vary based on board fabrication site. LAND PATTERN EXAMPLE EXPOSED METAL SHOWN SCALE: 10X SYMM SYMM 10 11 15.000 METALSOLDER MASK OPENING METAL UNDER SOLDER MASK SOLDER MASK OPENING EXPOSED METALEXPOSED METAL SOLDER MASK DETAILS NON-SOLDER MASK DEFINED (PREFERRED) SOLDER MASK DEFINED

www.ti.com EXAMPLE STENCIL DESIGN 20X (1.5) 20X (0.45) 18X (0.65) (5.8) (R0.05) TYP TSSOP - 1.2 mm max heightPW0020A SMALL OUTLINE PACKAGE 4220206/A 02/2017 NOTES: (continued) 8. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 9. Board assembly site may have different recommendations for stencil design. SOLDER PASTE EXAMPLE BASED ON 0.125 mm THICK STENCIL SCALE: 10X SYMM SYMM 10 11

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Product Information

M430G2402IPW14RG4 specifications and overview.

Summary

MIXED SIGNAL MICROCONTROLLER REVISED MAY 2013

Description

MIXED SIGNAL MICROCONTROLLER REVISED MAY 2013

Source title M430G2402IPW14RG4 Datasheet(PDF) - Texas Instruments

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