M41T315Y STMICROELECTRONICS | Alldatasheet

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31 days, including leap year correction. completion of the surface mount process. keyed to prevent reverse insertion. Figure 3. Logic Diagram Table 1. Signal Names

Figure 7. M41T315Y/V/W to RAM/Clock Interface

ory via the chip enable output pin (CEO ). er to the first bit of the 64-bit comparison register.

64 WRITE cycles are used only to gain access to

awaits the next WRITE cycle. ed and the comparison register pointer is reset. Table 2. Operating Modes Note: X = VIH or VIL; VSO = Battery Back-up Switchover Voltage. Note: 1. See Table 11., page 17 for details.

Table 3. AC Electrical Characteristics (M41T315Y) Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 4.5 to 5.5V (except where noted).

  1. tWR is a function of the latter occurring edge of WE or CEI.
  2. tDH and tDS are functions of the first occurring edge of WE or CEI in RAM mode.

Table 4. AC Electrical Characteristics (M41T315V/W) Note: 1. Valid for Ambient Operating Temperature: TA = –40 to 85°C; VCC = 2.7 to 3.6V (except where noted).

  1. tWR is a function of the latter occurring edge of WE or CEI.
  2. tDH and tDS are functions of the first occurring edge of WE or CEI in RAM mode.

Figure 10. Comparison Register Definition aberrant entries to the RTC is less than 1 in 1019. This pattern is sent to the clock LSB to MSB.

M41T315Y*, M41T315V, M41T315W Data Retention Most low power SRAMs on the market today can be used with the M41T315Y/V/W. There are, how- ever some criteria which should be used in making the final choice of an SRAM to use. The SRAM must be designed in a way where the chip enable input disables all other inputs to the SRAM. This allows inputs to the M41T315Y/V/W and SRAMs to be Don’t Care once VCCI falls below VPFD (min). The SRAM should also guarantee data retention down to VCC =2.0 volts. The chip enable access time must be sufficient to meet the system needs with the chip enable output propagation delays included. If the SRAM includes a second chip enable pin (E2), this pin should be tied to VOUT . If data retention lifetime is a critical parameter for the system, it is important to review the data reten- tion current specifications for the particular SRAMs being evaluated. Most SRAMs specify a data retention current at 3.0 volts. Manufacturers generally specify a typical condition for room tem- perature along with a worst case condition (gener- ally at elevated temperatures). The system level requirements will determine the choice of which value to use. The data retention current value of the SRAMs can then be added to the IBAT value of the M41T315Y/V/W to determine the total current requirements for data retention. The available bat- tery capacity for the SNAPHAT ® of your choice can then be divided by this current to determine the amount of data retention available (see Table 17., page 22). For a further more detailed review of lifetime calcu- lations, please see Application Note AN1012.

Register 0 and ending with Bit 7 of Register 7. Table 5. RTC Register Map Figure 11. Reset Pulse Waveform

Table 6. Absolute Maximum Ratings

  1. For SO package, Lead-free (Pb-free) lead finish: Reflow at peak temperature of 260°C (total thermal budget not to exceed 245°C

for greater than 30 seconds). CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in the Battery Back-up mode. CAUTION: Do NOT wave solder SOIC to avoid damaging SNAPHAT sockets.

tions when using the quoted parameters. Table 7. DC and AC Measurement Conditions Figure 12. AC Testing Load Circuit Table 8. Capacitance Note: 1. Effective capacitance measured with power supply at 5V; sampled only; not 100% tested.

Table 9. DC Characteristics

  1. Applies to all input pins except RST, which is pulled internally to VCCI.
  2. Measured without RAM connected.
  3. ICCO1 is the maximum average load current the device can supply to external memory.
  4. Voltages are referenced to Ground.
  5. Measured with load shown in Figure 12., page 15.

CCO2 is the maximum average load current that the device can supply to memory in the battery backup mode.

Table 10. Crystal Electrical Characteristics (Externally Supplied) trace lengths and isolation from RF generating signals should be taken into account. Figure 13. Power Down/Up Mode AC Waveforms Table 11. Power Down/Up Trip Points DC Characteristics

  1. Measured with load shown in Figure 12., page 15.
  2. Input pulse rise and fall times equal 10ns

Figure 14. SO16 – 16-lead Plastic Small Outline, Package Outline Note: Drawing is not to scale. Table 12. SO16 – 16-lead Plastic Small Outline (150 mils body width), Package Mech. Data

Figure 15. SOH28 – 28-lead Plastic Small Outline, Package Outline Note: Drawing is not to scale. Table 13. SOH28 – 28-lead Plastic Small Outline, Package Mechanical Data

Figure 16. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Outline Note: Drawing is not to scale. Table 14. SH – 4-pin SNAPHAT Housing for 48mAh Battery and Crystal, Package Mech. Data

Figure 17. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Outline Note: Drawing is not to scale. Table 15. SH – 4-pin SNAPHAT Housing for 120mAh Battery and Crystal, Package Mech. Data

Table 16. Ordering Information Scheme

  1. The SOIC package (SOH28) requires the SNAPHAT® battery package which is ordered separately under the part number “M4TXX-

BR12SHX” in plastic tube or “M4TXX-BR12SHXTR” in Tape & Reel form (see Table 17). Table 17. SNAPHAT Battery Table

M41T315Y*, M41T315V, M41T315W

REVISION HISTORY

Table 18. Document Revision History

M41T315Y*, M41T315V, M41T315W Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. © 2004 STMicroelectronics - All rights reserved STMicroelectronics GROUP OF COMPANIES Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States