M37735M4BXXXFP

M37735M4BXXXFP RENESAS | Alldatasheet

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Technical content

Regarding the change of names mentioned in the document, such as Mitsubishi Electric and Mitsubishi XX, to Renesas Technology Corp. The semiconductor operations of Hitachi and Mitsubishi Electric were transferred to Renesas Technology Corporation on April 1st 2003. These operations include microcomputer, logic, analog and discrete devices, and memory chips other than DRAMs (flash memory, SRAMs etc.) Accordingly, although Mitsubishi Electric, Mitsubishi Electric Corporation, Mitsubishi Semiconductors, and other Mitsubishi brand names are mentioned in the document, these names have in fact all been changed to Renesas Technology Corp. Thank you for your understanding. Except for our corporate trademark, logo and corporate statement, no changes whatsoever have been made to the contents of the document, and these changes do not constitute any alteration to the contents of the document itself. Note : Mitsubishi Electric will continue the business operations of high frequency & optical devices and power devices. Renesas Technology Corp. Customer Support Dept. April 1, 2003 To all our customers

DESCRIPTION

The M37735M4BXXXFP is a single-chip microcomputer using the 7700 Family core. This single-chip microcomputer has a CPU and a bus interface unit. The CPU is a 16-bit parallel processor that can be an 8-bit parallel processor, and the bus interface unit enhances the memory access efficiency to execute instructions fast. This microcomputer also includes a 32 kHz oscillation circuit, in addition to the ROM, RAM, multiple-function timers, serial I/O, A-D converter, and so on.

FEATURES

l Instruction execution time l Low power dissipation (at 25 MHz frequency) l 12-bit watchdog timer l Programmable input/output APPLICATION Control devices for general commercial equipment such as office automation, office equipment, and so on. Control devices for general industrial equipment such as communication equipment, and so on. PIN CONFIGURATION (TOP VIEW) MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change. P40/HOLD P27/A7/D7 P70/AN0 P67/TB2IN/fSUB P66/TB1IN P65/TB0IN P64/INT 2 P63/INT 1 P62/INT 0 P61/TA4IN P60/TA4OUT P57/TA3IN/KI3 P56/TA3OUT /KI2 P55/TA2IN/KI1 P54/TA2OUT /KI0 P53/TA1IN P52/TA1OUT P51/TA0IN P50/TA0OUT P84/CTS 1/RTS 1 P85/CLK1 P86/RXD 1 P87/TXD 1 P00/CS 0 P01/CS 1 P02/CS 2 P03/CS 3 P04/CS 4 P05/RSMP P06/A16 P07/A17 P10/A8/D8 P11/A9/D9 P12/A10/D10 Outline 80P6N-A P13/A11/D11 P14/A12/D12 P15/A13/D13 P16/A14/D14 P17/A15/D15 P20/A0/D0 P21/A1/D1 P22/A2/D2 P23/A3/D3

24 P41/RDY

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER M37735M4BXXXFP BLOCK DIAGRAM XIN XOUT E RESET Reset input VREF CNVss BYTE P0(8) UART1(9) UART0(9) AV SS (0V) AV CC (0V) VSS VCC A-D Converter(10) XCIN XCOUT XCIN XCOUT Clock input Clock output Enable output Reference voltage input External data bus width selection input Clock Generating Circuit Instruction Register(8) Arithmetic Logic Unit(16) Accumulator A(16) Accumulatcr B(16) Index Register X(16) Index Register Y(16) Stack Pointer S(16) Direct Page Register DPR(16) Processor Status Register PS(11) Input Butter Register IB(16) Data Bank Register DT(8) Program Bank Register PG(8) Program Counter PC(16) Incrementer/Decrementer(24) Data Address Register DA(24) Program Address Register PA(24) Incrementer(24) Instruction Queue Buffer Q2(8) Instruction Queue Buffer Q1(8) Instruction Queue Buffer Q0(8) Data Buffer DBL(8) Data Buffer DBH (8) ROM

32 Kbytes

Timer TA3(16) Timer TA4(16) Timer TA2(16) Timer TA1(16) Timer TA0(16) Watchdog Timer Timer TB2(16) Timer TB1(16) Timer TB0(16) Address Bus Data Bus(Odd) Data Bus(Even) Input/Output port P8 Input/Output port P7 Input/Output port P6 Input/Output port P5 Input/Output port P4 Input/Output port P3 Input/Output port P2 Input/Output port P1 Input/Output port P0 UART2(9)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FUNCTIONS OF M37735M4BXXXFP Memory size Input/Output ports Parameter Functions Number of basic instructions 103 Instruction execution time 160 ns (the fastest instruction at external clock 25 MHz frequency) ROM 32 Kbytes RAM 2048 bytes P0 – P2, P4 – P8 8-bit 5 8 P3 4-bit 5 1 TA0, TA1, TA2, TA3, TA4 16-bit 5 5 TB0, TB1, TB2 16-bit 5 3 Serial I/O (UART or clock synchronous serial I/O) 5 3 A-D converter 10-bit 5 1 (8 channels) Watchdog timer 12-bit 5 1 3 external types, 16 internal types Each interrupt can be set to the priority level (0 – 7.) 2 circuits built-in (externally connected to a ceramic resonator or a quartz-crystal oscillator) Supply voltage 5 V ± 10% Power dissipation 47.5 mW (at external clock 25 MHz frequency) Input/Output voltage 5 V Output current 5 mA Memory expansion Maximum 1 Mbytes Operating temperature range –20 to 85 °C Device structure CMOS high-performance silicon gate process Package 80-pin plastic molded QFP (80P6N-A) Interrupts Clock generating circuit Multi-function timers Input/Output characteristic

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Pin Name Input/Output Functions Vcc, Power source Apply 5 V ± 10% to Vcc and 0 V to Vss. Vss CNVss CNVss input Input This pin controls the processor mode. Connect to Vss for the single-chip mode and the memory expansion mode, and to Vcc for the microprocessor mode._____ RESET Reset input Input When “L” level is applied to this pin, the microcomputer enters the reset state. These are pins of main-clock generating circuit. Connect a ceramic resonator or a quartz- crystal oscillator between XIN and XOUT . When an external clock is used, the clock source should be connected to the XIN pin, and the XOUT pin should be left open._ E Enable output Output This pin functions as the enable signal output pin which indicates the access status in the internal___ bus. In the memory expansion mode or the microprocessor mode, this pin functions as the RDE signal output pin. BYTE External data Input In the memory expansion mode or the microprocessor mode, this pin determines whether the bus width external data bus has an 8-bit width or a 16-bit width. The data bus has a 16-bit width when “L” selection input signal is input and an 8-bit width when “H” signal is input. AVcc, Analog power Power source input pin for the A-D converter. Externally connect AVcc to Vcc and AVss to Vss. AVss source input VREF Reference Input This is reference voltage input pin for the A-D converter. voltage input P00 – P07 I/O port P0 I/O In the single-chip mode, port P0 becomes an 8-bit I/O port. An I/O direction register is available so that each pin can be programmed for input or output. These ports are in the input mode when In the memory expansion mode or the microprocessor mode, these pins output CS 0 – CS 4, RSMP signals, and address (A16, A17). P10 – P17 I/O port P1 I/O In the single-chip mode, these pins have the same functions as port P0. When the BYTE pin is set to “L” in the memory expansion mode or the microprocessor mode and external data bus has a 16-bit width, high-order data (D 8 – D15) is input/output or an address (A8 – A15) is output. When the BYTE pin is “H” and an external data bus has an 8-bit width, only address (A8 – A15) is output. P20 – P27 I/O port P2 I/O In the single-chip mode, these pins have the same functions as port P0. In the memory expansion mode or the microprocessor mode, low-order data (D0 – D7) is input/output or an address (A0 – A7) is output . P30 – P33 I/O port P3 I/O In the single-chip mode, these pins have the same function as port P0. In the memory expansion___ ____ ____ mode or the microprocessor mode, WEL , WEH , ALE, and HLDA signals are output. P40 – P47 I/O port P4 I/O In the single-chip mode, these pins have the same functions as port P0. In the memory expansion____ ___ mode or the microprocessor mode, P40, P41 and P42 become HOLD and RDY input pins, and a clock φ1 output pin, respectively. Functions of the other pins are the same as in the single-chip mode. However, in the memory expansion mode, P42 can be selected as an I/O port. P50 – P57 I/O port P5 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also__ __ function as I/O pins for timers A0 to A3 and input pins for key input interrupt input (KI0 – KI3 ). P60 – P67 I/O port P6 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also___ ___ function as I/O pins for timer A4, input pins for external interrupt input (INT0 – INT2) and input pins for timers B0 to B2. P67 also functions as a sub-clock φSUB output pin. P70 – P77 I/O port P7 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins function as input pins for A-D converter. P72 to P75 also function as I/O pins for UART2. Additionally, P76 and P77 have the function as the output pin (XCOUT ) and the input pin (XCIN) of the sub-clock (32 kHz) oscillation circuit, respectively. When P76 and P77 are used as the XCOUT and XCIN pins, connect a resonator or an oscillator between the both. P80 – P87 I/O port P8 I/O In addition to having the same functions as port P0 in the single-chip mode, these pins also function as I/O pins for UART 0 and UART 1. PIN DESCRIPTION XOUT Clock output Output XIN Clock input Input

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER A-D/UART2 trans./rece. Timer B2 Timer B1 Timer B0 Timer A4 Timer A3 Timer A2 Timer A1 Timer A0 INT2/Key input INT0 Watchdog timer DBC BRK instruction Zero divide RESET Internal peripheral devices control registers refer to Fig. 2 for detail information Interrupt vector table 00000016 00FFFF 16 01000016 01FFFF 16 Bank 016 Bank 116 FE0000 16 FEFFFF 16 FF0000 16 FFFFFF 16 Bank FF16 Bank FE16 00FFFF 16 00800016 00000016 00007F16 00008016 Internal RAM 2048 bytes Internal ROM Notes 1.Internal ROM area can be modified. (Refer to the section on ROM area modification function.) 2.Banks 1016 – FF16 cannot be accessed in the 7735 group. BASIC FUNCTION BLOCKS The M37735M4BXXXFP has the same fuanctions as the M37735MHBXXXFP except for the memory allocation and the ROM area modification function. Refer to the section on the M37735MHBXXXFP. MEMORY The memory map is shown in Figure 1. The address space has a capacity of 16 Mbytes and is allocated to addresses from 0 16 to FFFFFF 16. The address space is divided by 64-Kbyte unit called bank. The banks are numbered from 016 to FF16. However, banks 1016 – FF16 of the 7735 group cannot be accessed. Built-in ROM, RAM and control registers for internal peripheral devices are assigned to bank 0 16. The 32-Kbyte area from addresses 800016 to FFFF16 is the built-in ROM. Addresses FFD616 to FFFF16 are the RESET and interrupt vector addresses and contain the interrupt vectors. Refer to the section on interrupts for details. The 2048-byte area allocated to addresses from 80 16 to 87F16 is the built-in RAM. In addition to storing data, the RAM is used as stack during a subroutine call or interrupts. Peripheral devices such as I/O ports, A-D converter, serial I/O, timer, and interrupt control registers are allocated to addresses from 0 16 to 7F16. Additionally, the internal ROM area can be modified by software. Refer to the section on ROM area modification function for details. A 256-byte direct page area can be allocated anywhere in bank 0 by using the direct page register (DPR). In the direct page addressing mode, the memory in the direct page area can be accessed with two words. Hence program steps can be reduced. Fig. 1 Memory map

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Fig. 2 Location of internal peripheral devices and interrupt control registers 00002A UART 0 transmission interrupt control register UART 1 transmission interrupt control register INT2/Key input interrupt control register Port P1 direction register UART 0 transmit/receive mode register UART 0 baud rate register (BRG0) UART 0 transmit/receive control register 0 UART 0 transmit/receive control register 1 UART 0 transmission buffer register UART 1 transmit/receive control register 0 UART 1 transmit/receive mode register UART 1 baud rate register (BRG1) UART 1 transmit/receive control register 1 UART 0 receive buffer register UART 1 transmission buffer register UART 1 receive buffer register Port P0 register A-D register 0 A-D register 2 Port P1 register Port P0 direction register Port P2 register Port P3 register Port P4 register Port P5 register Port P6 register Port P7 register Port P8 register A-D control register 0 A-D control register 1 A-D register 1 A-D register 3 A-D register 4 A-D register 5 000000 000001 000002 000003 000005 000006 000007 000008 000009 000010 000011 000012 000013 000014 000015 000016 000017 000018 000019 00001A 00001B 00001C 00001D 00001E 00001F 000020 000021 000022 000023 000024 000025 000026 000027 000028 000029 00002B 00002C 00002D 00002E 00002F 000030 000031 000032 000033 000034 000035 000036 000037 000038 000039 00003A 00003B 00003C 00003D 00003E 00003F 00000B 00000C 00000D 00000E 00000F 00000A 000004 000040 000041 000042 000043 000045 000046 000047 000048 000049 000050 000051 000052 000053 000054 000055 000056 000057 000058 000059 00005A 00005B 00005C 00005D 00005E 00005F 000060 000061 000062 000063 000064 000065 000066 000067 000068 000069 00006A 00006B 00006C 00006D 00006E 00006F 000070 000071 000072 000073 000074 000075 000076 000077 000078 000079 00007A 00007B 00007C 00007D 00007E 00007F 00004B 00004C 00004D 00004E 00004F 00004A 000044 Address (Hexadecimal notation) Address (Hexadecimal notation) Timer A1 register Timer A4 register Timer A2 register Timer A3 register Timer B0 register Timer B1 register Timer B2 register Count start flag One-shot start flag Up-down flag Timer A0 register Timer A0 mode register Timer A1 mode register Timer A2 mode register Timer A4 mode register Timer B0 mode register Timer B1 mode register Timer B2 mode register Processor mode register 0 Watchdog timer register Watchdog timer frequency selection flag A-D/UART 2 trans./rece. interrupt control register UART 0 receive interrupt control register UART 1 receive interrupt control register Timer A0 interrupt control register Timer A1 interrupt control register Timer A2 interrupt control register Timer A3 interrupt control register Timer A4 interrupt control register Timer B0 interrupt control register Timer B1 interrupt control register Timer B2 interrupt control register INT0 interrupt control register INT1 interrupt control register Processor mode register 1 Oscillation circuit control register 1 Serial transmit control register Port function control register Oscillation circuit control register 0 Timer A3 mode register Port P2 direction register Port P3 direction register Port P4 direction register Port P5 direction register Port P6 direction register Port P7 direction register Port P8 direction register Reserved area (Note) Reserved area (Note) A-D register 6 A-D register 7 UART 2 transmit/receive control register 1 UART 2 transmit/receive control register 0 UART 2 transmission buffer register UART 2 baud rate register (BRG2) UART 2 transmit/receive mode register Memory allocation control register Reserved area (Note) UART 2 receive buffer register Note. Do not write to this address.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER ROM AREA MODIFICATION FUNCTION The internal ROM size and its address area of the M37735M4BXXXFP can be modified by the memory allocation control register’s bit 0 shown in Figure 3. Figure 5 shows the memory allocation in which the internal ROM size and its address area are modified. Make sure to write data in the memory allocation control register as the flow shown in Figure 4. This ROM area modification function is valid in memory expansion mode and single-chip mode. Table 1 shows the relationship between memory allocation selection bits and address corresponding to chip-select signals CS 0 and CS 1. When ordering a mask ROM, Mitsubishi Electric corp. produces the mask ROM using the data within 32 Kbytes (addresses 008000 16 – 00FFFF 16). It is regardless of the selected ROM size (refer to MASK ROM ORDER CONFIRMATION FORM.) Therefore, program “FF16” to the addresses out of the selected ROM area in the EPROM which you tender when ordering a mask ROM. Address 00FFFF 16 of this microcomputer corresponds to the lowest address of the EPROM which you tender. 76543210 ML 0 Memory allocation control register Memory allocation selection bit ROM size (ROM area) 0 : 32 Kbytes (addresses 008000 16 – 00FFFF16) 1 : 16 Kbytes (addresses 00C00016 – 00FFFF16) Address 6316 Note. Write to the memory allocation control register as the flow shown in Figure 4. Fig. 4 How to write data in memory allocation control register Fig. 3 Bit configuration of memory allocation control register Writing data “5516” (LDM instruction) Writing data “0016” or “0116” (LDM instruction) ML 0 selection bit Next instruction

• How to write in memory allocation control register

Notice: This is not a final specification. Some parametric limits are subject to change. Table 1. Relationship between memory allocation selection bits and addresses corresponding to chip-select signals CS 0 and CS 1 BIT MICROCOMPUTERS for details. Please send the following data for mask orders. Note. Banks 1016 to FF16 cannot be accessed in the 7735 Group.

16 Kbytes

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Symbol Parameter Conditions Ratings Unit Vcc Power source voltage –0.3 to +7 V AVcc Analog power source voltage –0.3 to +7 V VI Input voltage RESET , CNVss, BYTE –0.3 to +12 V Input voltage P00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87, VREF , XIN Output voltageP00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87,_ XOUT , E Pd Power dissipation Ta = 25 °C 300 mW Topr Operating temperature –20 to +85 °C Tstg Storage temperature –40 to +150 °C VI VO Limits Min. Typ. Max. f(XIN) : Operating 4.5 5.0 5.5 f(XIN) : Stopped, f(XCIN) = 32.768 kHz 2.7 5.5 AVcc Analog power source voltage Vcc V Vss Power source voltage 0V AVss Analog power source voltage 0 V High-level input voltage P00 – P07, P30 – P33, P40 – P47, P50 – P57, P60 – P67,_____ P70 – P77, P80 – P87, XIN, RESET , CNVss, BYTE, XCIN (Note 3) High-level input voltage P10 – P17, P20 – P27 (in single-chip mode) High-level input voltage P10 – P17, P20 – P27 (in memory expansion mode and microprocessor mode) Low-level input voltage P00 – P07, P30 – P33, P40 – P47, P50 – P57, P60 – P67,_____ P70 – P77, P80 – P87, XIN, RESET , CNVss, BYTE, XCIN (Note 3) Low-level input voltage P10 – P17, P20 – P27 (in single-chip mode) Low-level input voltage P10 – P17, P20 – P27 (in memory expansion mode and microprocessor mode) High-level peak output current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87 High-level average output current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P47, P50 – P57, P60 – P67, P70 – P77, P80 – P87 Low-level peak output current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P43, P54 – P57, P60 – P67, P70 – P77, P80 – P87 Low-level peak output current P44 – P47, P50 – P53 Low-level average output current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P40 – P43, P54 – P57, P60 – P67, P70 – P77, P80 – P87 IOL(avg) Low-level average output current P44 – P47, P50 – P53 15 mA f(XIN) Main-clock oscillation frequency (Note 4) 25 MHz f(XCIN) Sub-clock oscillation frequency 32.768 50 kHz ABSOLUTE MAXIMUM RATINGS –0.3 to Vcc + 0.3 V –0.3 to Vcc + 0.3 V UnitSymbol Parameter RECOMMENDED OPERATING CONDITIONS (Vcc = 5 V ± 10%, Ta = –20 to +85 °C, unless otherwise noted) VVcc Power source voltage Notes 1.Average output current is the average value of a 100 ms interval. 2.The sum of IOL(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOH(peak) for ports P0, P1, P2, P3, and P8 must be 80 mA or less, the sum of IOL(peak) for ports P4, P5, P6, and P7 must be 100 mA or less, and the sum of IOH(peak) for ports P4, P5, P6, and P7 must be 80 mA or less. 3.Limits VIH and VIL for XCIN are applied when the sub clock external input selection bit = “1”. 4.The maximum value of f(XIN) = 12.5 MHz when the main clock division selection bit = “1”.

0.8 Vcc

0.5 Vcc

0.2Vcc 0.2Vcc 0.16Vcc –10 V V V V V V mA mA mA mA mA V IH VIH VIH VIL VIL VIL IOH(peak) IOH(avg) IOL(peak) IOL(peak) IOL(avg)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Limits Min. Typ. Max. High-level output voltage P00 – P07, P10 – P17, P20 – P27, VOH P33, P40 – P47, P50 – P57,I OH = –10 mA 3 V P60 – P67, P70 – P77, P80 – P87 High-level output voltage P00 – P07, P10 – P17, P20 – P27, P33 IOH = –10 mA 3.1 ICH = –400 µA 4.8 IOH = –10 mA 3.4 IOH = –400 µA 4.8 Low-level output voltage P00 – P07, P10 – P17, P20 – P27, VOL P33, P40 – P43, P54 – P57,I OL = 10 mA 2 V P60 – P67, P70 – P75, P80 – P87 VOL Low-level output voltage P44 – P47, P50 – P53 IOL = 20 mA 2 V Low-level output voltage P00 – P07, P10 – P17, P20 – P27, P33 IOL = 10 mA 1.9 IOL = 2 mA 0.43 IOL = 10 mA 1.6 IOL = 2 mA 0.4 Hysteresis HOLD , RDY , TA0IN – TA4IN, TB0IN – TB2IN, VT+ – VT– INT0 – INT2, AD TRG , CTS 0, CTS 1, CTS 2, CLK0, 0.4 1 V_ ___ _ _ CLK 1, CLK 2, KI0 – KI3 VT+ – VT– Hysteresis RESET 0.2 0.5 V VT+ – VT– Hysteresis XIN 0.1 0.4 V VT+ – VT– Hysteresis XCIN (When external clock is input) 0.1 0.4 V High-level input current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P80 – P87, XIN, RESET , CNVss, BYTE Low-level input current P00 – P07, P10 – P17, P20 – P27, P30 – P33, P70 – P77, P80 – P87, XIN, RESET , CNVss, BYTE VI = 0 V, without a pull-up transistor VI = 0 V, with a pull-up transistor VRAM RAM hold voltage When clock is stopped. 2V VOH High-level output voltage E Unit ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz, unless otherwise noted) V V VOL Low-level output voltage E VOL Low-level output voltage P30 – P32 VOH High-level output voltage P30 – P32 Symbol Parameter Test conditions VOH VOL IIH IIL VI = 0 V VI = 5 V IOH = –400 µA 4.7 –1.0 –0.5–0.25 V 0.45 V V V µA µA µA mA IOL = 2 mA IIL Low-level input current P54 – P57, P62 – P64

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER VCC = 5 V, f(XIN) = 25 MHz (square waveform), f(f2) = 12.5 MHz, f(XCIN) = 32.768 kHz, in operating (Note 1) VCC = 5 V, f(XIN) = 25 MHz (square waveform), f(XCIN) = Stopped, in operating (Note 1) VCC = 5V, f(XIN) = 25 MHz (square waveform), f(XCIN) = 32.768 kHz, when a WIT instruction is executed (Note 2) V CC = 5 V, f(XIN) : Stopped, f(XCIN) : 32.768 kHz, in operating (Note 3) V CC = 5 V, f(XIN) : Stopped, f(XCIN) : 32.768 kHz, when a WIT instruction is executed (Note 4) Ta = 25 °C, when clock is stopped Ta = 85 °C, when clock is stopped ELECTRICAL CHARACTERISTICS (Vcc = 5 V, Vss = 0 V, Ta = –20 to 85 °C, unless otherwise noted) Max. Limits Typ. UnitMin. Test conditions Symbol Parameter 9.5 1.3 2.6 100 mA mA µA Power source currentICC In single-chip mode, output pins are open, and other pins are V SS . Notes 1. This applies when the main clock external input selection bit = “1”, the main clock division selection bit = “0”, and the signal output stop bit = “1”. 2. This applies when the main clock external input selection bit = “1” and the system clock stop bit at wait state = “1”. 3. This applies when CPU and the clock timer are operating with the sub clock (32.768 kHz) selected as the system clock. 4. This applies when the XCOUT drivability selection bit = “0” and the system clock stop bit at wait state = “1”. Limits Min. Typ. Max. — Resolution V REF = VCC 10 Bits — Absolute accuracy V REF = VCC ± 3 LSB R LADDER Ladder resistance V REF = VCC 10 25 k Ω tCONV Conversion time 9.44 µs VREF Reference voltage 2 V CC V VIA Analog input voltage 0 V REF V Symbol Parameter Test conditions Unit A–D CONVERTER CHARACTERISTICS (VCC = AVCC = 5 V, VSS = AVSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Note), unless otherwise noted) Note. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz. µA µA µA mA

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Limits Min. Max. tc External clock input cycle time (Note 3) 40 ns tw(H) External clock input high-level pulse width (Note 4) 15 ns tw(L) External clock input low-level pulse width (Note 4) 15 ns tr External clock rise time 8n s tf External clock fall time 8n s TIMING REQUIREMENTS (VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz, unless otherwise noted (Note)) Notes 1.This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz. 2. Input signal’s rise/fall time must be 100 ns or less, unless otherwise noted. External clock input UnitSymbol Parameter Limits Min. Max. tsu(P0D–E) Port P0 input setup time 60 ns tsu(P1D–E) Port P1 input setup time 60 ns tsu(P2D-E) Port P2 input setup time 60 ns tsu(P3D–E) Port P3 input setup time 60 ns tsu(P4D–E) Port P4 input setup time 60 ns tsu(P5D–E) Port P5 input setup time 60 ns tsu(P6D–E) Port P6 input setup time 60 ns tsu(P7D–E) Port P7 input setup time 60 ns tsu(P8D–E) Port P8 input setup time 60 ns th(E–P0D) Port P0 input hold time 0n s th(E–P1D) Port P1 input hold time 0n s th(E–P2D) Port P2 input hold time 0n s th(E–P3D) Port P3 input hold time 0n s th(E–P4D) Port P4 input hold time 0n s th(E–P5D) Port P5 input hold time 0n s th(E–P6D) Port P6 input hold time 0n s th(E–P7D) Port P7 input hold time 0n s th(E–P8D) Port P8 input hold time 0n s UnitSymbol Parameter Single-chip mode Limits Min. Max. tsu(D–RDE) Data input setup time 32 ns tsu(RDY– φ1) ___ RDY input setup time 55 ns tsu(HOLD– φ1) ____ HOLD input setup time 55 ns th(RDE–D) Data input hold time 0n s th(φ1–RDY) ___ RDY input hold time 0n s th(φ1–HOLD) ____ HOLD input hold time 0n s UnitSymbol Parameter Memory expansion mode and microprocessor mode Notes 3. When the main clock division selection bit = “1”, the minimum value of tc = 80 ns. 4. When the main clock division selection bit = “1”, values of tw(H) / tc and tw(L) / tc must be set to values from 0.45 through 0.55.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Limits Min. Max. tc(TA) TAiIN input cycle time 80 ns tw(TAH) TAiIN input high-level pulse width 40 ns tw(TAL) TAiIN input low-level pulse width 40 ns UnitSymbol parameter Timer A input (Count input in event counter mode) Limits Min. Max. tc(TA) TAiIN input cycle time (Note) 320 ns tw(TAH) TAiIN input high-level pulse width (Note) 160 ns tw(TAL) TAiIN input low-level pulse width (Note) 160 ns UnitSymbol parameter Timer A input (Gating input in timer mode) Limits Min. Max. tc(TA) TAiIN input cycle time (Note) 320 ns tw(TAH) TAiIN input high-level pulse width 80 ns tw(TAL) TAiIN input low-level pulse width 80 ns UnitSymbol parameter Timer A input (External trigger input in one-shot pulse mode) Limits Min. Max. tw(TAH) TAiIN input high-level pulse width 80 ns tw(TAL) TAiIN input low-level pulse width 80 ns UnitSymbol parameter Timer A input (External trigger input in pulse width modulation mode) Limits Min. Max. tc(UP) TAiOUT input cycle time 2000 ns tw(UPH) TAiOUT input high-level pulse width 1000 ns tw(UPL) TAiOUT input low-level pulse width 1000 ns tsu(UP–TIN) TAiOUT input setup time 400 ns th(TIN–UP) TAiOUT input hold time 400 ns UnitSymbol parameter Timer A input (Up-down input in event counter mode) UnitSymbol parameter Timer A input (Two-phase pulse input in event counter mode) Limits Min. Max. tc(TA) TAjIN input cycle time 800 ns tsu(TAjIN–TAjOUT ) TAjIN input setup time 200 ns tsu(TAjOUT –TAjIN) TAjOUT input setup time 200 ns Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”. Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Limits Min. Max. tw(INH) ___ INTi input high-level pulse width 250 ns tw(INL) ___ INTi input low-level pulse width 250 ns tw(KIL) KIi input low-level pulse width 250 ns Limits Min. Max. tc(AD) ____ AD TRG input cycle time (minimum allowable trigger) 1000 ns tw(ADL) ____ AD TRG input low-level pulse width 125 ns Limits Min. Max. tc(TB) TBiIN input cycle time (Note) 320 ns tw(TBH) TBiIN input high-level pulse width (Note) 160 ns tw(TBL) TBiIN input low-level pulse width (Note) 160 ns Limits Min. Max. tc(TB) TBiIN input cycle time (one edge count) 80 ns tw(TBH) TBiIN input high-level pulse width (one edge count) 40 ns tw(TBL) TBiIN input low-level pulse width (one edge count) 40 ns tc(TB) TBiIN input cycle time (both edges count) 160 ns tw(TBH) TBiIN input high-level pulse width (both edges count) 80 ns tw(TBL) TBiIN input low-level pulse width (both edges count) 80 ns UnitSymbol Parameter Timer B input (Count input in event counter mode) Limits Min. Max. tc(TB) TBiIN input cycle time (Note) 320 ns tw(TBH) TBiIN input high-level pulse width (Note) 160 ns tw(TBL) TBiIN input low-level pulse width (Note) 160 ns UnitSymbol Parameter Timer B input (Pulse period measurement mode) Symbol Parameter Timer B input (Pulse width measurement mode) A-D trigger input Unit Unit Unit Symbol Parameter Unit Symbol Parameter Serial I/O Symbol Parameter External interrupt INTi input, key input interrupt KIi input Limits Min. Max. tc(CK) CLK i input cycle time 200 ns tw(CKH) CLK i input high-level pulse width 100 ns tw(CKL) CLK i input low-level pulse width 100 ns td(C–Q) TXD i output delay time 80 ns th(C–Q) TXD i hold time 0n s tsu(D–C) R XD i input setup time 30 ns th(C–D) R XD i input hold time 90 ns Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”. Note. Limits change depending on f(XIN). Refer to “DATA FORMULAS”.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER DATA FORMULAS Timer A input (Gating input in timer mode) Limits Min. Max.Symbol Parameter Unit tc(TA) TAiIN input cycle time tw(TAH) TAiIN input high-level pulse width tw (TAL ) TAi IN input low-level pulse width ns ns ns 8 5 109 2 · f(f2) Timer A input (External trigger input in one-shot pulse mode) Limits Min. Max.Symbol Parameter Unit tc(TA) TAiIN input cycle time ns Timer B input (In pulse period measurement mode or pulse width measurement mode) Limits Min. Max.Symbol Parameter Unit ns ns ns tc(TB) TBiIN input cycle time tw(TBH) TBiIN input high-level pulse width tw(TBL) TBiIN input low-level pulse width 8 5 109 2 · f(f2) 4 5 109 2 · f(f2) 4 5 109 2 · f(f2) 8 5 109 2 · f(f2) 4 5 109 2 · f(f2) 4 5 109 2 · f(f2) Note. f(f2) represents the clock f2 frequency. For the relation to the main clock and sub clock, refer to Table 10 in data sheet “M37735MHBXXXFP”.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Limits Min. Max. td(E–P0Q) Port P0 data output delay time 80 ns td(E–P1Q) Port P1 data output delay time 80 ns td(E–P2Q) Port P2 data output delay time 80 ns td(E–P3Q) Port P3 data output delay time 80 ns td(E–P4Q) Port P4 data output delay time 80 ns td(E–P5Q) Port P5 data output delay time 80 ns td(E–P6Q) Port P6 data output delay time 80 ns td(E–P7Q) Port P7 data output delay time 80 ns td(E–P8Q) Port P8 data output delay time 80 ns UnitSymbol Parameter Test conditions SWITCHING CHARACTERISTICS (VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to 85°C, f(XIN) = 25 MHz (Note), unless otherwise noted) Fig. 6 Measuring circuit for ports P0 – P8 and φ1 Fig. 6 P 0 P 1 P 2 P 3 P 4 P 5 P 6 P 7 P 8 f E 50 pF Note. This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Symbol Parameter Chip-select output delay time Chip-select hold time Address output delay time Address output delay time Address hold time ALE pulse width Address output set up time Address hold time ALE output delay time Data output delay time Data hold delay time WEL /WEH pulse width Floating start delay time Floating release delay time ___ RDE pulse width ____ RSMP output delay time ____ RSMP hold time φ1 output delay time ____ HLDA output delay time Limits Wait mode Min. Max. Memory expansion mode and microprocessor mode (VCC = 5 V ± 10%, VSS = 0 V, Ta = 25 °C, f(XIN) = 25 MHz (Note 1), unless otherwise noted) Test conditions td(CS–WE) td(CS–RDE) th(WE–CS) th(RDE–CS) td(An–WE) td(An–RDE) td(A–WE) td(A–RDE) th(WE–An) th(RDE–An) tw(ALE) tsu(A–ALE) th(ALE–A) td(ALE–WE) td(ALE–RDE) td(WE–DQ) th(WE–DQ) tw(WE) tpxz(RDE–DZ) tpzx(RDE–DZ) tw(RDE) td(RSMP–WE) td(RSMP–RDE) th(φ1–RSMP) td(WE– φ1) td(RDE– φ1) td(φ1–HLDA) Notes 1.This applies when the main clock division selection bit = “0” and f(f2) = 12.5 MHz. 2. No wait : Wait bit = “1”. Wait 1 : The external memory area is accessed with wait bit = “0” and wait selection bit = “1”. Wait 0 : The external memory area is accessed with wait bit = “0” and wait selection bit = “0”. Unit ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns ns 130 128 Fig. 6 (Note 2) No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode Bus timing data formulas (VCC = 5 V ± 10%, VSS = 0 V, Ta = –20 to 85 °C, f(XIN) = 25 MHz (Max., Note1), unless otherwise noted) Limits Wait mode Min. Max.Symbol Parameter Unit 1 5 109 2 · f(f2) 3 5 109 2 · f(f2) ns ns No wait Wait 1 Wait 0 td(CS–WE) td(CS–RDE) th(WE–CS) th(RDE–CS) td(An–WE) td(An–RDE) td(A–WE) td(A–RDE) th(WE–An) th(RDE–An) tw(ALE) tsu(A–ALE) th(ALE–A) td(ALE–WE) td(ALE–RDE) td(WE–DQ) th(WE–DQ) tw(WE) tpxz(RDE–DZ) tpzx(RDE–DZ) tw(RDE) td(RSMP–WE) td(RSMP–RDE) th(φ1–RSMP) td(WE– φ1) td(RDE– φ1) ns 4 1 5 109 2 · f(f2) 3 5 109 2 · f(f2) 1 5 109 2 · f(f2) 3 5 109 2 · f(f2) 1 5 109 2 · f(f2) 1 5 109 2 · f(f2) 2 5 109 2 · f(f2) 1 5 109 2 · f(f2) 2 5 109 2 · f(f2) ns ns ns ns ns ns ns ns ns ns No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 No wait Wait 1 Wait 0 1 5 109 2 · f(f2) ns ns ns ns ns ns 1 5 109 2 · f(f2) 1 5 109 2 · f(f2) 2 5 109 2 · f(f2) 4 5 109 2 · f(f2) ns ns 1 5 109 2 · f(f2) 2 5 109 2 · f(f2) 4 5 109 2 · f(f2) 1 5 109 2 · f(f2) ns ns ns ns ns ns Chip-select output delay time Chip-select hold time Address output delay time Address output delay time Address hold time ALE pulse width Address output set up time Address hold time ALE output delay time Data output delay time Data hold time WEL /WEH pulse width Floating start delay time Floating release delay time ___ RDE pulse width ____ RSMP output delay time ____ RSMP hold time φ1 output delay time – 28 – 33 – 28 – 45 – 22 – 18 – 23 – 35 – 35 – 25 – 30 – 22 – 30 – 30 – 20 – 32 – 32 – 30 – 28 – 33 Notes 1.This applies when the main-clock division selection bit = “0”. 2. f(f 2) represents the clock f2 frequency. For the relation to the main clock and sub clock, refer to Table 10 in data sheet “M37735MHBXXXFP”.

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER TIMING DIAGRAM tw(H) td(E–P0Q) td(E–P2Q) td(E–P3Q) td(E–P4Q) td(E–P5Q) td(E–P6Q) td(E–P7Q) td(E–P8Q) Port P0 output Port P0 input Port P1 output Port P1 input Port P2 output Port P2 input Port P3 output Port P3 input E XIN Port P4 output Port P4 input Port P5 output Port P5 input Port P6 output Port P6 input Port P7 output Port P7 input Port P8 output Port P8 input Single-chip mode tsu(P0D–E) th(E–P0D) td(E–P1Q) tr tf tw(L) tc tsu(P1D–E) th(E–P1D) tsu(P2D–E) th(E–P2D) tsu(P3D–E) th(E–P3D) tsu(P4D–E) th(E–P4D) tsu(P5D–E) th(E–P5D) tsu(P6D–E) th(E–P6D) tsu(P7D–E) th(E–P7D) tsu(P8D–E) th(E–P8D)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER TAiIN input TAiOUT input tc(TA) tw(TAH) tw(TAL) tc(UP) tw(UPH) tw(UPL) th(TIN–UP) tsu(UP–TIN) TAiOUT input (Up-down input) TAiIN input (when count by falling) TAiIN input (when count by rising) In event count mode TAjIN input TAjOUT input tc(TA) tsu(TAjIN–TAjOUT ) tsu(TAjIN–TAjOUT ) tsu(TAjOUT –TAjIN) tsu(TAjOUT –TAjIN) In event counter mode (When two-phase pulse input is selected) t c(TB) tw(TBH) tw(TBL) TBiIN input

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER tc(AD) tw(ADL) tc(CK) tw(CKH) tw(CKL) tw(INL) tw(KNL) td(C–Q) tSU(D–C) th(C–D) tw(INH) AD TRG input CLK i TxD i RxD i INTi input Kli input th(C–Q)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER Memory expansion mode and microprocessor mode (When wait bit = “1”) ( When wait bit = “0”) (When wait bit = “1” or “0” in common) Test conditions

• VCC = 5 V – 10%
• Input timing voltage : VIL = 1.0 V, VIH = 4.0 V
• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V RDY input WEL WEH RDE RDY input HOLD input HLDA output tsu(RDY– f1) th(f1–RDY) tsu(RDY– f1) th(f1–RDY) tsu(HOLD– f1) td(f1–HLDA) th(f1–HOLD) td(f1–HLDA) WEL WEH RDE

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER tw(WE) th(WE–DQ) tw(L) tw(H) tf tr tc Memory expansion mode and microprocessor mode (No wait : When wait bit = “1”) XIN CS 0 – CS 4 An ALE Am/Dm td(CS–WE) td(CS–RDE) th(WE –CS) th(RDE– CS) Address td(An–WE) td(An–RDE ) th(RDE –An)tw(ALE) td(ALE–WE) Address Address tsu(A–ALE) th(ALE–A) td(A–WE) td(A–RDE) td(ALE–RDE) tpxz(RDE –DZ) tpzx(RDE–DZ) Address Data Address Address WEL, WEH th(WE–An) td(WE–DQ) Dm IN RDE RSMP Test condition

• Vcc = 5 V – 10%
• Output timing voltage : VIL = 0.8 V, VIH = 2.0 V
• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V tsu(D–RDE) th(RDE–D) tw(RDE) td(RSMP–WE) th(f1–RSMP) td(RSMP–RDE) Data td(RED– f1)td(WE– f1)td(WE– f1) td(RED– f1)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER tctw(L) tw(H) tf tr tw(ALE) td(An–WE) Am/Dm Address td(CS–RDE) tw(RDE) td(RDE-f1) Memory expansion mode and microprocessor mode (Wait 1 : The external area is accessed when wait bit = “0” and wait selection bit = “1”.) XIN Address Address CS 0 – CS 4 An ALE WEL, WEH Dm IN RDE RSMP td(WE– f1) td(RDE– f1) td(CS–WE) td(ALE–WE) th(RDE–An) tsu(A–ALE) th(ALE–A) td(A–WE) td(WE–DQ) tw(WE) td(A–RDE) tpzx(RDE–DZ) th(RDE–CS) th(RDE–D) tsu(D–RDE) td(RSMP–WE) th(f1–RSMP) td(RSMP–RDE) Test condition

• Vcc = 5 V – 10%
• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V
• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V Data Address th(WE–CS) Data td(WE– f1) th(WE-An) td(ALE–RDE) td(An–RDE) th(WE–DQ) Address tpxz(RDE–DZ)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER tctr th(ALE–A) td(ALE–WE) td(WE–DQ) tw(L) tw(H) tf Memory expansion mode and microprocessor mode (Wait 0 : The external memory area is accessed when wait bit = “0” and wait selection bit = “0”.) X IN Address Address Address Address Data CS 0 – CS 4 An ALE Am/Dm WEL , WEH Dm IN RDE RSMP td(CS–WE) th(WE–CS) td(CS–RDE) td(An–WE) tw(ALE) th(WE–An) td(An–RDE) th(RDE–An) tsu(A–ALE) th(WE–DQ) td(ALE–RDE) td(A–WE) tw(WE) td(A–RDE) tpxz(RDE–DZ) tpzx(RDE–DZ) th(RDE–CS) th(RDE–D)tsu(D–RDE) tw(RDE) td(RSMP–WE) th(f1–RSMP) td(RSMP–RDE) Address Data Address Test conditions

• Vcc = 5 V – 10%
• Output timing voltage : VOL = 0.8 V, VOH = 2.0 V
• Data input DmIN : VIL = 0.8 V, VIH = 2.5 V td(WE– f1) td(RDE– f1) td(RDE– f1)td(WE– f1)

Y Notice: This is not a final specification. Some parametric limits are subject to change. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER PACKAGE OUTLINE

SINGLE-CHIP 16-BIT MICROCOMPUTER M37735M4BXXXFP MITSUBISHI ELECTRIC Date: Receipt GZZ–SH00–78B<84A0> ( ) Note : Please fill in all items marked Customer SupervisorCompany name Date issued Date: TEL 1. Confirmation Specify the name of the product being ordered. Three sets of EPROMs are required for each pattern (Check @ in the appropriate box). If at least two of the three sets of EPROMs submitted contain the identical data, we will produce masks based on this data. We shall assume the responsibility for errors only if the mask ROM data on the products we produce differ from this data. Thus, the customer must be especially careful in verifying the data contained in the EPROMs submitted. Checksum code for entire EPROM areas EPROM Type : (1) Set “FF 16” in the shaded area. (2) Address 0 16 to 10 16 are the area for storing the data on model designation and options.This area must be written with the data shown below. Details for option data are given next in the section describing the STP instruction option. Address and data are written in hexadecimal notation. F A E C B (hexadecimal notation) 27512 FFFF 9 D Responsible officer Section head signature Supervisor signature Issuance signatures FF FF FF FF FF FF FF Option data Address Address Address One of the following sets of data should be written to the option data address (1016) of the EPROM you have ordered. Check @ in the appropriate box. STP instruction enable STP instruction disable 2. STP instruction option 0116 0016 Address 1016 Address 1016 3. Mark specification Mark specification must be submitted using the correct form for the type of package being ordered fill out the appropriate 80P6N Mark Specification Form (for M37735M4BXXXFP) and attach to the Mask ROM Order Confirmation Form. 4. Comments

7700 FAMILY MASK ROM ORDER CONFIRMATION FORM

(6-digit, or 7-digit) 65 40 64 41 Customer’s Parts Number Note : The fonts and size of characters are standard Mitsubishi type. Mitsubishi IC catalog name Notes 1 : The mark field should be written right aligned. 2 : The fonts and size of characters are standard Mitsubishi type. 3 : Customer’s parts number can be up to 14 alphanumeric char- acters for capital letters, hyphens, commas, periods and so on. 80P6N (80-PIN QFP) MARK SPECIFICATION FORM Mitsubishi IC catalog name Please choose one of the marking types below (A, B, C), and enter the Mitsubishi IC catalog name and the special mark (if needed). A. Standard Mitsubishi Mark C. Special Mark Required B. Customer’s Parts Number + Mitsubishi IC Catalog Name Mitsubishi IC catalog name Notes1 : If special mark is to be printed, indicate the desired lay- out of the mark in the left figure. The layout will be duplicated technically as close as possible. Mitsubishi product number (6-digit, or 7-digit) and Mask ROM number (3-digit) are always marked for sorting the products. 2 : If special character fonts (e,g., customer’s trade mark logo) must be used in Special Mark, check the box be- low. For the new special character fonts, a clean font original (ideally logo drawing) must be submitted. Special character fonts required 65 40 64 41

© 1997 MITSUBISHI ELECTRIC CORP. H-LF481-A KI-9703 Printed in Japan (ROD) 2 New publication, effective Mar. 1997. Specifications subject to change without notice. Notes regarding these materials ¡ These materials are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer’s application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. ¡ Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party’s rights, originating in the use of any product data, diagrams, charts or circuit application examples contained in these materials. ¡ All information contained in these materials, including product data, diagrams and charts, represent information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. ¡ Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. ¡ The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. ¡ If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. ¡ Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein. Keep safety first in your circuit designs! ¡ Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap. MITSUBISHI MICROCOMPUTERS M37735M4BXXXFP SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER PRELIMINAR Y Notice: This is not a final specification. Some parametric limits are subject to change.

Rev. Rev. No. date

1.0 First Edition 970604

1.01 The following are added: 980526

• MASK ROM ORDER CONFIRMATION FORM
• MARK SPECIFICATION FORM REVISION DESCRIPTION LIST M37735M4BXXXFP DATA SHEET (1/1) Revision Description