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SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 Copyright  1993, Texas Instruments Incorporated 2–1POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

  • 3-State Outputs Drive Bus Lines or Buffer Memory Address Registers
  • Package Options Include Plastic Small-Outline (SOIC) and Shrink Small-Outline (SSOP) Packages, Ceramic Chip Carriers, and Plastic and Ceramic DIPs

description

These octal buffers and line drivers are designed specifically to improve both the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. Taken together with the ′F241 and ′F244, these devices provide the choice of selected combinations of inverting and noninverting outputs, symmetrical OE (active-low output-enable) inputs, and complementary OE and OE inputs. The ′F240 is organized as two 4-bit buffers/line drivers with separate output enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. The SN74F240 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54F240 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74F240 is characterized for operation from 0°C to 70°C. FUNCTION TABLE (each buffer) INPUTS OUTPUT OE A Y L H L L LH H X Z 1OE 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 GND V CC 2OE 1Y1 2A4 1Y2 2A3 1Y3 2A2 1Y4 2A1 SN54F240 ...J PACKAGE SN74F240 . . . DB, DW, OR N PACKAGE (TOP VIEW) 3212 0 1 9 91 0 1 1 1 2 1 3 1Y1 2A4 1Y2 2A3 1Y3 1A2 2Y3 1A3 2Y2 1A4 SN54F240 . . . FK PACKAGE (TOP VIEW)2Y4 1A1 1OE 1Y4 2A2 2OE 2Y1 GND 2A1 VCC PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 2–2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 logic symbol† logic diagram (positive logic) † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. 17 3 1A1 1A2 1A3 1A4 1Y1 2A1 2A2 2A3 2A4 2Y1 1Y2 1Y3 1Y4 2Y2 2Y3 2Y4 1OE 2OE 1A1 1A2 1A3 1A4 EN 1Y1 1Y2 1Y3 1Y4 2A1 2A2 2A3 2A4 EN 2Y1 2Y2 2Y3 2Y4 1OE 2OE absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTE 1: The input voltage ratings may be exceeded provided the input current ratings are observed.

SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 2–3POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 recommended operating conditions SN54F240 SN74F240 UNIT MIN NOM MAX MIN NOM MAX UNIT VCC Supply voltage 4.5 5 5.5 4.5 5 5.5 V VIH High-level input voltage 2 2 V VIL Low-level input voltage 0.8 0.8 V IIK Input clamp current –18 –18 mA IOH High-level output current –1 2 –1 5 mA IOL Low-level output current 48 64 mA TA Operating free-air temperature –55 125 0 70 °C electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS SN54F240 SN74F240 UNITPARAMETER TEST CONDITIONS MIN TYP † MAX MIN TYP † MAX UNIT VIK VCC = 4.5 V, II = –18 mA –1.2 –1.2 V IOH = – 3 mA 2.4 3.3 2.4 3.3 VOH VCC = 4.5 V IOH = – 12 mA 2 3.2 VVOH IOH = – 15 mA 2 3.1 V VCC = 4.75 V, IOH = – 3 mA 2.7 VOL VCC =45V IOL = 48 mA 0.38 0.55 VVOL VCC = 4.5 V IOL = 64 mA 0.42 0.55 V IOZH VCC = 5.5 V, VO = 2.7 V 50 50 µA IOZL VCC = 5.5 V, VO = 0.5 V –50 –50 µA II VCC = 5.5 V, VI = 7 V 0.1 0.1 mA IIH VCC = 5.5 V, VI = 2.7 V 20 20 µA IIL VCC = 5.5 V, VI = 0.5 V –1 –1 mA IOS ‡ VCC = 5.5 V, VO = 0 –100 –225 –100 –225 mA Outputs high 19 29 19 29 ICC VCC = 5.5 V Outputs low 50 75 50 75 mA Outputs disabled 42 63 42 63 † All typical values are at VCC = 5 V, TA = 25°C. ‡ Not more than one output should be shorted at a time, and the duration of the short circuit should not exceed one second.

SN54F240, SN74F240 OCTAL BUFFERS/DRIVERS WITH 3-STATE OUTPUTS SDFS061A – D2932, MARCH 1987 – REVISED OCTOBER 1993 2–4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 switching characteristics (see Note 2) PARAMETER FROM (INPUT ) TO (OUTPUT ) VCC = 5 V, C L = 50 pF, R L = 500 Ω , TA = 25°C VCC = 4.5 V to 5.5 V, C L = 50 pF, R L = 500Ω , TA = MIN to MAX† UNIT(INPUT) (OUTPUT) ′F240 SN54F240 SN74F240 MIN TYP MAX MIN MAX MIN MAX tPLH Any A Y 2.2 4.7 7 2.2 9 2.2 8 ns tPHL ns tPZH OE Y ns tPZL ns tPHZ OE Y ns tPLZ OE Y ns † For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. NOTE 2: Load circuits and waveforms are shown in Section 1.

www.ti.com 25-Sep-2013 Addendum-Page 1 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples 5962-9758501Q2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9758501Q2A SNJ54F 240FK 5962-9758501QRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758501QR A SNJ54F240J 5962-9758501QSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758501QS A SNJ54F240W JM38510/33201B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33201B2A JM38510/33201BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33201BRA JM38510/33201BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33201BSA M38510/33201B2A ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 JM38510/ 33201B2A M38510/33201BRA ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 JM38510/ 33201BRA M38510/33201BSA ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 JM38510/ 33201BSA SN54F240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 SN54F240J SN74F240DBLE OBSOLETE SSOP DB 20 TBD Call TI Call TI 0 to 70 SN74F240DBR NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DBRE4 NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DBRG4 NRND SSOP DB 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DW ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWE4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240

www.ti.com 25-Sep-2013 Addendum-Page 2 Orderable Device Status (1) Package Type Package Drawing Pins Package Qty Eco Plan (2) Lead/Ball Finish MSL Peak Temp (3) Op Temp (°C) Device Marking (4/5) Samples SN74F240DWG4 ACTIVE SOIC DW 20 25 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWR ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWRE4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240DWRG4 ACTIVE SOIC DW 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 F240 SN74F240N ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F240N SN74F240NE4 ACTIVE PDIP N 20 20 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type 0 to 70 SN74F240N SN74F240NSR ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SN74F240NSRE4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SN74F240NSRG4 ACTIVE SO NS 20 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 0 to 70 74F240 SNJ54F240FK ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type -55 to 125 5962- 9758501Q2A SNJ54F 240FK SNJ54F240J ACTIVE CDIP J 20 1 TBD A42 N / A for Pkg Type -55 to 125 5962-9758501QR A SNJ54F240J SNJ54F240W ACTIVE CFP W 20 1 TBD Call TI N / A for Pkg Type -55 to 125 5962-9758501QS A SNJ54F240W (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details.

www.ti.com 25-Sep-2013 Addendum-Page 3 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF SN54F240, SN74F240 :

  • Catalog: SN74F240
  • Military: SN54F240 NOTE: Qualified Version Definitions:
  • Catalog - TI's standard catalog product
  • Military - QML certified for Military and Defense Applications

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Reel Diameter (mm) Reel Width W1 (mm) (mm) (mm) (mm) (mm) W (mm) Pin1 Quadrant PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 1

*All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) SN74F240DBR SSOP DB 20 2000 367.0 367.0 38.0 SN74F240DWR SOIC DW 20 2000 367.0 367.0 45.0 SN74F240NSR SO NS 20 2000 367.0 367.0 45.0 PACKAGE MATERIALS INFORMATION www.ti.com 26-Jan-2013 Pack Materials-Page 2

MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 DB (R-PDSO-G**) PLASTIC SMALL-OUTLINE 4040065 /E 12/01

28 PINS SHOWN

8,20 7,40 0,55 0,95 0,25 12,90 12,30 10,50 8,50 Seating Plane 9,907,90 10,50 9,90 0,38 5,60 5,00 0,22 A 2016 6,506,50 0,05 MIN 5,905,90 DIM A MAX A MIN PINS ** 2,00 MAX 6,90 7,50 0,65 M0,15 0°–/C02578° 0,10 0,09 0,25 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-150

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