M32R RENESAS | Alldatasheet
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Renesas Electronics Corporation www.renesas.com 32-bit RISC CPU Datasheet Overview ⚫ M32R is a 32-bit RISC CPU. Key Features ⚫ RISC architecture ⚫ 32-bit general purpose register x 16 ⚫ Number of instructions 83 ⚫ 5 stage pipeline ⚫ Two formats of 16 bit length instruction and 32 bit instruction are adopted ⚫ The code size of the program can be suppressed by the instruction format of 16 bit length ⚫ Multiply-accumulate function ⚫ Built-in 32-bit x 16-bit multiplier enables execution of 32-bit x 32-bit integer multiplication instruction with 3 CPUCLK ⚫ Execute multiply-accumulate instruction with 56-bit accumulator ⚫ Peripheral circuit ⚫ SRAM, cache, bus control circuit, interrupt controller, multifunction timer, serial I / O, watchdog timer Block diagram © 2018 Renesas Electronics Corporation. All rights reserved. R06PM0061EJ0100 Rev.1.00 2018.09.20