M27W101_06 STMICROELECTRONICS | Alldatasheet
Document overview
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- PDF pages: 23
Technical content
Datasheet sections
- 1 Summary description
- 2 Device description
- 2.1 Read mode
- 2.2 Standby mode
- 2.3 Two-line output control
- 2.4 System considerations
- 2.5 Programming
- 2.6 Presto II programming algorithm
- 2.7 Program Inhibit
- 2.8 Program Verify
- 2.9 Electronic Signature
- 2.10 Erasure operation (applies to UV EPROM)
- 3 Maximum ratings
- 4 DC and AC parameters
- 5 Package mechanical data
- 6 Part numbering
- 7 Revision history
Features
■ 2.7V to 3.6V Low Voltage in Read Operation ■ Access Time: –7 0 n s a t VCC = 3.0V to 3.6V –8 0 n s a t VCC = 2.7V to 3.6V ■ Pin compatible with M27C1001 ■ Low Power Consumption: – Active Current: 15 mA at 5 MHz – Standby Current: 15 µA ■ Programming Time: 100 µs/byte ■ High Reliability CMOS Technology – 2,000V ESD Protection – 200 mA Latch-up Protection Immunity ■ Electronic Signature – Manufacturer Code: 20h – Device Code: 05h ■ ECOPACK® packages available FDIP32W (F) PDIP32 (B) PLCC32 (K) TSOP32 (N) 8 x 20 mm
1 Summary description
large data or program storage and is organized as 131,072 by 8 bits. increase in the time between battery recharges. written to the device by following the programming procedure. the M27W101 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages. ECOPACK is an ST trademark. ECOPACK® specifications are available at: www.st.com. signals connected to this device. Figure 1. Logic diagram
Figure 2. DIP Connections Table 1. Signal descriptions
Figure 3. LCC Connections Figure 4. TSOP Connections
1 A16
32 VPP
2 Device description
on A9 for Electronic Signature. Note: X = V IH or VIL, VID = 12V ± 0.5V.
2.1 Read mode
been low and the addresses have been stable for at least tAVQV -tGLQV .
2.2 Standby mode
CC ≤ 3.6V, see Read Mode DC Characteristics table for details.
2.3 Two-line output control
control function which accommodates the use of multiple memory connection.
- the lowest possible memory power dissipation,
- complete assurance that output bus contention will not occur.
Table 2. Operating modes
M27W101 Device description For the most efficient use of these two control lines, E should be decoded and used as the primary device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. This ensures that all deselected memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
2.4 System considerations
The power switching characteristics of Advanced CMOS EPROMs require careful decoupling of the devices. The supply current, I CC , has three segments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the falling and rising edges of E . The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output. The associated transient voltage peaks can be suppressed by complying with the two line output control and by properly selected decoupling capacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V CC and VSS . This should be a high frequency capacitor of low inherent inductance and should be placed as close to the device as possible. In addition, a 4.7µF bulk electrolytic capacitor should be used between V CC and VSS for every eight devices. The bulk capacitor should be located near the power supply connection point. The purpose of the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.
2.5 Programming
The M27W101 has been designed to be fully compatible with the M27C1001 and has the same electronic signature. As a result the M27W101 can be programmed as the M27C1001 on the same programming equipment applying 12.75V on V PP and 6.25V on VCC using the same PRESTO II algorithm. When delivered (and after each ‘1’s erasure for UV EPROM), all bits of the M27W101 are in the '1' state. Data is introduced by selectively programming '0's into the desired bit locations. Although only '0's will be programmed, both '1's and '0's can be present in the data word. The only way to change a ‘0’ to a ‘1’ is by die exposure to ultraviolet light (UV EPROM). The M27W101 is in the programming mode when V PP input is at 12.75V, E is at VIL and P is pulsed to VIL. The data to be programmed is applied to 8 bits in parallel to the data output pins. The levels required for the address and data inputs are TTL. V CC is specified to be 6.25V ± 0.25V.
2.6 Presto II programming algorithm
Presto II Programming Algorithm allows the whole array to be programmed, with a guaranteed margin, in a typical time of 13 seconds. Programming with Presto II involves in applying a sequence of 100µs program pulses to each byte until a correct verify occurs (see Figure 5). During programming and verify operation, a Margin Mode circuit is automatically activated in order to guarantee that each cell is programmed with enough margin. No overprogram pulse is applied since the verify in Margin Mode at V CC much higher than 3.6V, provides necessary margin to each programmed cell.
Figure 5. Programming Flowchart
2.7 Program Inhibit
2.8 Program Verify
2.9 Electronic Signature
held at VIL during Electronic Signature mode.
Table Table 3 and can be read-out on outputs Q7 to Q0. Note that the M27W101 and M27C1001 have the same identifier byte.
2.10 Erasure operation (applies to UV EPROM)
- The erasure time with this dosage is approximately
have a filter on their tubes which should be removed before erasure. Table 3. Electronic Signature
3 Maximum ratings
Table 4. Absolute Maximum Ratings (1)
- Except for the rating "Operating Temperature Range", stresses above those listed in the Table "Absolute
- Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than
4 DC and AC parameters
Table 5. Read Mode DC Characteristics (1)
- V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
- Maximum DC voltage on Output is VCC +0.5V.
Table 6. Programming Mode DC Characteristics (1)
- V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
Table 9. Read Mode AC Characteristics (1)
- V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
- Speed obtained with High Speed measurement conditions.
- Sampled only, not 100% tested.
Table 10. Programming Mode AC Characteristics (1)
- V CC must be applied simultaneously with or before VPP and removed simultaneously or after VPP .
- Sampled only, not 100% tested.
5 Package mechanical data
Figure 10. FDIP32WA package outline Table 11. FDIP32WA package mechanical data
Figure 11. PDIP32 package outline Table 12. PDIP32 package mechanical data
Figure 12. PLCC32 package outline Table 13. PLCC32 package mechanical data
Figure 13. TSOP32 package outline Table 14. TSOP32 package mechanical data
6 Part numbering
Table 15. Ordering Information Scheme aspect of this device, please contact the STMicroelectronics Sales Office nearest to you.
- High Speed, see AC Characteristics section for further information.
- This speed also guarantees 70ns access time at VCC = 3.0V to 3.6V.
- These speeds are replaced by the 100ns.
- Packages option available on request. Please contact STMicroelectronics local Sales Office.
7 Revision history
Table 16. Document revision history 25- Jul-1999 1 Initial release. 12-Apr-2006 3 Converted to new template. Added ECOPACK® information.