M2702 MTRONPTI | Alldatasheet

Document overview

  • Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
  • PDF pages: 5

Technical content

SPECIFICATION FOR 5.0x7.0mm LVPECL/LVDS SMT OSCILLATOR Page 1 of 5 The information contained herein is proprietary to MtronPTI and is submitted in confidence. This information may not be copied or divulged without written permission from MtronPTI.

FEATURES

APPLICATIONS

LVPECL/LVDS Differential Output Low RMS Jitter Performance 12 kHz to 20 MHz (1 ps max, 156.25 MHz) RoHS 6/6 Compliant 10G Reference NIC Card Ethernet Test and Measurement Ordering Information: Product Family (Supply Voltage Option) Temperature Range Stability Enable/Disable Logic Type Package/Lead Configuration Frequency MHz Code Value Code Value Code Value Code Value Code Value M2702 (3.3V) M2703 (2.5V) 6 -20 °C to +70 °C 3 ±100 ppm B Enable High (pad 1) P LVPECL N Leadless XXX.XXXXXX 2 -40 °C to +85 °C 4 ±50 ppm L LVDS 6 ±25 ppm 8 ±20 ppm Example: M270224BPN 100.000000 MHz M2702 2 4 B P N 100.000000 Parameter Symbol Min. Typ. Max. Units Conditions Frequency of Operation FO 10 1500 MHz Frequency Stability Frequency Stability F/F See ordering information Aging ±2 ppm 1 st year RF Output Output Type LVPECL Compatible Output Load 50 Ω to (Vcc-2.0) V DC V Symmetry (duty cycle) 45 55 % Ref. to 50% of waveform Logic Level “0” V OL V cc-1.85 V cc-1.63 V Logic Level “1” V OH V cc-1.03 V cc-0.60 V Rise/Fall Time T R/TF 0.3 0.4 ns 20% to 80% of waveform Start-up Time T SU 10 ms T ambient = +25°C Enable Logic (Pad 1) 70% VCC or N/C V Output Enabled Disable Logic (Pad 1) 30% V CC V Output Disabled to high-Z Supply Voltage & Power Consumption Operating Voltage V CC 3.135 3.300 3.465 V (M2702) 2.375 2.500 2.625 V (M2703) Supply Current I CC 80 mA Revision B 10/09/17

SPECIFICATION FOR 5.0x7.0mm LVPECL/LVDS SMT OSCILLATOR Page 2 of 5 The information contained herein is proprietary to MtronPTI and is submitted in confidence. This information may not be copied or divulged without written permission from MtronPTI. Parameter Symbol Min. Typ. Max. Units Conditions Frequency of Operation FO 10 1500 MHz Frequency Stability Frequency Stability F/F See ordering information Aging ±2 ppm 1 st year RF Output Output Type LVDS Compatible Output Load 100 Ω Differential V Symmetry (duty cycle) VOH 45 55 % Ref. to 50% of waveform Differential Output Voltage VDIFF 175 350 mV peak-to-peak differential output voltage Output Offset Voltage VOS 1.250 V Rise/Fall Time T R/TF 0.6 ns 20% to 80% of waveform Start-up Time T SU 10 ms T ambient = +25°C Enable Logic (Pad 1) 70% VCC or N/C V Output Enabled Disable Logic (Pad 1) 30% V CC V Output Disabled to high-Z Supply Voltage & Power Consumption Operating Voltage V CC 3.135 3.300 3.465 V (M2702) 2.375 2.500 2.625 V (M2703) Supply Current I CC 60 mA Environmental & Packaging Requirements: Storage Temperature -55°C to 125°C Mechanical Shock Per MIL-STD-202, Method 213, Condition C (100 g’s, 6 ms) Vibration Per MIL-STD-202, Method 204D, Condition C (10 g’s, 55 – 2000 Hz) Aging +85°C ±3°C, 720H (No BIAS) Humidity +40°C ±2°CX90~95%, 96H (NO BIAS) Thermal Cycle Per MIL-STD-883, Method 1010, Condition B (-55 °C to +125 °C, 10 cycles) Hermeticity Per MIL-STD-202, Method 112 (1 x 10 -8 atm cc/s of Helium) Moisture Sensitivity Level MSL1 Solderability Per EIAJ-STD-002, Method 208 Max. Soldering Conditions See solder profile, Figure 1 Pad Termination Gold, 1 µm maximum thickness Package Type 6-pad 5.0 X 7.0 mm leadless ceramic. RoHS compliant.

SPECIFICATION FOR 5.0x7.0mm LVPECL/LVDS SMT OSCILLATOR Page 3 of 5 The information contained herein is proprietary to MtronPTI and is submitted in confidence. This information may not be copied or divulged without written permission from MtronPTI. Marking, Pin Out: Dimensions: Output Waveform: Pad Function

1 Enable/Disable

2 No Connection

3 Ground

4 Output

5 Complementary Output

Line 1 [part designation] Line 2 FFFMFFFF Line 3 M yy ww vv Legend M MtronPTI F Frequency yy Year ww Work Week vv Factory code

SPECIFICATION FOR 5.0x7.0mm LVPECL/LVDS SMT OSCILLATOR Page 4 of 5 The information contained herein is proprietary to MtronPTI and is submitted in confidence. This information may not be copied or divulged without written permission from MtronPTI. Typical LVPECL Test Circuit & Load Circuit Diagrams: Typical LVDS Test Circuit & Load Circuit Diagrams: