M24512 STMICROELECTRONICS | Alldatasheet

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Technical content

512 Kbit Serial I²C Bus EEPROM

Table 1. M24512 devices Figure 1. Packages

has a push-pull (rather than open drain) output. the value of the pull-up resistor can be calculated). puts are read as Low (0,0,0). Write operations are allowed. Data bytes are not acknowledged. Figure 4. Maximum RP Value versus Bus Parasitic Capacitance (C) for an I2C Bus

Figure 5. I2C Bus Protocol Table 3. Device Select Code Note: 1. The most significant bit, b7, is sent first.

  1. E0, E1 and E2 are compared against the respective external pins on the memory device.

Table 4. Most Significant Byte Table 5. Least Significant Byte

any device that reads the data to be a receiver. a slave in all communication. and will not respond unless one is given. (SDA) on the rising edge of Serial Clock (SCL). sends the Device Select Code, shown in Table 3. (on Serial Data (SDA), most significant bit first). bit Device Type Identifier is 1010b. code on the Chip Enable (E0, E1, E2) inputs. set to 1 for Read and 0 for Write operations. Table 6. Operating Modes

1 X reSTART, Device Select, RW = 1

Figure 6. Write Mode Sequences with WC=1 (data write inhibited) not acknowledged, as shown in Figure 6.. address of the byte in memory. ter the last one that was modified.

dition, as shown in Figure 7. Figure 7. Write Mode Sequences with WC

Figure 8. Write Cycle Polling Flowchart using ACK data from its internal latches to the memory cells. – Initial condition: a Write cycle is in progress. byte of the new instruction). having been sent during Step 1).

Figure 9. Read Mode Sequences Note: 1. The seven most significant bits of the Device Select Code of a Random Read (in the 1st and 4th bytes) must be identical. the state of the Write Control (WC) signal. mented by one, to point to the next byte address.

This operation can be used after a Current Ad- dress Read or a Random Address Read. The bus master does acknowledge the data byte output, and sends additional clock pulses so that the de- vice continues to output the next byte in sequence. To terminate the stream of bytes, the bus master must not acknowledge the last byte, and must generate a Stop condition, as shown in Figure 9. The output data comes from consecutive address- es, with the internal address counter automatically incremented after each byte output. After the last memory address, the address counter ‘rolls-over’, and the device continues to output data from memory address 00h. Acknowledge in Read Mode For all Read commands, the device waits, after each byte read, for an acknowledgment during the 9th bit time. If the bus master does not drive Serial Data (SDA) Low during this time, the device termi- nates the data transfer and switches to its Stand- by mode. INITIAL DELIVERY STATE The device is delivered with all bits in the memory array set to 1 (each byte contains FFh).

Table 7. may cause permanent damage to the de- Table 7. Absolute Maximum Ratings

Table 8. Operating Conditions (M24512 – W) Table 9. Operating Conditions (M24512 – R) Table 10. AC Measurement Conditions Figure 10. AC Measurement I/O Waveform

Table 11. Input Parameters

  1. Sampled only, not 100% tested.
  2. E2,E1,E0: Input impedance when the memory is selected (after a Start condition).

Table 12. DC Characteristics (M24512 – W) Note: 1. When the device is selected (after a START condition), the Ei inputs have a different input impedance, as defined in Table 11. Table 13. DC Characteristics(1) (M24512 – R)

Table 14. AC Characteristics (M24512 – W) Note: 1. For a reSTART condition, or following a Write cycle.

  1. Sampled only, not 100% tested.
  2. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
  3. For M24512 devices whose package marking shows the process letter “A” t

Table 15. AC Characteristics(1) (M24512 – R)

  1. For a reSTART condition, or following a Write cycle.
  2. Sampled only, not 100% tested.
  3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.

Figure 11. AC Waveforms

Figure 12. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Outline Note: Drawing is not to scale. Table 16. PDIP8 – 8 pin Plastic DIP, 0.25mm lead frame, Package Mechanical Data

Figure 13. SO8W – 8 lead Plastic Small Outline, 208 mils body width, Package Outline Note: Drawing is not to scale. Table 17. SO8W – 8 lead Plastic Small Outline, 208 mils body width, Package Mechanical Data

Figure 14. SO8N – 8 lead Plastic Small Outline, 150 mils body width, Package Outline Note: Drawing is not to scale. Table 18. SO8N – 8 lead Plastic Small Outline, 150 mils body width, Package Mechanical Data

Figure 15. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Outline Note: Drawing is not to scale. Table 19. TSSOP8 – 8 lead Thin Shrink Small Outline, Package Mechanical Data

Table 20. Ordering Information Scheme 6 = Industrial temperature range, –40 to 85 °C.

REVISION HISTORY

Table 21. Document Revision History Description, Power-On Reset, Memory Addressing, Write Operations, Read Operations. INITIAL DELIVERY STATE is FFh (not necessarily the same as Erased). MECHANICAL section and Table 20., Ordering Information Scheme). Voltage range R (1.8V to 5.5V) also offered. Minor wording changes. ZL Test Conditions modified in Table 11., Input Parameters and Note 3. added. ICC and ICC1 values for VCC = 5.5V added to Table 12., DC Characteristics (M24512 – W). Note added to Table 12., DC Characteristics (M24512 – W). Power On Reset paragraph specified. tW max value modified in Table 14., AC Characteristics (M24512 – W) and note 4 added. Plating technology changed in Table 20., Ordering Information Scheme. Parasitic Capacitance (C) for an I2C Bus.

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics. ECOPACK is a registered trademark of STMicroelectronics. All other names are the property of their respective owners © 2005 STMicroelectronics - All rights reserved STMicroelectronics group of companies Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America