M14C16 STMICROELECTRONICS | Alldatasheet
Document overview
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Technical content
16/4 Kbit Serial I²C Bus EEPROM ■ Two Wire I2C Serial Interface Supports 400 kHz Protocol ■ Single Supply Voltage (2.5 V to 5.5 V) ■ Hardware Write Control ■ BYTE and PAGE WRITE (up to 16 Bytes) ■ BYTE, RANDOM and SEQUENTIAL READ Modes ■ Self-Timed Programming Cycle ■ Automatic Address Incrementing ■ Enhanced ESD/Latch-Up Behaviour ■ 1 Million Erase/Write Cycles (minimum) ■ 40 Year Data Retention (minimum) ■ 5 ms Programming Time (typical)
DESCRIPTION
Each device is an electrically erasable program- mable memory (EEPROM) fabricated with STMi- croelectronics’s High Endurance, Single Polysilicon, CMOS technology. This guarantees an endurance typically well above one million Erase/Write cycles, with a data retention of 40 years. The memory operates with a power sup- ply as low as 2.5 V. The M14C16 and M14C04 are each available in wafer form (either sawn or unsawn) and in micro- module form (on film). Each memory is compatible with the I 2C memory standard. This is a two wire serial interface thatFigure 1. Logic Diagram AI02217 SDA VCC M14xxxWC SCL GND Table 1. Signal Names
memory can be attached to each I2C bus. following the bus master’s 8-bit transmission. must be applied before applying any logic signal. pull-up resistor can be calculated). Figure 2. D20 Contact Connections Table 2. Absolute Maximum Ratings 1 tions for extended periods may affect device reliability. Refer also to the ST SURE Program and other relevant quality documents.
ly read as VIL and write operations are allowed. detailed description of the Write Control feature. known as the master, and the other as the slave. tion, and will not respond unless one is given. the internal EEPROM write cycle. knowledge the receipt of the 8 data bits. the seven bits are fixed as shown in Table 3. Figure 3. Maximum R
Figure 4. I Table 3. Device Select Code 1 Note: 1. A10, A9 and A8 correspond to the most significant bits of the memory array address word.
Figure 5. Write Mode Sequences with WC=1 will not respond to any request.
Figure 6. Write Mode Sequences with WC=0 Table 4. Operating Modes polling sequence can be used by the master. – Initial condition: a Write is in progress.
into the address counter, as shown in Figure 8. nates the transfer with a STOP condition. automatically incremented after each byte output. The memory has an internal address counter. with a STOP condition, as shown in Figure 8. Figure 7. Write Cycle Polling Flowchart using ACK
Figure 8. Read Mode Sequences Note: 1. The seven most significant bits of the Device Select bytes of a Random Read (in the 1st and 3rd bytes) must be identical.
Table 5. AC Characteristics Note: 1. For a reSTART condition, or following a write cycle.
- Sampled only, not 100% tested
Table 6. DC Characteristics
M14C16, M14C04 Table 9. Ordering Information Scheme
1 GND at top right
2 GND at bottom right
3 GND at bottom left
4 GND at top left
ORDERING INFORMATION
Devices are shipped from the factory with the memory content set at all ‘1’s (FFh). The notation used for the device number is as shown in Table 9. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. Sawn wafers are scribed and mounted in a frame on adhesive tape. The orientation is defined by the position of the GND pad on the die, viewed with active area of product visible, relative to the notch- es of the frame (as shown in Figure 11). The orien- tation of the die with respect to the plastic frame notches is specified by the Customer. One further concern, when specifying devices to be delivered in this form, is that wafers mounted on adhesive tape must be used within a limited pe- riod from the mounting date: – two months, if wafers are stored at 25°C, 55% relative humidity – six months, if wafers are stored at 4°C, 55% rel- ative humidity
Figure 11. Sawing Orientation
M14C16, M14C04 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. © 1998 STMicroelectronics - All Rights Reserved The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. http://www.st.com