M145026

M145026 STMICROELECTRONICS | Alldatasheet

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7 SGS-THOMSON M145026

YA WwickOELECTROMICS M145027 - M145028 REMOTE CONTROL ENCODER/DECODER CIRCUITS = M145026 ENCODER = M145027/M145028 DECODERS = MAYBE ADDRESSED IN EITHER BINARY OR TRINARY a TRINARY ADDRESSING MAXIMIZES NUM- BER OF CODES = INTERFACES WITH RF, ULTRASONIC, ORIN- erty FRARED TRANSMISSION MEDIAS S% an A { | = DOUBLE TRANSMISSIONS FOR ERROR ee AY fi { CHECKING \\ | = 4.5V TO 18V OPERATION = ON-CHIP R/C OSCILLATOR, NO CRYSTAL REQUIRED (Pasicy ecko) a HIGH EXTERNAL COMPONENT TOLER- ANCE, CAN USE 5% COMPONENTS. ORDER CODES : = STANDARD CMOS B-SERIES INPUT AND M145026B1 OUTPUT CHARACTERISTICS M14502781 » APPLICATIONS INCLUDE GARAGE DOOR M145028 B1 OPENERS, REMOTE CONTROLLED TOYS, SECURITY MONITORING, ANTITHEFT SYS- TEMS, LOW END DATA TRANSMISSIONS WIRE LESS TELEPHONES DESCRIPTION Ke The M145026 encodes nine bits of information and Net \\' serially transmits this information upon receipt of a transmit enable, TE, (active low) signal. Nine inputs ‘$016 Narrow (0.15") may be encoded with trinary data (0,1, open) to al- (Plastic package) low 3° (19.683) different codes. ORDER CODE : M145026D Two decoders are presently available. Both use the same transmitter - the M145026. The decoders will receive the 9-bit word and will interpret some of the bits as address codes and some as data. The M145027 interprets the first five transmitted bits as address andthe last four bits as data. The M145028 treats all nine bits as address. If no errors are re- % ae ceived, the M145027 outputs the four databits when X. eu the transmitter sends address codes that match that Net of the receiver. A valid transmission output goes high on both decoders when they recognize an ad- $016 Large (0.3") dress that matches that of the decoder. Other re- (Plastic package) covers canbe producedwith differentaddress/data ORDER CODE : M145028D All the devices are available in 16 lead plastic pack- age. The M145026 is available in SO16 plastic package (narrow) and the M145028 is available in $016 plastic package (large). October 1993 13

M145026 - M145027 - M145028 PIN CONNECTIONS Encoder Decoder Decoder 0 O wor]: 7 61) veo adh 16] Veo ad 1617] Voo azz []2 15 |] pata out a(lf2 15] J ve a[f2 151) a6 ass LI 3 cs ream 6 14[7 o7 ws wpa mara] 4 a ieog pl are ae Cee a 1s ee ass [] 5 12[-] cre as{]s 12.7] 09 asC]s 12.7] 49 sos [] 6 a eiCfs nfow rifle nfw aro ]7 10 |] Asm eof] 10 |] race oC]? sof] race |g vss C8 9 [7 aso Ves [J 8 97] pata Ves F] 8 2 ona |g BLOCK DIAGRAMS Figure 1: EncoderM145026 RS RTC TE hia] {12} {13h +4 DATA SELECT 3-PIN OSCILLATOR ATA ~ @ omcatr e anpourren [#8 our RING COUNTERAND 1-of-9 DECODER ae | oe eg ; | | fT | ft pghs a7 Vss aaa [4} ISS] nos GE | PS rranarr ass [9} KS ¢ ase fol BS i 23 a] eS

M145026 - M145027 - M145028 SWITCHING CHARACTERISTICS (Ci = 50pF, Tam = 25°C) [Symbol [Parameter | Vo | Min. | Typ. | Max. | Unit | tru | Output Rise and Fall Time 100 | 200 tra 50 | 100 40 | 80 tHe — Pele] |e |e tw. | Maximum Decoder Frequency 240 (referenced to encoder clock) (see Figure 9) 410 TE Pulse Width 65 tem Propagation Delay Clock | | OE to vaid venamission) Cycles Tolerance on Timing Components zg ARTC + ACTC + AR1 + AC1 325 | % 18

ELECTRICAL CHARACTERISTICS

ome rome [Seta reload | Vou | Output Low Level Volage 0.05 0.05 0.05 | Vv (Vi = Voo or 0, 0" Level) 0.05 0.05 0.05 | v Vou Output High Level Voliage 4.95 4.95 4.95 Vv (Vi = Voo or 0, "1" Level 9.95 9.95 9.95 v 14.95 14.95 14.95 v Vi. _ | Input Low Level Voltage ("0" Level) Vo = 4.5 or 0.5V 15 2.25 v Vo = 0.9 or 1V 3 4:50 Vv Vo = 13.5 or 1.5V 4 6.25 v Vin | Input High Level Voltage ("1” Level) Vo = 0.9 or 1V 7 7 | 5.50 7 Vv Vo = 13.5 or 1.5V "1 11 | 8.25 "1 v Output Drive, Source Current fon = 2.5V 25 21] 42 17 mA Von = 9.5V 1.3 At | 2.25 09 mA Vou = 13.5V 36 3 | 88 “2.4 mA Output Drive Sink Current Vou = 0.4V 5 0.88 0.36 mA Vou = 0.5V 10 2.25 09 mA Vor = 1.5V 45 88 2.4 mA Input Current 5 7 TE (Mi145026, pull up devide) 40 26 tA 15 55 A Input Current 15 £0,00001 21.0 [ pA RS (145026) Data In (M145027 - M145028) Input Current A1/D1-A9/D9 (M145026) 455 | +80 HA A1-A5 (M145027 #300 | 2340 nA |# A1-A9 (M145028, #650 _| #725 3 Input Capacitance (Vi = 0) [os rs er 8 4n3 ES ———

M145026 - M145027 - M145028 ELECTRICAL CHARACTERISTICS (continued) ome re | fa eh [a finwwtCapactoe eG TT ts [st | [ol a ee dE (M145026) 0.0100 | 0.20 pA 0.0150 | 0.30 pA ee (M145027 - M145028) 60 100 pA 90 150 BA h } rent = 20kHz) 100 200 [ieee Tet TT | as] |B 300__| 600 A |. ty | Total Supply Current (fe. = 20kHz) 200 | 400 nA |e (M145027 - M145028) 400 | 800 HA [3 600__| 1200 pA |% OPERATING CHARACTERISTICS M145027 The decoderwill receive the serial data from the en- M145026 coder, checkit for errors and output data if valid. The The encoderwill serially transmit nine bits of trinary —_ transmitted data consisting of two identical data data as defined by the state of the A1/D1-A9/D9 in- words is examined bit by bit as it is received. The first put pins. These pins can be in either of three states _ five bits are assumed to be address bits and must (0,1, open) allowing 3° = 19683 possible codes.The —_be encoded to match the address inputs at the re- transmit sequencewill be initiated bya lowlevel of ceiver. If the address bits match, the next four (data) the TE input pin. Each timethe TE inputisforcedlow _bits are stored and compared to the last valid data the encoder will output two identical data words. stored. if this data matches, the VT pin will go high This redundant information is used by the receiver on the 2nd rising edge of the 9th bit of the first word. to reduce errors. If the TE input is kept low, the en- Between the two data words no signal is sent for coderwill continuously transmitthe datawords. The _three data bit times. As the second encoded word transmitted words are self-completing (two words _is received, the address must again match, and if it will be transmitted for each TE pulse). does, the data bits are checked against the pre- Each transmitted data bit is encoded into two data viously stored data bits. If the two words of data (four pulses. A logic zero will be encoded astwoconsecu- bits each) match, the datais transferredto the output tive short pulses, a logic one by two consecutive data latches and will remain until new data replaces long pulses, and an open as a long pulse followed it. At the same time, the Valid Transmission output bya shortpulse. The inputstate is determined by us- pin is brought high and will remain high until an error ing a weak output device to try to force each input is received or until no input signal is received for four firstlow, then high. Ifonly a high state results from data bit times. the two tests, the inputis assumed to be hardwired —_ Although the address information is encoded in tri- to Von. If only a low stateis obtained,the inputis as- nary fashion, the data information must be either a sumed to be hard wired to Vss. If both a high and a one or a zero. A trinary (open) will be decoded as a low can be forced at an input, it is assumed to be logic one. open and is encoded as such. The transmit sequenceis enabled by alogic zero on 145028 the TE input. This input has an intemal pullup device This receiver operates in the same manner as the so that a simple switch may be used to force the in- M145027 exceptthatnine address bits are used and put low. While TE is high the encoder is completely no data output is available. The Valid Transmission disabled, the oscillator is inhibited and the current outputis used toindicate thata valid signalhasbeen drain is reduced to quiescent current. When TE is _ received. brought low, the oscillator is started,and aninternal —_ Although address information normally is encoded reset is generated to initialize the transmit se- in trinary, the designer should be aware that, for the quence. Each input is then sequentially selected M145028, the ninth address bit (A9) must be either and a determination is made as to input logic state. a oneora zero. This part, therefore, can accept only This information is serially transmitted via the Data 2x 3° = 13.122 different codes. A trinary (open) A9 Out output pin. will be interpreted as a logic 1. However if the trans-

M145026 - M145027 - M145028 mitter sendsa trinary (or logic 1) and the receiverad- clock periods (four data bit periods). This time con- dress is a logic 1 (or trinary) respectively, the valid stantis used to determine that the Data In input has transmission output will be shortened to the R1 x C1 remained low for four databit times (end of transmis- time constant. sion). A separate comparator looks at a voltage equivalent two data bit times (0.4 R2C2) to detect the dead time between transmitted words. R2C2 = DOUBLE TRANSMISSION DECODING 77x RTC x CTC. Although the encoder sends two words fo error VALID TRANSMISSION, VT. This output will go checking, a decoder does not necessarily wait for high when the following conditions are satisfied: two transmitted words to be received before issuing . . a valid transmission output. Refer to the flowcharts 1, the transmitted address matches the receiver in Figures 7 and 8. address, and 2. the transmitted data matches the last valid data received (M145028 only). PIN DESCRIPTION VT will remain high until either a mismatch is re- M145026 ENCODER coves or no input signal is received for four data A1/D1-A9/D9. Theseinputswillbe encodedandthe @atabittimes. data serially output form the encoder. yoo. lig most postive Supply. fi - Vss. The most negative supply (usually ground). ss. The most negative supply (usually ground). RS, CTC, RTC. These pins are part of the oscillator. Figure 4: Encoder Oscillator Information section of the encoder. If an external signal source is used instead of the intemal oscillator it should be RS connected to the RS input and the RTC and CTC — pins should be left open. TE. This Transmit-Enable (active low) input will in- ere | RTC itiate transmission when forced low. A pullup device a fa re] will keep this input high normally. peefessecssssesceeteeseeeeeseensseeeeeenneeeeetn eseeeetunnedeceeeneenee DATA OUT. This is the output of the encoder that Hl will present the serially encoded signals. i >> |) SH Vp. The most positive supply. INTERNAL g ENABLE Fy M145027/M145028DECODERS g A1-A5 (M145027) / A1-A9 (M145028). These are " the address inputs that must match the encoder in- This oscillator will operate at a frequency deter- puts A1/D1-AS5/D5 in the case of M145027 or A1/D1- mined by the extemal RC network; i.e.. AO/D9 in the case of M145028, in order for the de- 1 coder to output data. f= 23-RTC CTC (Hz) for 1 kHz < f < 400 kHz D6-D9 (M145027). These outputswill give the infor- where: CTC = CTC + C layout + 12 pF mation that is presented to the encoder inputs RS=2RTC A6/D6-A9/D9. RS>20k Note: Only binary data will be acknowledged, a tri- RTC >10k nary open will be decoded as logic one. 400pF < CTC < pF R1, C1. These pins accept a resistor and capacitor The value for RS should be chosen to be about 2 that are used to determine whether a narrow pulse times RTC. This range will ensure that current or a wide pulse has been encoded. The time con- —_through RS is insignificant compared to current stant R1 x C1 should be set to 1.72 transmit clock through RTC. The upper limit for RS must ensure periods. R1C1 = 3.95 RTC x CTC. that RS x5 pF (input capacitance) is small compared R2/C2. This pin accepts a resistor to Vss and a ca- to RTC x CTC.For frequencies outside the indicated pacitor to Vss that are used to detect both the end range, the formula will be less accurate. The actual of an encoded word and the end of transmission. oscillation range of this circuit is from less than 1Hz The time constant R2 x C2 should be 33.5 transmit —_ to over 1MHz. SS ——_—

M145026 - M145027 - M145028 Figure 7 : M145027 Flowchart THE TRANSMISSION BEGUN? DOES DISABLE VT ONE THE 1st THE ADDRESS REST OF THIS WORD THist STA DISABLE VT ON THE ‘st MATCH orem CUS DATA MISMATCH. DATA? LATCH DATA ONTO OUTPUT PINS AND ACTIVATE VT HAVE 4-BIT TIMES DISABLE VT PASSED? NO HAS ANEW TRANSMISSION BEGUN? YES 3 g 8/13 Gz ss

M145026 - M145027 - M145028 Figure 8 : M145028 Flowchart HAS THE TRANSMISSION BEGUN? DOES SERIALLY SHIFT THE THIS 9-BIT ADDRESS ("= 1 ADDRESS ("1"#"T”) INTO THE STORAG MATCH THE REGISTER UP UNTIL ‘ADDRESS (HE EXCLUDING) THE PINS? ‘st MISMAT( STORE THE ADDRESS DOES, SHIFTIN AEE ADO THE MISMATCH oo ere'Ty INVOLVE A’0"? ANEXTRA"! DOES THIS SAME MATCH THE PREVIOUSLY, STORED. ADDRESS? DISABLE VT ACTIVATEVT HAVE 4-BIT TIMES DISABLE VT PASSED? NO HAS. ANEW. TRANSMISSION BEGUN? YES * For shift register compansous, a “Tis stored as a1" 3 913 eS

M145026 - M145027 - M145028 Figure 9 : M145027/M145028 (fmax VS. Ciayout) 600 f(max.) (KHz) ooo amecr« | TT TT TT I ‘00 se wo oe | | R=b fT wo | Tite | | OCP LT TT ITT | 0 5 10 15 20 25 30 35 40 45 50 55 60, Clayout (pF) 2 on pins 1-5 (M145027), pins 1-5 and 12-15 (M145028) ¥ Figure 10: Typical Application Yoo Te Voo Yoo Our Onur = = = {14} fig}

5 TRINARY a] i) A

ADDRESSES| Ars Esl 5 TRINARY. {na [ast ADDRESSES fed | res {s] M145026 (sy Hea me, | te . LL i+ | T [1s] 06 4 2 o7 tte] Kf as BRARY tT tH fig] ba fi] v9 fig) Gt fio) = cd fy] wr Fela Re we ABOVE g REPEAT OF = Example RIC Values (all resistors and capacitors are + 5 %) (CTC’ = CTC + 20pF) [Hosc(kHa) | rte [crc [rs [ort [oct Tra | cz 362 40k 120pF 20k 10k 470pF 100k 910pF 181 40k 240pF 20k 10k 910pF 100k 1800pF 88.7 40k 490pF. 20k 10k 2000pF 400k 3900pF 42.6 10k 1020pF 20k 10k 3900pF 100k 7500pF_ | 2 21.5 40k 2020pF 20k 10k 8200pF 100k 0.015uF |= 8.53 40k 5100pF 20k 10k 0.02uF 200k 0.02uF | 8 171 50k 5100pF 100k 50k 0.02uF 200k Or |e ee

M145026 - M145027 - M145028 PACKAGE MECHANICAL DATA

16 PINS - PLASTIC DIP

p=) VY YY YY - [—]

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M145026 - M145027 - M145028 PACKAGE MECHANICAL DATA (continued)

16 PINS - PLASTIC MICROPACKAGE (SO NARROW)

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M145026 - M145027 - M145028 PACKAGE MECHANICAL DATA (continued)

16 PINS - PLASTIC MICROPACKAGE (SO LARGE)

° } (ooo 4 : Ro , : . E o OOO oOo Of DOOoOOOOND 3 Es | Dimensions La | ie ees ota | pat To [0004 [0.008 | a | [oT 0.096 [boss ogg ora Tot [rT org ose ooo9 Pot [oc Tos oa a (7 [To ton tos ose7 oat [oe Pte oso [es eg oso [oF | va Te oan 0.300 [eee ots gas 0.360 [os a7 oa 0.050 [oom ors [0020 |f [~s Pima : Information fumnished Is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsi- bility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence Is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. © 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of FC Components of SGS-THOMSON Microelectronics, conveys a license under the Philips PC Patent. Rights to use these components in a I°C system, is granted provided that the system conforms to the I°C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A. Sr 13/13