LTM8042

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Rev. 0For more information www.analog.com TYPICAL APPLICATION FEATURES DESCRIPTION 36V, 4A Synchronous Step-Down LED Driver with Silent Switcher The LT®3935 is a monolithic, synchronous, step-down DC/DC converter that utilizes fixed-frequency, peak current control and provides PWM dimming for a string of LEDs. The LED current is programmed by an analog voltage or the duty cycle of pulses at the CTRL pin. An output volt- age limit can be set with a resistor divider to the FB pin. The switching frequency is programmable from 200 kHz to 2MHz by an external resistor at the RT pin or by an external clock at the SYNC/SPRD pin. With the optional spread spectrum frequency modulation enabled, the frequency varies from 100% to 125% to reduce EMI. Additional features include an LED current monitor, an accurate EN/UVLO pin threshold, open-drain fault report- ing for open-circuit and short-circuit load conditions, and thermal shutdown . The LT3935 utilizes proprietary Silent Switcher technology for very low EMI. 4A LED Driver with Fault Indication Efficiency vs VIN

APPLICATIONS

n ±1.5% LED Current Regulation n ±1.2% Output Voltage Regulation n Spread-Spectrum Frequency Modulation n Silent Switcher® Architecture for Low EMI n 3.6V to 36V Input Voltage Range n 0V to 36V LED String Voltage n 200kHz to 2MHz with SYNC Function n 20:1 Analog or Duty Cycle LED Current Control n Open/Short LED Fault Indication n Accurate LED Current Sense with Monitor Output n Programmable UVLO n Thermally Enhanced 28-Lead (5mm × 4mm) LQFN n Automotive Lighting n Industrial and General Purpose Lighting All registered trademarks and trademarks are the property of their respective owners. Protected by U.S. Patents including 7199560, 7321203, 9596728, 9642200 and other patents pending. Document Feedback 30.1k 274k 45.3k 110k 10k 25m/uni03A9 100nF 2.2µF 2.2µF 100nF 0.1µF 2.2µH 100k 30µF 10nF V IN EN/UVLO V REF CTRL PWM SYNC/SPRD INTV C C SS RT RP V C ISP ISN FB V OUT BST L T3935 V IN 12V 2MHz ISMON FAUL T ISMON GND SW 10µF

3935 TA01a

V IN VOL TAGE (V) 100 EFFICIENCY (%)

3935 TA01b

Rev. 0 For more information www.analog.com PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS 0.3V to 3.3V 0.3V to 6V SW, BST, INTVCC, VREF, ISMON, RT, te 2) Operating Junction Temperature Range (Notes 3, 4) 65°C to 150°C 0°C (Note 1) 9 10 TOP VIEW LQFN PACKAGE 28-LEAD (5mm × 4mm × 0.94mm) θJA = 27°C/W (MEASURED ON DC2987A) EXPOSED PAD (PIN 29) IS GND, MUST BE SOLDERED TO PCB 11 12 13 28 27 26 25 GND 1VREF SS VC FB ISP ISN ISMON FAUL T VIN NC GND SW SW GND NC V IN CTRL EN/UVLO NC INTV CC NC BST RP RT SYNC/SPRD PWM NC V OUT 8 15 ORDER INFORMATION PART NUMBER PART MARKING FINISH CODE PAD FINISH PACKAGE TYPE* MSL RATING TEMPERATURE RANGE LT3935RV#PBF 3935V e4 Au(RoHS) LQFN (Laminate Package with QFN Footprint) 3 –40°C to 150°C

Contact the factory for parts specified with wider operating temperature ranges.
Pad finish code is per IPC/JEDEC J-STD-609.
Parts ending with PBF are RoHS and WEEE compliant.
Recommended LGA and BGA PCB Assembly and Manufacturing Procedures
LGA and BGA Package and Tray Drawings The LT3935 package has the same footprint as a standard 4mm × 5mm QFN package

Rev. 0For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VEN/UVLO = 5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS Input Voltage Range 3.6 36 V VIN Pin Quiescent Current EN/UVLO = 2V, Not Switching EN/UVLO = 300mV, Shutdown l 2.7 3.3 mA µA EN/UVLO Threshold (Falling) 1.09 1.16 1.23 V EN/UVLO Rising Hysteresis 20 mV EN/UVLO Pin Hysteresis Current 4 µA Reference VREF Voltage IVREF = 0µA IVREF = 500µA l 1.975 1.980 1.998 2.020 2.016 V V V REF Pin Current Limit VREF = 1.9V, Current Out of Pin 2 mA LED Current Regulation CTRL-Off Threshold (Falling) l 200 218 233 mV CTRL-Off Rising Hysteresis 20 mV CTRL Pin Current VCTRL = 2V −100 100 nA Sense Voltage (VISP−VISN) (Analog Input) VCTRL = 2V (100%), VIN = 36V, VISP = 24V VCTRL = 750mV (50%), VIN = 36V, VISP = 24V VCTRL = 300mV (5%), VIN = 36V, VISP = 24V l l l 98.5 48.5 100 101.5 51.5 mV mV mV ISP Pin Current V IN = 36V, VISP = 24V, VCTRL = 2V, Current Into Pin 50 µA ISN Pin Current VIN = 36V, VISN = 24V, VCTRL = 2V, Current Into Pin 50 µA ISP/ISN Common Mode Range VIN = 36V (Note 5) 0 36 V Current Error Amplifier T ransconductance V IN = 36V, VISP = 24V 200 µA/V Duty Cycle Control of LED Current Sense Voltage (VISP−VISN) (Duty Cycle Input) CTRL Duty = 75% (100%), VIN = 12V, VISP = 10V CTRL Duty = 37.5% (50%), VIN = 12V, VISP = 10V CTRL Duty = 15% (5%), VIN = 12V, VISP = 10V 100 101 mV mV mV CTRL Pulse Input High (V IH) 1.6 V CTRL Pulse Input Low (VIL) 0.4 V CTRL Pulse Input Frequency Range 100 1000 kHz Voltage Regulation FB Regulation Voltage VISP = VISN = 6V, VCTRL = 2V l 0.988 1.000 1.012 V FB Pin Current VFB = 1V −100 100 nA Voltage Error Amplifier T ransconductance 480 µA/V Power Stage Peak Current Limit 5.6 6.8 7.9 A Minimum Off-Time (Note 6) 55 ns Minimum On-Time (Note 6) 55 ns Bottom Switch On-Resistance 40 mΩ Top Switch On-Resistance 40 mΩ Oscillator Programmed Switching Frequency (f SW) R T = 45.3k, VSYNC/SPRD = 0V RT = 523k, VSYNC/SPRD = 0V l l 1890 180 2000 200 2150 230 kHz kHz Spread Spectrum Frequency Range RT = 45.3k, VSYNC/SPRD = 3.3V RT = 523k, VSYNC/SPRD = 3.3V 1890 180 2700 290 kHz kHz

Rev. 0 For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, VEN/UVLO = 5V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS RT Pin Current Limit VRT = 0V, Current Out of Pin 34 µA SYNC/SPRD Threshold 1 2 V SYNC/SPRD Pin Current VSYNC/SPRD = 3.3V −100 100 nA Soft-Start SS Pin Charging Current VSS = 0V 20 µA SS Pin Discharging Current VSS = 2V 1.25 µA SS Lower Threshold (Falling) 200 mV SS Higher Threshold (Rising) 1.7 V Fault Detection Open-Circuit Threshold (FB Rising) l 930 950 975 mV Open-Circuit Falling Hysteresis 55 mV Short-Circuit Threshold (FB Falling) l 180 200 220 mV Short-Circuit Rising Hysteresis 50 mV FAUL T Pull-Down Current VFAUL T = 200mV, VFB = 0V 100 µA FAUL T Leakage Current VFAUL T = 3.3V, VFB = 700mV −100 100 nA Overvoltage Protection FB Overvoltage Threshold (FB Rising) 1.050 V FB Overvoltage Falling Hysteresis 48 mV LED Current Monitor ISMON Voltage V ISP − VISN = 100mV (100%), VISP = 12V VISP − VISN = 10mV (10%), VISP = 12V 0.950 1.000 100 1.030 120 V mV PWM Driver P WM Threshold (Rising) VOUT = 12V 1.7 V PWM Pin Current VPWM = 2V −100 100 nA RP Pin Current Limit RP = 0V, Current Out of Pin 60 µA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Do not apply a positive or negative voltage source to these pins, otherwise permanent damage may occur. Note 3: Specifications over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The The LT3935R is guaranteed over the −40°C to 150°C operating junction temperature range. Operating lifetime is derated for junction temperatures greater than 125°C. Note 4: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Continuous operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 5: The current sense error amplifier is tested with V ISP = 36V, and separately, with VISN = 0V. Note 6: The MIN on and off times are guaranteed by design and are not tested.

Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS EN/UVLO Threshold EN/UVLO Pin Current VIN UVLO Threshold VIN Shutdown Current VIN Quiescent Current INTVCC Voltage INTVCC Load Regulation VREF Voltage VREF Load Regulation V REF CURRENT (mA) 0.5 1.5 2.5 1.97 1.98 1.99 2.00 2.01 2.02 V REF VOL TAGE (V) V REF Load Regulation

3935 G09

TEMPERATURE (°C) –50 –25 100 125 150 3.0 3.1 3.2 3.3 3.4 3.5 3.6 INTV CC VOL TAGE (V) INTV CC Voltage

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TEMPERATURE (°C) –50 –25 100 125 150 2.6 2.8 3.0 3.2 3.4 3.6 V IN VOL TAGE (V) V IN UVLO Threshold

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TEMPERATURE (°C) –50 –25 100 125 150 1.97 1.98 1.99 2.00 2.01 2.02 V REF VOL TAGE (V) V REF Voltage

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V EN/UVLO = 2V TEMPERATURE (°C) –50 –25 100 125 150 1.5 2.0 2.5 3.0 3.5 V IN QUIESCENT CURRENT (mA) V IN Quiescent Current

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TEMPERATURE (°C) –50 –25 100 125 150 3.0 3.5 4.0 4.5 5.0 EN/UVLO CURRENT (µA) EN/UVLO Pin Current

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CURRENT (mA) 3.05 3.15 3.25 3.35 3.45 INTV CC VOL TAGE (V) INTV CC Load Regulation

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V EN/UVLO = 0.3V TEMPERATURE (°C) –50 –25 100 125 150 V IN SHUTDOWN CURRENT (µA)

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TEMPERATURE (°C) –50 –25 100 125 150 1.00 1.05 1.10 1.15 1.20 1.25 1.30 EN/UVLO VOL TAGE (V) EN/UVLO Threshold

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Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS VREF Line Regulation INTVCC and VREF UVLO Falling Threshold SW Frequency RP and RT Pin Current Limit SS Pin Pull-Up Current SS Threshold Peak SW Current Limit Peak Current vs Temperature Power Switch On-Resistance 150°C 30°C –45°C V IN VOL TAGE (V) 1.97 1.98 1.99 2.00 2.01 2.02 2.03 V REF VOL TAGE (V) V REF Line Regulation

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V REF TEMPERATURE (°C) –50 –25 100 125 150 1.2 1.5 1.8 2.1 2.4 2.7 3.0 3.3 VOL TAGE (V) Threshold INTV CC and V REF UVLO Falling

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R T = 45.3k R T = 532k TEMPERATURE (°C) –50 –25 100 125 150 1400 1600 1800 2000 2200 180 200 220 240 260 SW FREQUENCY (kHz) SW Frequency

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TEMPERATURE (°C) –50 –25 100 125 150 CURRENT (µA) RP and RT Pin Current Limit

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TEMPERATURE (°C) –50 –25 100 125 150 SS CURRENT (µA) SS Pin Pull–Up Current

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TEMPERATURE (°C) –50 –25 100 125 150 0.4 0.8 1.2 1.6 2.0 SS VOL TAGE (V) SS Threshold

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DUTY RATIO (%) 5.0 5.5 6.0 6.5 7.0 7.5 8.0 PEAK SW CURRENT (A) Peak SW Current Limit

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TEMPERATURE (°C) –50 –25 100 125 150 5.0 5.5 6.0 6.5 7.0 7.5 8.0 SW CURRENT (A) Peak Current vs Temperature

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TEMPERATURE (°C) –50 –25 100 125 150 100 RESISTANCE (mOhm) Power Switch On-Resistance

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Rev. 0For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS LED Current (Analog CTRL) LED Current (Digital CTRL) LED Voltage Limit LED Current (100% Regulation) LED Current (5% Regulation) ISMON Voltage C/10 Threshold LED Current vs VIN LED Current vs VOUT CTRL VOL TAGE (V) 0.25 0.50 0.75 1.25 1.50 1.75 –10 100 110 V ISP – V ISN (mV) LED Current (Analog CTRL)

3935 G19

CTRL DUTY RATIO (%) 12.5 37.5 62.5 87.5 100 –10 100 110 V ISP - V ISN (mV) LED Current (Digital CTRL)

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V CTRL = 2V FB VOL TAGE (V) 0.97 0.98 0.99 1.01 1.02 100 125 V ISP – V ISN (mV) LED Voltage Limit

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V CTRL = 1.5V

200 UNITS

150°C 25°C –40°C V ISP – V ISN (mV) 98.8 99.2 99.6 100.0 100.4 100.8 101.2 120 160 200 NUMBER OF UNITS LED Current (100% Regulation)

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V CTRL = 300mV 150°C 25°C –40°C V ISP - V ISN (mV) 4.8 4.9 5.0 5.1 5.2 5.3 120 160 200 NUMBER OF UNITS LED Current (5% Regulation)

3935 G23

V ISP – V ISN (mV) 100 150 200 250 300 0.5 1.0 1.5 2.0 ISMON VOL TAGE (V) ISMON Voltage

3935 G24

TEMPERATURE (°C) –50 –25 100 125 150 V ISP - V ISN (mV) C/10 Threshold

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2 LEDs (APPROX.8V) 2MHz SW FREQUENCY V CTRL = 735mV VIN LOWER THAN VOUT V IN VOL TAGE (V) 48.0 48.4 48.8 49.2 49.6 50.0 V ISP – V ISN (mV) LED Current vs V IN

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V IN = 36V V CTRL = 750mV 2MHz SW FREQUENCY V OUT VOL TAGE (V) 48.0 49.0 50.0 51.0 52.0 V ISP – V ISN (mV)

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Rev. 0 For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS FB OPENLED Threshold FB SHORTLED Threshold FB OVLO Threshold Efficiency vs VIN Efficiency vs ILED Regulated FB Voltage Input Voltage T ransient Response Input Voltage T ransient Respsonse Turn-On and Turn-Off RISING FALLING TEMPERATURE (°C) –50 –25 100 125 150 0.80 0.85 0.90 0.95 1.00 1.05 1.10 FB VOL TAGE (V) FB OPENLED Threshold

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TEMPERATURE (°C) –50 –25 100 125 150 100 150 200 250 300 350 400 FB VOL TAGE (V) FB SHORTLED Threshold

3935 G29

TEMPERATURE (°C) –50 –25 100 125 150 0.90 0.95 1.00 1.05 1.10 FB VOL TAGE (V) FB OVLO Threshold

3935 G30

2LEDs (APPROX.7V , 2A) 400kHz 2MHz V IN VOL TAGE (V) 100 EFFICIENCY (%) Efﬁciency vs V IN

3935 G31

V IN = 12V 2MHz SW FREQUENCY 2 LEDs (APPROX. 8V) 1 LED (APPROX. 5V) I LED (mA) 800 1600 2400 3200 4000 100 EFFICIENCY (%) Efﬁciency vs I LED

3935 G32

V CTRL = 2V V ISP ISN =0V TEMPERATURE (°C) –50 –25 100 125 150 0.97 0.98 0.99 1.00 1.01 1.02 FB VOL TAGE (V) Regulated FB Voltage

3935 G33

Input Voltage T ransient Response FRONT PAGE APPLICATION 15V TO 25V INPUT VOL TAGE STEP 3 LEDs (APPROX. 9V) I LED = 4A 5ms/DIV V IN 10V/DIV I LED 200mA/DIV

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Input Voltage T ransient Response FRONT PAGE APPLICATION 25V TO 15V INPUT VOL TAGE STEP 3 LEDs (APPROX. 9V) I LED = 4A 5ms/DIV V IN 10V/DIV I LED 200mA/DIV

3935 G35

Turn–On and Turn–Off FRONT PAGE APPLICATION 3 LEDs (APPROX. 9V) 50ms/DIV V IN 20V/DIV V OUT 5V/DIV I LED 2A/DIV

3935 G36

Rev. 0For more information www.analog.com PIN FUNCTIONS VIN: Input Voltage Pins. These pins supply power to the internal, high performance analog circuitry, and they supply the inductor current when the internal high side power switch is on. Connect capacitors between these pins and GND and see Selecting and Placing the Input Capacitors in Applications Information for advice regarding their placement. EN/UVLO: Enable and Undervoltage Lockout Pin. A voltage at this pin greater than 1.16V will enable switching, and a voltage less than 300mV is guaranteed to shut down the internal current bias and sub-regulators. A resistor network between this pin and GND can be used to set the pin voltage and automatically lockout the part when V IN is below a certain level. No internal components pull up or down on this pin, so it requires an external voltage bias for normal operation. This pin may be tied directly to V IN. INTVCC: Internally Regulated, Low-Voltage Supply Pin. This pin provides the power for the converter switch gate drivers. Do not force any voltage on this pin, but bypass it with a 2.2µF capacitor to GND. ISP: Positive Current Sense Pin. This pin is one of the inputs to the internal current sense error amplifier. It should be connected to the positive side of the external sense resistor. ISN: Negative Current Sense Pin. This pin is one of the inputs to the internal current sense error amplifier. It should be connected to the negative side of the external sense resistor. ISMON: Output Current Monitoring Pin. This pin provides a buffered voltage output equal to 10mV for every 1mV between ISP and ISN. CTRL: Control Pin. An analog voltage from 250mV to 1.25V at this pin programs the regulated voltage between ISP and ISN (and therefore, the regulated current supplied to the load). Alternatively, a digital pulse at this pin with duty cycle from 12.5% to 62.5% can be used to program the regulated voltage. Below 200mV or 10% duty cycle, the CTRL pin voltage disables switching. For more detail, see Regulated LED Current in Typical Performance Curves and Programming LED Current with the CTRL Pin in Ap- plications Information. V REF: Reference Voltage Pin. This pin provides a buffered 2V reference capable of 2mA drive. It can be used to sup- ply resistor networks for setting the voltages at the CTRL and PWM pins. Bypass with a 2.2μF capacitor to GND. FB: Feedback Pin. When the voltage at this pin is near 1V, the regulated current is automatically reduced from the programmed value. A resistor network between this pin and V OUT can be used to set a limit for the output voltage. If the voltage at the FB pin reaches 1.05V, an overvoltage lockout comparator disables switching. FAUL T: Fault Pin. Connect to INTV CC through a resistance of 100k. When the FB pin voltage is less than 200mV, an internal switch pulls this pin low to indicate a short-circuit. When FB is greater than 950mV and the voltage between ISP and ISN is simultaneously less than 10mV, the switch pulls this pin low to indicate an open-circuit. SS: Soft-Start Pin. At startup and recovery from fault conditions, a 20μA current charges the capacitor and the FB voltage tracks the rising voltage at this pin until the load current reaches its programmed level. Typical values for the capacitor are 10nF to 100nF. A resistor from SS to INTV CC is used to select one of several fault modes. See Soft-Start and Fault Modes in Applications Information for more details. V C: Compensation Pin. A capacitor connected from this pin to GND stabilizes the current and voltage regulation. See Stabilizing the Regulation Loop in the Applications Information section for more details. SW: Switch Pins. These two pins are internally connected to the power devices and drivers. They should always be tied together. In normal operation, the voltage of these pins will switch between the input voltage and zero at the programmed frequency. Do not force any voltage on these pins. RT: Timing Resistor Pin. A resistor from this pin to GND programs the switching frequency between 200kHz and 2MHz. Do not leave this pin open.

Rev. 0 For more information www.analog.com PIN FUNCTIONS SYNC/SPRD: Synchronization Pin. To override the pro - grammed switching frequency, drive this pin with an external clock having a frequency between 200 kHz and 2MHz. Even when using the external clock, select an R T resistor that corresponds to the desired switching fre - quency. Tie the pin to INTVCC to enable spread spectrum frequency modulation. This pin should be tied to GND when not in use. BST: Boost Pin. This pin supplies the high side power switch driver. Connect a 100nF capacitor between this pin and SW. An internal charge pump from INTV CC to BST will charge the capacitor when the SW pin is low. PWM: PWM Input Pin. With the RP pin tied to GND, tie this pin to V REF or INTV CC pin when PWM dimming is not required. RP: PWM Resistor Pin. Tie this pin to GND. V OUT: Tie this pin to the output voltage even if dimming is not required. GND: Ground Pins. These must be soldered to the ground plane of the circuit board. NC: No Connection Pins.

Rev. 0For more information www.analog.com BLOCK DIAGRAM 25 23 15 +–+ INTERNAL VCC REGULATOR AND UVLO 2V REFERENCE SYNCHRONOUS CONTROLLER S R Q EN/UVLO VIN CIN CVCC REN1 RT REN2 CREF INTVCC BST BOTTOM SWITCH DRIVER TOP SWITCH DRIVER 50m/uni03A9 4.7µF 8.2µH VIN VIN SW VREF SYNC/SPRD CTRL N/C –++ 200kHz TO 2MHz OSCILLATOR VOUT CIN ISN 3935 BD ISP FB – + RT SS VC CSS CC RSS RP 200mV 950mV 1.4V 1.0V 20µA GND 1.25µA 3k3k FAUL T LOGICFAUL T COMPARATORS FAUL T LOGIC CURRENT REGULATION AMPLIFIER g m = 200µS VOL TAGE REGULATION AMPLIFIER gm = 480µS PEAK CURRENT COMPARATOR 1.25V 250mV PWM ISMON 10x FAUL T INTVCC INTVCC RFB1 RFAUL T RFB2 CONTROL BUFFER 30k A/D DETECTOR INTVCC 100/uni03BCF 100nF N/C N/C N/C

Rev. 0 For more information www.analog.com OPERATION The LT3935 is a step-down LED driver that utilizes fixed- frequency, peak-current control to accurately regulate the current through a string of LEDs. It includes two power switches, their drivers, and a charge pump for providing power to the top switch driver. The switches connect an external inductor at the SW pin alternately to the input supply and then to ground. The inductor current rises and falls accordingly and the peak current can be regulated by adjusting the duty ratio of the power switches through the combined effect of the other circuit blocks. The synchronous controller ensures the power switches do not conduct at the same time, and a programmable oscillator turns on the top switch at the beginning of each switching cycle. The frequency of this oscillator is set by an external resistor at the RT pin and can be overridden by external pulses at the SYNC/SPRD pin. The SYNC/ SPRD pin can also be used to command spread spectrum frequency modulation (SSFM), which reduces radiated and conducted electromagnetic interference (EMI). The top switch is turned off by the peak current comparator which waits during the on-time for the increasing inductor current to exceed the target set by the voltage at the V C pin. This target is modified by a signal from the oscillator which stabilizes the inductor current. A capacitor at the V C pin is necessary to stabilize this regulation loop. The target for the inductor current is derived from the desired LED current programmed by the voltage at the CTRL pin. The analog-to-digital detector and the control buffer convert either a DC voltage or digital pulses at the CTRL pin into the input for the current regulation ampli - fier. The other input to this amplifier comes from the ISP and ISN pin voltages. An external current sense resistor between these pins should be placed in series with the string of LEDs such that the voltage across it provides the feedback to regulate the LED current. The current regula- tion amplifier then compares the actual LED current to the programmed LED current and adjusts V C as necessary. The voltage regulation amplifier overrides the current regulation amplifier, when the FB pin voltage approaches an internal 1V reference. An external resistor network from the LED string to the FB pin provides an indication of the LED string voltage and allows the voltage amplifier to prevent overvoltage of the LED string. The FB voltage is also monitored to detect fault conditions like open and short-circuits, which are then reported by pulling the FAUL T pin low. The response to a fault can be selected either to try hiccup restarts or to latch-off by the choice of an external resistor connected to the SS pin. Refer to Applications Information for a detailed explana- tion of fault responses.

vary with the duty ratio of the pulse as shown in Figure 2. Figure 1. Analog CTRL Range Figure 2. Duty Ratio CTRL Range Figure 3. Setting CTRL with NTC Resistors appropriate external components. the LED string when a 25mΩ current sense resistor is used.

3935 F01

3935 F03

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Figure 4. Typical Average Conducted Emissions increase switching power losses and radiated EMI. Table 1. RT Resistance Range should correspond to the frequency of the external clock. T resistor to set the frequency. SSFM is required, connect SYNC/SPRD to GND. various standard industrial tests related to interference. switching period regardless of the state of the CTRL pin. inductor current reaches equilibrium as shown in Figure 5.

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tion even at the highest switching frequency.

VIN(MAX) – VOUT 1V •1MHz fSW However, for high output voltages even the above equation would suggest an inductance value that is too small. For stability, the LT3935 requires an inductance greater than: L = 1 µH 3 •VOUT 1V •1MHz fSW Choose the larger of the values given by these equations. The manufacturers featured in Table 2 are recommended sources of inductors.

Table 2. Inductor Manufacturers

1MHz fSW However, applications may still be stable with more or less capacitance, and more capacitance may improve LED current waveforms. Use X7R or X5R ceramic capacitors as they retain their capacitance better than other capacitor types over a wide voltage and temperature range. Sources of quality ceramic and electrolytic capacitors are listed in Table 3.

Table 3. Capacitor Manufacturers Figure 5. Extended Off-Time at Current Limit

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Figure 7. ISMON Filter Configuration

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Figure 6. Placement of Input Capacitors 22) and their adjacent GND pins as shown in Figure 6. These two capacitors should be at least 0.1μF if possible. second layer of the circuit board. the 1MΩ resistor would limit the ripple on ISMON to 1%. the output voltage and the FB pin as shown in Figure 8.

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determines the maximum output voltage. Figure 8. FB Resistor Configuration

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It is possible that the FB voltage can exceed the 1V limit. and resume only when FB decreases to 1V. LEDs are conducting a large current. Figure 9. This configuration allows multiple FAUL T pins shown in Figure 10, will generate a linear ramp voltage. the commanded current level. process will repeat as shown in Figure 11. Figure 9. FAUL T Resistor Configuration

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Figure 10. SS Capacitor and Resistor Configuration

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Figure 11. Hiccup Response to Fault

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Figure 12. Latch-Off Response to a Fault

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and the hiccup behavior would therefore be very disruptive. the event of open-circuits and short-circuits. vestigated manually before resuming normal operation. esis, use 226k and 29.4k for REN2 and REN1, respectively. Figure 13. EN/UVLO Resistor Configuration

3935 F13

Rev. 0For more information www.analog.com APPLICATIONS INFORMATION Planning for Thermal Shutdown The LT3935 automatically stops switching when the internal temperature is too high. The temperature limit is guaranteed to be higher than the operational temperature of the part. During thermal shutdown, all switching is terminated, SS is forced low, and the LEDs are off. The exposed pad on the bottom of the package must be soldered to a ground plane. Vias placed directly under the package are necessary to dissipate heat. Following these guidelines, the official four-layer demo board DC2987A reduces the thermal resistance, θ JA to 27°C/W. With a compromised board design, θJA could be 40°C/W or higher. Designing the Printed Circuit Board Note that large switched currents flow through the local input capacitors and the V IN and GND pins. The loops traveled by these currents should be made as small as possible by keeping the capacitors as close as possible to these pins. These capacitors, as well as the inductor, should be placed on the same side of the board as the LT3935 and connected on the same layer. Other large, bulk input capacitors can be safely placed farther from the chip and on the other side of the board. Create a Kelvin ground network by keeping the ground connection for all of the other components separate. It should only join the ground for the input and output capacitors and the return path for the LED current at the exposed pad. There are a few other aspects of the board design that improve performance. An unbroken ground plane on the second layer dissipates heat, but also reduces noise. Likewise minimizing the area of the SW and BST nodes reduces noise. The traces for FB and V C should be kept short to lessen the susceptibility to noise of these high impedance nodes. Matched kelvin connections from the external current sense resistor R S to the ISP and ISN pins are essential for current regulation accuracy. The 2.2μF INTV CC and V REF capacitors as well as the 100nF BST capacitor should be placed as closely as possible to their respective pins. A capacitor for the CTRL pin should be placed near the pin for analog dimming. The PWM pin can be tied to V REF or INTVCC. Please refer to the demo board layout of the LT3935 for an example of how to implement these recommendations.

Rev. 0 For more information www.analog.com TYPICAL APPLICATIONS V IN EN/UVLO V REF CTRL PWM SYNC/SPRD INTV CC SS RT RP V C ISP ISN FB V OUT BST L T3935 V BAT 9V TO 18V ISMON FAUL T GND SW 0.1µF L1: WURTH 74438357010 FB1, FB2 : MURATA BLM21PG121SH1D 1µF 10µF FB1 10µF FB2 1µF 121k 10k 10µF 100k 34k 2.2µF 169k 34k 100k 2.2µF 150pF 10k 1nF 45.3k 2MHz 0.1µF 25m/uni03A9

3935 TA02

DC2987A–2 DEMO BOARD 12V INPUT TO 6.7V OUTPUT AT 1.5A, f SW = 2MHz CLASS 5 PEAK LIMIT MEASURED EMISSION AMBIENT NOISE FREQUENCY (Hz) 100k 10M 100M 200M –20 –10 AMPLITUDE (dBµV)

3935 TA02a

DC2987A–2 DEMO BOARD 12V INPUT TO 6.7V OUTPUT AT 1.5A, f SW = 2MHz CLASS 5 PEAK LIMIT MEASURED EMISSION AMBIENT NOISE FREQUENCY (Hz) 100k 10M 100M –20 –10 AMPLITUDE (dBµV/m)

3935 TA02b

DC2987A – 2 DEMO BOARD 12V INPUT TO 6.7V OUTPUT AT 1.5A, f SW = 2MHz CLASS 5 AVERAGE LIMIT MEASURED EMISSION AMBIENT NOISE FREQUENCY (Hz) 100k 10M 100M 200M –20 –10 AMPLITUDE (dBµV)

3935 TA02c

DC2987A–2 DEMO BOARD 12V INPUT TO 6.7V OUTPUT AT 1.5A, f SW = 2MHz CLASS 5 AVERAGE LIMIT MEASURED EMISSION AMBIENT NOISE FREQUENCY (Hz) 100k 10M 100M –20 –10 AMPLITUDE (dBµV/m)

3935 TA02d

4A LED Driver with Analog CTRL Current Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. CISPR25 Peak Conducted EMI Performance CISPR25 Average Conducted EMI Performance CISPR25 Peak Radiated EMI Performance CISPR25 Average Radiated EMI Performance

Rev. 0For more information www.analog.com PACKAGE DESCRIPTION 28-Lead (4mm × 5mm × 0.95mm) (Reference L TC DWG # 05-08-7050 Rev Ø) DETAIL B A PACKAGE TOP VIEW PIN 1 CORNER Y X aaa Z2× PACKAGE BOTTOM VIEW

6 SEE NOTES

E D b0.375 0.375 e e b 0.30 3.22 2.60 LQFN 28 0620 REV Ø TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN 1 DETAIL B SUBSTRATE MOLD CAP // bbb Z Z DETAIL A DETAIL C SUGGESTED PCB LAYOUT TOP VIEW 0.0000 0.0000 0.2500 0.2500 0.7500 0.7500 1.2500 1.2500 1.7500 1.7500 1.2500 0.7500 0.2500 0.2500 1.2500 0.7500 PIN 1 NOTCH 0.20 × 45° 23 28 14 9 aaa Z 2× M X Y Z ccc MXY Z ccc 0.25 0.44 3.22 2.60

0.25 REF

0.70 REF

5.50 ±0.05 4.50 ±0.05 ddd Z 28× 28b e SYMBOL A L b D E e aaa bbb ccc ddd eee fff MIN 0.85 0.30 0.22 NOM 0.95 0.40 0.25 4.00 5.00 2.60 3.22 0.50 1.05 0.03 0.50 0.28 0.10 0.10 0.10 0.10 0.15 0.08 NOTES SUBSTRATE THK MOLD CAP HT DIMENSIONS Z DETAIL C DETAIL A NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS 3. PRIMARY DATUM -Z- IS SEATING PLANE METAL FEATURES UNDER THE SOLDER MASK OPENING NOT SHOWN SO AS NOT TO OBSCURE THESE TERMINALS AND HEAT FEATURES DETAILS OF PIN 1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN 1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE

6 THE EXPOSED HEAT FEATURE MAY HAVE OPTIONAL CORNER RADII

7 CORNER SUPPORT PAD CHAMFER IS OPTIONAL

0.375 0.375 0.49

Rev. 0 For more information www.analog.com www.analog.com  ANALOG DEVICES, INC. 2021 RELATED PARTS PART NUMBER DESCRIPTION COMMENTS LT3932/ LT3932-1 36V, 2A, 2MHz, Step-Down LED Driver V IN: 3.6V to 36V, VOUT(MAX) = 36V, 5000:1 T rue Color PWM Dimming, 4mm × 5mm QFN LT3934S 36V, 4A, 2MHz, Step-Down LED Driver V IN: 3.6V to 36V, VOUT(MAX) = 36V, 5000:1 T rue Color PWM Dimming, 4mm × 5mm QFN LT8376 60V, 2A, 2MHz, Step-Down LED Driver V IN: 3.6V to 60V, VOUT(MAX) = 60V, 5000:1 T rue Color PWM Dimming, 4mm × 5mm QFN LT3922/ LT3922-1 40V, 2.3A, MHz, Synchronous Boost LED Driver V IN: 2.8V to 36V, VOUT(MAX) = 40V, 5000:1 T rue Color PWM™ Dimming, 4mm × 5mm QFN LT3965 8-Switch Matrix LED Dimmer VIN: 8V to 60V, Digital Programmable 256:1 PWM Dimming, I2C Multidrop Serial Interface TSSOP-28E Package LT3956 80V, 3.3A 1MHz, Step-Up/Down LED Driver V IN: 4.5V to 80V, VOUT(MAX) = 80V, 3000:1 T rue Color PWM Dimming, 5mm × 6mm QFN LT3477 42V, 3A, 3.5MHz, Step-Up/Down LED Driver V IN: 2.5V to 25V, VOUT(MAX) = 40V, 4mm × 4mm QFN and TSSOP-20E LT3478 42V, 4.5A, 2.5MHz, Step-Up/Down LED Driver V IN: 2.5V to 26V, VOUT(MAX) = 42V, 3000:1 T rue Color PWM Dimming, TSSOP-16E LTM8040 36V, 1A, μModule, Step-Down LED Driver V IN: 4V to 36V, VOUT(MAX) = 13V, 250:1 T rue Color PWM Dimming, 9mm × 15mm × 4.32mm LGA LTM8042 36V, 1A, μModule, Step-Up/Down LED Driver VIN: 3V to 30V, VOUT(MAX) = 36V, 3000:1 T rue Color PWM Dimming, 9mm × 15mm × 2.82mm LGA LT3757 40V, 1MHz, Step-Up Controller VIN: 2.9V to 40V, Positive and Negative Output Voltages, 3mm × 3mm DFN and MSOP-10E 34k 232k 45.3k 80.6k 10k R S 68m/uni03A9 100nF 2.2µF 2.2µF 1nF 0.1µF 2.2µH 47.5k 100k 10µF 100pF V IN EN/UVLO V REF CTRL PWM SYNC/SPRD INTV C C SS RT RP V C ISP ISN FB V OUT BST L T3935 V IN 9V TO 36V 2MHz ISMON FAUL T ISMON GND SW 22µF L1: WURTH 78438336022

3935 TA03

1.5A LED Driver with Fault Indication TYPICAL APPLICATION

Summary

36V, 4A Synchronous Step-Down LED Driver with Silent Switcher

Description