LTM8003

LTM8003 (Rev. E)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 30

Technical content

Rev EFor more information www.analog.comDocument Feedback TYPICAL APPLICATION FEATURES DESCRIPTION 40VIN, 3.5A Step-Down Silent Switcher µModule Regulator The LT M®8003 is a 40V IN, 6A peak, 3.5A continuous step-down Silent Switcher µModule ® (power module) regulator . The Silent Switcher architecture minimizes EMI while delivering high efficiency at frequencies up to 3MHz. Included in the package are the switching controller , power switches, inductor , and all support components. Operating over an input voltage range of 3.4V to 40V, the LTM8003 supports an output voltage range of 0.97V to 18V and a switching frequency range of 200kHz to 3MHz, each set by a single resistor . Only the input and output filter capacitors are needed to finish the design. The low profile package enables utilization of unused space on the bottom of PC boards for high density point of load regulation. The LTM8003 is packaged in a thermally enhanced, compact over-molded ball grid array (BGA) pack- age suitable for automated assembly by standard surface mount equipment. The LTM8003 is RoHS compliant. All registered trademarks and trademarks are the property of their respective owners. Efficiency, VOUT = 5V 5VOUT from 7VIN to 40VIN Step-Down Converter n Complete Step-Down Switch Mode Power Supply n Low Noise Silent Switcher® Architecture n Wide Input Voltage Range: 3.4V to 40V n Wide Output Voltage Range: 0.97V to 18V n Wide Temperature Range: –40°C to 150°C (H-Grade) n 3.5A Continuous Output Current, 6A peak n FMEA Compliant Pinout (LTM8003-3.3) Output Stays at or Below Regulation Voltage During Adjacent Pin Short or if a Pin Is Left Floating n CISPR25 Class 5 Compliant n Selectable Switching Frequency: 200kHz to 3MHz n External Synchronization n Low Quiescent Current: 25µA (5VOUT) n Tiny, Low Profile 6.25mm × 9mm × 3.32mm RoHS Compliant BGA Package

APPLICATIONS

n Automotive Battery Regulation n Power for Portable Products n Distributed Supply Regulation n Industrial Supplies n Wall T ransformer Regulation 4.7µF 47µF24.3k41.2k 1MHz L TM8003 VOUT BIAS VOUT 3.5A 6A PEAK V INVIN 7V TO 40V FBGND RUN SYNC RT

8003 TA01a

PINS NOT USED IN THIS CIRCUIT : TR/SS, PG LOAD CURRENT (A) EFFICIENCY (%)

8003 TA01

Rev E For more information www.analog.com PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) F G H E A B C D 2 1 4 3 5 6 BGA PACKAGE 48-LEAD (9mm × 6.25mm × 3.32mm) BGA PACKAGE TJMAX = 150°C, θJA = 24.7°C/W , θJCbottom = 4.5°C/W θJCtop = 22.3°C/W , θJB = 4.2°C/W , WEIGHT = 0.5g θ VALUES DETERMINED PER JEDEC51-9, 51-12 TOP VIEW ADJUSTABLE VERSION SYNC GND GND RUN NC GNDBANK 1 BIAS FB VOUT BANK2 VIN BANK 3 PG TR/SS RT F G H E A B C D 2 1 4 3 5 6 BGA PACKAGE 48-LEAD (9mm × 6.25mm × 3.32mm) BGA PACKAGE TJMAX = 150°C, θJA = 24.7°C/W , θJCbottom = 4.5°C/W θJCtop = 22.3°C/W , θJB = 4.2°C/W , WEIGHT = 0.5g θ VALUES DETERMINED PER JEDEC51-9, 51-12 TOP VIEW FIXED OUTPUT VERSION SYNC GND GND RUN NC BIAS BANK2 VIN PG TR/SS RT GNDBANK 1 VOUTBANK 3 ORDER INFORMATION PART NUMBER TERMINAL FINISH PART MARKING* PACKAGE TYPE MSL RATING TEMPERATURE RANGEDEVICE FINISH CODE LTM8003IY#PBF SAC305 (RoHS) LTM8003 e1 BGA 3 –40°C to 125°C LTM8003HY#PBF SAC305 (RoHS) LTM8003 e1 BGA 3 –40°C to 150°C LTM8003IY SnPb (63/37) LTM8003 e0 BGA 3 –40°C to 125°C LTM8003HY SnPb (63/37) LTM8003 e0 BGA 3 –40°C to 150°C LTM8003IY-3.3#PBF SAC305 (RoHS) LTM8003-3.3 e1 BGA 3 –40°C to 125°C LTM8003HY-3.3#PBF SAC305 (RoHS) LTM8003-3.3 e1 BGA 3 –40°C to 150°C

• Device temperature grade is indicated by a label on the shipping container .
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• BGA Package and Tray Drawings
• This product is not recommended for second side reflow. This product is moisture sensitive. For more information, go to Recommended BGA PCB Assembly and Manufacturing Procedures. 150°C 125°C °C to 150°C 0°C

Rev EFor more information www.analog.com

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Unless otherwise noted, the absolute minimum voltage is zero. Note 3: The LTM8003I is guaranteed to meet specifications over the full –40°C to 125°C internal operating temperature range. The LTM8003H is guaranteed to meet specifications over the full – 40°C to 150°C internal operating temperature range. Note that the maximum internal temperature is determined by specific operating conditions in conjunction with board layout, the rated package thermal resistance and other environmental factors. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum Input Voltage VIN Rising l 3.4 V Output DC Voltage LTM8003, RFB Open LTM8003, RFB = 5.62kΩ, VIN = 40V LTM8003-3.3 0.97 3.3 V Peak Output DC Current VOUT = 3.3V, fSW = 1MHz 6 A Quiescent Current into VIN RUN = 0V BIAS = 0V, No Load, SYNC = 0V, Not Switching µA µA Quiescent Current into BIAS BIAS = 5V, RUN = 0V BIAS = 5V, No Load, SYNC = 0V, Not Switching BIAS = 5V, V OUT = 3.3V, IOUT = 3.5A, fSW = 1MHz µA µA mA Line Regulation 5.5V < V IN < 36V, IOUT = 1A 0.5 % Load Regulation 0.1A < IOUT < 3.5A 0.5 % Output Voltage Ripple IOUT = 3.5A 10 mV Switching Frequency RT = 232kΩ RT = 41.2kΩ RT = 10.7kΩ 200 0.95 kHz MHz MHz Voltage at FB LTM8003 l 950 970 980 mV Minimum BIAS Voltage (Note 5) 3.2 V RUN Threshold Voltage 0.9 1.06 V RUN Current 1 µA TR/SS Current TR/SS = 0V 2 µA TR/SS Pull Down TR/SS = 0.1V 200 Ω PG Threshold Voltage at FB (Upper) FB Falling (Note 6, LTM8003) 1.05 V PG Threshold Voltage at FB (Lower) FB Rising (Note 6, LTM8003) 0.89 V PG Threshold Voltage at VOUT (Upper) VOUT Falling (Note 6, LTM8003-3.3) 3.57 V PG Threshold Voltage at VOUT (Lower) VOUT Rising (Note 6, LTM8003-3.3) 3.03 V PG Leakage Current PG = 42V 1 µA PG Sink Current PG = 0.1V 150 µA SYNC Threshold Voltage Synchronization 0.4 1.5 V SYNC Voltage To Enable Spread Spectrum 2.9 4.2 V SYNC Current SYNC = 0V 35 µA The l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at TJ = 25°C. VIN = 12V, RUN = 2V, unless otherwise noted. Note 4: The LTM8003 contains overtemperature protection that is intended to protect the device during momentary overload conditions. The internal temperature exceeds the maximum operating junction temperature when the overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: Below this specified voltage, internal circuitry will draw power from V IN. Note 6: PG transitions from low to high.

Rev E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Efficiency vs Load Current, VOUT = 0.97V, BIAS = 5V Efficiency vs Load Current, V OUT = 1.2V, BIAS = 5V Efficiency vs Load Current, V OUT = 1.5V, BIAS = 5V TA = 25°C, unless otherwise noted. Efficiency vs Load Current, V OUT = 1.8V, BIAS = 5V Efficiency vs Load Current, V OUT = 2V, BIAS = 5V Efficiency vs Load Current, V OUT = 2.5V, BIAS = 5V Efficiency vs Load Current, V OUT = 3.3V, BIAS = 5V Efficiency vs Load Current, V OUT = 5V, BIAS = 5V Efficiency vs Load Current, V OUT = 8V, BIAS = 5V 12V IN 24V IN 36V IN LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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Rev EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted. Efficiency vs Load Current, VOUT = 12V, BIAS = 5V Efficiency vs Load Current, V OUT = 15V, BIAS = 5V Efficiency vs Load Current, V OUT = 18V, BIAS = 5V Efficiency vs Load Current, V OUT = –3.3V, BIAS Tied to LTM8003 GND Efficiency vs Load Current, V OUT = –5V, BIAS Tied to LTM8003 GND Efficiency vs Load Current, V OUT = –8V, BIAS Tied to LTM8003 GND Efficiency vs Load Current, V OUT = –12V, BIAS Tied to LTM8003 GND Efficiency vs Load Current, V OUT = –15V, BIAS Tied to LTM8003 GND Efficiency vs Load Current, V OUT = –18V, BIAS Tied to LTM8003 GND 24V IN 36V IN LOAD CURRENT (A) EFFICIENCY (%)

8003 G10

LOAD CURRENT (A) 100 EFFICIENCY (%)

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LOAD CURRENT (A) 100 EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) EFFICIENCY (%)

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LOAD CURRENT (A) 0.5 1.5 2.5 EFFICIENCY (%)

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LOAD CURRENT (A) 0.5 1.5 EFFICIENCY (%)

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Rev E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Input vs Load Current VOUT = 0.97V, BIAS = 5V Input vs Load Current V OUT = 1.2V, BIAS = 5V Input vs Load Current V OUT = 1.5V, BIAS = 5V Input vs Load Current V OUT = 1.8V, BIAS = 5V Input vs Load Current V OUT = 2V, BIAS = 5V Input vs Load Current V OUT = 2.5V, BIAS = 5V Input vs Load Current V OUT = 3.3V, BIAS = 5V Input vs Load Current V OUT = 5V, BIAS = 5V Input vs Load Current V OUT = 8V, BIAS = 5V TA = 25°C, unless otherwise noted. 12V IN 24V IN 36V IN LOAD CURRENT (A) 0.2 0.4 0.6 0.8 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.25 0.50 0.75 1.00 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.3 0.6 0.9 1.2 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.25 0.50 0.75 1.00 1.25 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.3 0.6 0.9 1.2 1.5 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.4 0.8 1.2 1.6 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.5 1.0 1.5 2.0 2.5 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.75 1.50 2.25 3.00 INPUT CURRENT (A)

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LOAD CURRENT (A) 1.0 2.0 3.0 4.0 5.0 INPUT CURRENT (A)

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Rev EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted. Input vs Load Current VOUT = 12V, BIAS = 5V Input vs Load Current V OUT = 15V, BIAS = 5V Input vs Load Current V OUT = 18V, BIAS = 5V Input vs Load Current V OUT = –3.3V, BIAS Tied to LTM8003 GND Input vs Load Current V OUT = –5V, BIAS Tied to LTM8003 GND Input vs Load Current V OUT = –8V, BIAS Tied to LTM8003 GND Input vs Load Current V OUT = –12V, BIAS Tied to LTM8003 GND Input vs Load Current V OUT = –15V, BIAS Tied to LTM8003 GND Input vs Load Current V OUT = –18V, BIAS Tied to LTM8003 GND 24V IN 36V IN LOAD CURRENT (A) INPUT CURRENT (A)

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LOAD CURRENT (A) INPUT CURRENT (A)

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LOAD CURRENT (A) 0.0 1.0 2.0 3.0 4.0 5.0 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.5 1.0 1.5 2.0 2.5 INPUT CURRENT (A)

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LOAD CURRENT (A) INPUT CURRENT (A)

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LOAD CURRENT (A) INPUT CURRENT (A)

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LOAD CURRENT (A) INPUT CURRENT (A)

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LOAD CURRENT (A) 0.5 1.5 2.5 INPUT CURRENT (A)

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LOAD CURRENT (A) 0.5 1.5 INPUT CURRENT (A)

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Rev E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS BIAS Current vs Load Current VOUT = 0.97V, BIAS = 5V BIAS Current vs Load Current V OUT = 1.2V, BIAS = 5V BIAS Current vs Load Current V OUT = 1.5V, BIAS = 5V BIAS Current vs Load Current V OUT = 1.8V, BIAS = 5V BIAS Current vs Load Current V OUT = 2V, BIAS = 5V BIAS Current vs Load Current V OUT = 2.5V, BIAS = 5V BIAS Current vs Load Current V OUT = 3.3V, BIAS = 5V BIAS Current vs Load Current V OUT = 5V, BIAS = 5V BIAS Current vs Load Current V OUT = 8V, BIAS = 5V TA = 25°C, unless otherwise noted. 12V IN 24V IN 36V IN LOAD CURRENT (A) 2.0 2.5 3.0 3.5 4.0 4.5 BIAS CURRENT (mA)

8003 G37

LOAD CURRENT (A) 3.0 3.5 4.0 4.5 5.0 BIAS CURRENT (mA)

8003 G38

LOAD CURRENT (A) 3.0 3.5 4.0 4.5 5.0 5.5 BIAS CURRENT (mA)

8003 G39

LOAD CURRENT (A) 3.0 3.5 4.0 4.5 5.0 5.5 BIAS CURRENT (mA)

8003 G40

LOAD CURRENT (A) 3.5 4.0 4.5 5.0 5.5 6.0 BIAS CURRENT (mA)

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LOAD CURRENT (A) 4.0 4.5 5.0 5.5 6.0 6.5 BIAS CURRENT (mA)

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LOAD CURRENT (A) 4.5 5.0 5.5 6.0 6.5 7.0 BIAS CURRENT (mA)

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LOAD CURRENT (A) BIAS CURRENT (mA)

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LOAD CURRENT (A) BIAS CURRENT (mA)

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Rev EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted. BIAS Current vs Load Current VOUT = 12V, BIAS = 5V BIAS Current vs Load Current V OUT = 15V, BIAS = 5V BIAS Current vs Load Current V OUT = 18V, BIAS = 5V Dropout Voltage vs Load Current, V OUT = 5V, BIAS = 5V Input Current vs VIN VOUT Short Circuited Maximum Load Current vs VIN BIAS Open Maximum Load Current vs VIN BIAS Open Derating, H-Grade, VOUT = 0.97V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 1.2V, BIAS = 5V, DC2416A Demo Board 24V IN 36V IN LOAD CURRENT (A) BIAS CURRENT (mA)

8003 G46

LOAD CURRENT (A) BIAS CURRENT (mA)

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LOAD CURRENT (A) BIAS CURRENT (mA)

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LOAD CURRENT (A) 300 600 900 DROPOUT VOL TAGE (mV)

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V IN (V) 750 1500 2250 INPUT CURRENT (mA)

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INPUT VOL TAGE (V) MAXIMUM LOAD CURRENT (A)

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–3.3V OUT –5V OUT –8V OUT INPUT VOL TAGE (V) 0.5 1.0 1.5 2.0 2.5 3.0 3.5 MAXIMUM LOAD CURRENT (A)

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–12VOUT –15VOUT –18VOUT AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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0 LFM

AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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Rev E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Derating, H-Grade, VOUT = 1.5V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 1.8V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 2V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 2.5V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 3.3V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 5V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 8V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 12V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = 15V, BIAS = 5V, DC2416A Demo Board TA = 25°C, unless otherwise noted. AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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Rev EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted. Derating, H-Grade, VOUT = 18V, BIAS = 5V, DC2416A Demo Board Derating, H-Grade, VOUT = –3.3V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, H-Grade, VOUT = –5V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, H-Grade, V OUT = –8V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, H-Grade, V OUT = –12V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, H-Grade, V OUT = –15V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, H-Grade, V OUT = –18V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, V OUT = 0.97V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 1.2V, BIAS = 5V, DC2416A Demo Board AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 0.5 1.0 1.5 2.0 2.5 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 150 0.5 1.0 1.5 2.0 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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Rev E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Derating, I-Grade, VOUT = 1.5V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 1.8V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 2V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 2.5V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 3.3V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 5V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 8V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 12V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = 15V, BIAS = 5V, DC2416A Demo Board TA = 25°C, unless otherwise noted. AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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Rev EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted. Derating, I-Grade, VOUT = 18V, BIAS = 5V, DC2416A Demo Board Derating, I-Grade, VOUT = –3.3V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, VOUT = –5V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, V OUT = –8V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, V OUT = –12V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, V OUT = –15V, BIAS Tied to LTM8003 GND, DC2416A Demo Board Derating, I-Grade, V OUT = –18V, BIAS Tied to LTM8003 GND, DC2416A Demo Board CISPR25 Class 5 Peak Radiated DC2416A Demo Board, V OUT = 5V Spread Spectrum Enabled CISPR25 Class 5 Average Radiated DC2416A Demo Board, V OUT = 5V Spread Spectrum Enabled AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) AMBIENT TEMPERATURE (°C) 100 125 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 0.5 1.0 1.5 2.0 MAXIMUM LOAD CURRENT (A)

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AMBIENT TEMPERATURE (°C) 100 125 0.5 1.0 1.5 2.0 MAXIMUM LOAD CURRENT (A)

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FREQUENCY (MHz) –10 AMPLITUDE (dBuV/m)

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fSW = 2MHz IOUT = 3.5A VERTICAL POLARIZATION fSW = 2MHz IOUT = 3.5A FREQUENCY (MHz) –10 AMPLITUDE (dBuV/m)

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Rev E For more information www.analog.com PIN FUNCTIONS GND (Bank 1, A1, A6): Tie these GND pins to a local ground plane below the LTM8003 and the circuit components. In most applications, the bulk of the heat flow out of the LTM8003 is through these pads, so the printed circuit design has a large impact on the thermal performance of the part. See the PCB Layout and Thermal Considerations sections for more details. V IN (Bank 2): VIN supplies current to the LTM8003’s in- ternal regulator and to the internal power switch. These pins must be locally bypassed with an external, low ESR capacitor; see T able 1 for recommended values. VOUT (Bank 3): Power Output Pins. Apply the output filter capacitor and the output load between these pins and GND pins. BIAS (Pins G1, G2): The BIAS pin connects to the internal power bus. Connect to a power source greater than 3.2V and less than 18V. If V OUT is greater than 3.2V, connect this pin there. If the output voltage is less, connect this to a voltage source above 3.2V. Decouple this pin with at least 1µF if the voltage source for BIAS is remote. If unused or generating a negative output, tie BIAS to LTM8003 GND. RUN (Pins B5, B6): Pull the RUN pin below 0.9V to shut down the LTM8003. Tie to 1.06V or more for normal operation. If the shutdown feature is not used, tie this pin to the V IN pin. RT (Pins A4, A5): The RT pin is used to program the switching frequency of the LTM8003 by connecting a resis- tor from this pin to ground. The Applications Information section of the data sheet includes a table to determine the resistance value based on the desired switching frequency. Minimize capacitance at this pin. Do not drive this pin. SYNC (Pins A2, B2): External clock synchronization input and operational mode. This pin programs four different operating modes: Burst Mode®. Tie this pin to ground for Burst Mode operation at low output loads—this will result in ultralow quiescent current. 2. Pulse-skipping mode. Float this pin for pulse-skipping mode. This mode offers full frequency operation down to low output loads before pulse skipping occurs. Spread spectrum mode. Tie this pin high (between 2.9V and 4.2V) for pulse-skipping mode with spread spectrum modulation. Synchronization mode. Drive this pin with a clock source to synchronize to an external frequency. During synchro- nization the part will operate in pulse-skipping mode. PG (Pin B1, C1): The PG pin is the open-collector output of an internal comparator . PG remains low until the FB pin voltage is within about 10% of the final regulation CISPR25 Class 5 Peak Radiated DC2416A Demo Board, VOUT = 5V Spread Spectrum Enabled CISPR25 Class 5 Average Radiated DC2416A Demo Board, V OUT = 5V Spread Spectrum Enabled fSW = 2MHz IOUT = 3.5A FREQUENCY (MHz) 200 400 600 800 1000 –10 AMPLITUDE (dBuV/m)

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fSW = 2MHz IOUT = 3.5A FREQUENCY (MHz) 200 400 600 800 1000 –10 AMPLITUDE (dBuV/m)

8053 G92

TYPICAL PERFORMANCE CHARACTERISTICSTA = 25°C, unless otherwise noted.

Rev EFor more information www.analog.com BLOCK DIAGRAM PIN FUNCTIONS BIAS VOUT VIN FB GND RUN TR/SS SYNC RT PG

8003 BD01

0.2µF 10pF 0.01µF 1.3µH 100k BIAS VOUT VIN GND RUN TR/SS SYNC RT PG

8003 BD02

0.2µF 10pF 0.01µF 1.3µH INTERNAL 0.97V FEEDBACK LTM8003 Block Diagram LTM8003-3.3 Block Diagram voltage. The PG signal is valid when VIN is above 3.4V. If VIN is above 3.4V and RUN is low, PG will drive low. If this function is not used, leave this pin floating. FB (Pin F1, F2): The LTM8003 regulates its FB pin to 0.97V. Connect the adjust resistor from this pin to ground. The value of RFB is given by the equation RFB = 97/(VOUT – 0.97), where RFB is in kΩ. TR/SS (Pin A3, B3): The TR/SS pin is used to provide a soft-start or tracking function. The internal 2μA pull-up current in combination with an external capacitor tied to this pin creates a voltage ramp. If TR/SS is less than 0.97V, the output voltage tracks to this value. For tracking, tie a resistor divider to this pin from the tracked output. This pin is pulled to ground with an internal MOSFET during shutdown and fault conditions; use a series resistor if driving from a low impedance output. This pin may be left floating if the tracking function is not needed. NC (Pins C5, D5, E5, E6): These pins are not connected, either to any other net or each other .

Rev E For more information www.analog.com OPERATION The LTM8003 is a stand-alone non-isolated step-down switching DC/DC power supply that can deliver up to 6A. The continuous current is determined by the internal operating temperature. It provides a precisely regulated output voltage programmable via one external resistor from 0.97V to 18V. The input voltage range is 3.4V to 40V. Given that the LTM8003 is a step-down converter , make sure that the input voltage is high enough to support the desired output voltage and load current. Simplified Block Diagrams are given on the previous page. The LTM8003 contains a current mode controller , power switching elements, power inductor and a modest amount of input and output capacitance. The LTM8003 is a fixed frequency PWM regulator . The switching frequency is set by simply connecting the appropriate resistor value from the RT pin to GND. An internal regulator provides power to the control cir - cuitry. This bias regulator normally draws power from the V IN pin, but if the BIAS pin is connected to an external voltage higher than 3.2V, bias power is drawn from the external source (typically the regulated output voltage). This improves efficiency. The RUN pin is used to place the LTM8003 in shutdown, disconnecting the output and reducing the input current to a few µA. To enhance efficiency, the LTM8003 automatically switches to Burst Mode operation in light or no load situations. Between bursts, all circuitry associated with controlling the output switch is shut down reducing the input supply current to just a few µA. The oscillator reduces the LTM8003’s operating frequency when the voltage at the FB pin is low. This frequency fold- back helps to control the output current during start-up and overload. The TR/SS node acts as an auxiliar y input to the error amplifier . The voltage at FB servos to the TR/SS voltage until TR/SS goes above about 0.97V. Soft-start is imple- mented by generating a voltage ramp at the TR/SS pin using an external capacitor which is charged by an internal constant current. Alternatively, driving the TR/SS pin with a signal source or resistive network provides a tracking function. Do not drive the TR/SS pin with a low impedance voltage source. See the Applications Information section for more details. The LTM8003 contains a power good comparator which trips when the FB pin is at about 90% to 110% of its regulated value. The PG output is an open-drain transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high. The PG signal is valid when V IN is above 3.4V. If VIN is above 3.4V and RUN is low, PG will drive low. The LTM8003 is equipped with a thermal shutdown that inhibits power switching at high junction temperatures. The activation threshold of this function is above the maxi- mum temperature rating to avoid interfering with normal operation, so prolonged or repetitive operation under a condition in which the thermal shutdown activates may damage or impair the reliability of the device.

1. Look at Table 1 and find the row that has the desired

input range and output voltage.

1. Apply the recommended C FF, CIN, COUT, RFB and RT
2. Apply the CFF (from VOUT to FB) as required.
3. Connect BIAS as indicated.

over the given input condition is given in the fSW column. Synchronization section for details. Table 1. Recommended Component Values and Configuration (TA = 25°C)

1. The LTM8003 may be capable of lower input voltages but may skip switching cycles.
2. An input bulk capacitor is required

load and environmental conditions. ESR. However , not all ceramic capacitors are suitable. Ceramic capacitors are also piezoelectric. cost electrolytic capacitor. inductance forms a high-Q (underdamped) tank circuit. avoided; see the Hot-Plugging Safely section. Table 2. SW Frequency vs RT Value large of an output capacitor .

Rev EFor more information www.analog.com APPLICATIONS INFORMATION BIAS Pin Considerations The BIAS pin is used to provide drive power for the in- ternal power switching stage and operate other internal circuitr y. For proper operation, it must be powered by at least 3.2V. If the output voltage is programmed to 3.2V or higher , BIAS may be simply tied to V OUT. If VOUT is less than 3.2V, BIAS can be tied to VIN or some other voltage source. If the BIAS pin voltage is too high, the efficiency of the LTM8003 may suffer . The optimum BIAS voltage is dependent upon many factors, such as load current, input voltage, output voltage and switching frequency. In all cases, ensure that the maximum voltage at the BIAS pin is less than 19V. If BIAS power is applied from a remote or noisy voltage source, it may be necessary to apply a decoupling capacitor locally to the pin. A 1µF ceramic capacitor works well. The BIAS pin may also be left open at the cost of a small degradation in efficiency. If unused or generating a negative output, tie BIAS to LTM8003 GND. Maximum Load The maximum practical continuous load that the LTM8003 can drive, while rated at 3.5A, actually depends upon both the internal current limit and the internal temperature. The internal current limit is designed to prevent damage to the LTM8003 in the case of overload or short-circuit. The internal temperature of the LTM8003 depends upon operating conditions such as the ambient temperature, the power delivered, and the heat sinking capability of the system. For example, if the LTM8003H is configured to regulate at 1.2V, it may continuously deliver 6A from 12V IN if the ambient temperature is controlled to less than 50°C. This is quite a bit higher than the 3.5A continuous rating. Please see the “Derating, H-Grade, V OUT = 1.2V” curve in the Typical Performance Characteristics section. Similarly, if the output voltage is 18V and the ambient temperature is 100°C, the LTM8003H will deliver at most 2.7A from 24V IN, which is less than the 3.5A continuous rating. Load Sharing Neither the LTM8003 nor LTM8003-3.3 are designed to load share. Burst Mode Operation To enhance efficiency at light loads, the LTM8003 auto - matically switches to Burst Mode operation which keeps the output capacitor charged to the proper voltage while minimizing the input quiescent current. During Burst Mode operation, the LTM8003 delivers single cycle bursts of current to the output capacitor followed by sleep periods where most of the internal circuitry is powered off and energy is delivered to the load by the output capacitor . During the sleep time, V IN and BIAS quiescent currents are greatly reduced, so, as the load current decreases towards a no load condition, the percentage of time that the LTM8003 operates in sleep mode increases and the average input current is greatly reduced, resulting in higher light load efficiency. Burst Mode operation is enabled by tying SYNC to GND. Minimum Input Voltage The LTM8003 is a step-down converter , so a minimum amount of headroom is required to keep the output in regulation. Keep the input above 3.4V to ensure proper operation. Voltage transients or ripple valleys that cause the input to fall below 3.4V may turn off the LTM8003. Output Voltage T racking and Soft-Start The LTM8003 allows the user to adjust its output voltage ramp rate by means of the TR/SS pin. An internal 2μA pulls up the TR/SS pin to about 2.4V. Putting an external capaci- tor on TR/SS enables soft starting the output to reduce current surges on the input supply. During the soft-start ramp the output voltage will proportionally track the TR/ SS pin voltage. For output tracking applications, TR/SS can be externally driven by another voltage source. From 0V to 0.97V, the TR/SS voltage will override the internal 0.97V reference input to the error amplifier , thus regulat- ing the FB pin voltage to that of the TR/SS pin. When TR/ SS is above 0.97V , tracking is disabled and the feedback voltage will regulate to the internal reference voltage. The TR/SS pin may be left floating if the function is not needed.

Rev E For more information www.analog.com APPLICATIONS INFORMATION An active pull-down circuit is connected to the TR/SS pin which will discharge the external soft-start capacitor in the case of fault conditions and restart the ramp when the faults are cleared. Fault conditions that clear the soft-start capacitor are the RUN pin transitioning low, V IN voltage falling too low, or thermal shutdown. Pre-Biased Output As discussed in the Output Voltage T racking and Soft- Start section, the LTM8003 regulates the output to the FB voltage determined by the TR/SS pin whenever TR/ SS is less than 0.97V. If the LTM8003 output is higher than the target output voltage, the LTM8003 will attempt to regulate the output to the target voltage by returning a small amount of energy back to the input supply. If there is nothing loading the input supply, its voltage may rise. Take care that it does not rise so high that the input voltage exceeds the absolute maximum rating of the LTM8003. Frequency Foldback The LTM8003 is equipped with frequency foldback which acts to reduce the thermal and energy stress on the internal power elements during a short circuit or output overload condition. If the LTM8003 detects that the output has fallen out of regulation, the switching frequency is reduced as a function of how far the output is below the target voltage. This in turn limits the amount of energy that can be delivered to the load under fault. During the start-up time, frequency foldback is also active to limit the energy delivered to the potentially large output capacitance of the load. When a clock is applied to the SYNC pin, the SYNC pin is floated or held high, the frequency foldback is disabled, and the switching frequency will slow down only during overcurrent conditions. Synchronization To select low ripple Burst Mode operation, tie the SYNC pin below about 0.4V (this can be ground or a logic low output). To synchronize the LT M8003 oscillator to an external frequency, connect a square wave (with about 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys that are below 0.4V and peaks above 1.5V. The LTM8003 will not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead will pulse skip to maintain regulation. The LTM8003 may be synchronized over a 200kHz to 3MHz range. The R T resistor should be chosen to set the switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal will be 500kHz and higher , the R T should be selected for 500kHz. For some applications it is desirable for the LTM8003 to operate in pulse-skipping mode, offering two major dif - ferences from Burst Mode operation. The first is that the clock stays awake at all times and all switching cycles are aligned to the clock. The second is that full switching frequency is reached at lower output load than in Burst Mode operation. These two differences come at the expense of increased quiescent current. T o enable pulse-skipping mode, the SYNC pin is floated. The LTM8003 features spread spectrum operation to further reduce EMI/EMC emissions. To enable spread spectrum operation, apply between 2.9V and 4.2V to the SYNC pin. In this mode, triangular frequency modulation is used to vary the switching frequency between the value programmed by R T to about 20% higher than that value. The modulation frequency is about 3kHz. For example, when the LTM8003 is programmed to 2MHz, the frequency will vary from 2MHz to 2.4MHz at a 3kHz rate. When spread spectrum operation is selected, Burst Mode operation is disabled, and the part will run in pulse-skipping mode. The LTM8003 does not operate in forced continuous mode regardless of SYNC signal. Negative Output The LTM8003 is capable of generating a negative output voltage by connecting its V OUT to system GND and the LTM8003 GND to the negative voltage rail. An example of this is shown in the Typical Applications section. The

8003 F01

Figure 1. The LTM8003 Can Be Used to Generate a Negative Voltage Figure 1 shows a typical negative output voltage application. current the LTM8003 can deliver for given input voltages.

8003 F02

Figure 2. Any Output Voltage T ransient Appears on LTM8003 GND

8003 F03

Figure 3. A Schottky Diode Can Limit the T ransient Caused by sient, which may be unhealthy for the application load. output voltage, tie BIAS to LTM8003 GND.

protects against a shorted or reversed input.

8003 F04

Figure 4. The Input Diode Prevents a Shorted Input from heat sinking are acceptable.

1. Place the CIN capacitor as close as possible to the VIN

and GND connection of the LTM8003.

1. Place the C OUT capacitor as close as possible to the

VOUT and GND connection of the LTM8003.

1. Place the C IN and C OUT capacitors such that their
2. Connect all of the GND connections to as large a copper
3. Use vias to connect the GND copper area to the board’s

8003 F05

Figure 5. Layout Showing Suggested External Components, GND Plane and Thermal Vias

Rev EFor more information www.analog.com APPLICATIONS INFORMATION number of thermal vias depends upon the printed circuit board design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8003. However , these capacitors can cause problems if the LTM8003 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt- age at the V IN pin of the LTM8003 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8003’s rating and damaging the part. If the input supply is poorly controlled or the LTM8003 is hot-plugged into an energized supply, the input network should be designed to prevent this overshoot. This can be accomplished by installing a small resistor in series to V IN, but the most popular method of controlling input voltage overshoot is add an electrolytic bulk cap to the V IN net. This capacitor’s relatively high equivalent series resistance damps the circuit and eliminates the voltage overshoot. The extra capacitor improves low frequency ripple filtering and can slightly improve the efficiency of the circuit, though it is likely to be the largest component in the circuit. Thermal Considerations The LTM8003 output current may need to be derated if it is required to operate in a high ambient temperature. The amount of current derating is dependent upon the input voltage, output power and ambient temperature. The derating curves given in the Typical Performance Char - acteristics section can be used as a guide. These curves were generated by the LTM8003 mounted to a 58cm 2 4-layer FR4 printed circuit board. Boards of other sizes and layer count can exhibit different thermal behavior , so it is incumbent upon the user to verify proper operation over the intended system’s line, load and environmental operating conditions. For increased accuracy and fidelity to the actual applica- tion, many designers use FEA (Finite Element Analysis) to predict thermal per formance. T o that end, Page 2 of the data sheet typically gives four thermal coefficients: θJA – Thermal resistance from junction to ambient θJCbottom – Thermal resistance from junction to the bottom of the product case θJCtop – Thermal resistance from junction to top of the product case θJB – Thermal resistance from junction to the printed circuit board. While the meaning of each of these coefficients may seem to be intuitive, JEDEC has defined each to avoid confusion and inconsistency. These definitions are given in JESD 51-12, and are quoted or paraphrased below: θ JA is the natural convection junction-to-ambient air thermal resistance measured in a one cubic foot sealed enclosure. This environment is sometimes referred to as “still air” although natural convection causes the air to move. This value is determined with the part mounted to a JESD 51-9 defined test board, which does not reflect an actual application or viable operating condition. θ JCbottom is the junction-to-board thermal resistance with all of the component power dissipation flowing through the bottom of the package. In the typical µModule regulator , the bulk of the heat flows out the bottom of the package, but there is always heat flow out into the ambient envi - ronment. As a result, this thermal resistance value may be useful for comparing packages but the test conditions don’t generally match the user’s application.

conditions don’t generally match the user’s application. two layer board. This board is described in JESD 51-9. within the µModule regulator , and the green are outside. of the circuit to ensure good heat sinking of the LTM8003. section for printed circuit board design suggestions.

8003 F06

Figure 6. Graphical Representation of the Thermal Resistances Between the Device Junction and Ambient

OUT or cause damage to the LTM8003 µModule regulator . Table 3. Table 2. FMEA Analysis — Adjacent Pin Short Test VIN–NC NO NO Circuit behaves normally. VIN–RUN NO NO Circuit behaves normally. RUN–NC NO NO Circuit behaves normally. RUN–RT NO NO V OUT falls to 0V . Device can be damaged if EN/UV voltage is higher than RT ABS MAX. RUN–GND NO NO Vout falls to 0V . RT–GND NO NO SW frequency increases. V OUT may fall below regulation voltage. RT–GND BANK1 NO NO SW frequency increases. V OUT may fall below regulation voltage. RT–TRSS NO NO V OUT will fall below regulation voltage. TR/SS–SYNC NO NO V OUT will fall below regulation voltage. TR/SS–GND BANK1 NO NO V OUT will fall below regulation voltage. SYNC–GND NO NO Circuit behaves normally. SYNC–PG NO NO Circuit behaves normally. SYNC–GND BANK1 NO NO Circuit behaves normally. BIAS–GND BANK1 NO NO Efficiency may decrease. BIAS–VOUT BANK3 NO NO Efficiency may decrease. If BIAS is tied to a voltage source > V OUT, VOUT may rise. If BIAS is tied to a votlage source < VOUT, VOUT may be reduced. VOUT BANK3–GND BANK1 NO NO V OUT will fall to 0V .

Rev E For more information www.analog.com TYPICAL APPLICATIONS 3.3VOUT from 5VIN to 40VIN Step-Down Converter . BIAS Is Tied to VOUT 1.2VOUT from 3.4VIN to 40VIN Step-Down Converter . BIAS Is Tied to an External 3.3V Source 2.5VOUT from 5.5VIN to 15VIN Step-Down Converter . BIAS Is Tied to VIN 4.7µF 100µF49.9k 850kHz L TM8003-3.3 VOUT BIAS VOUT 3.3V V INVIN 5V TO 40V GND RUN SYNC RT

8003 TA02

PINS NOT USED IN THIS CIRCUIT : TR/SS, PG 3.3V 4.7µF 100µF 47pF 402k L TM8003 VOUT BIAS VOUT 1.2V V INVIN 3.4V TO 40V FBGND RUN SYNC

8003 TA03

PINS NOT USED IN THIS CIRCUIT : TR/SS, PG 78.7k 550kHz RT 4.7µF 100µF 63.4k L TM8003 VOUT BIAS VOUT 2.5V V INVIN 5.5V TO 15V FBGND RUN SYNC

8003 TA04

PINS NOT USED IN THIS CIRCUIT : TR/SS, PG 56.2k 750kHz RT

Rev EFor more information www.analog.com –5VOUT from 5VIN to 35VIN Positive to Negative Converter , BIAS tied to LTM8003 GND Maximum Load Current vs VIN. BIAS Tied to LTM8003 GND 4.7µF 47µF 24.3k L TM8003 VOUT RUN OPTIONAL SCHOTTKY DIODE V IN VIN 5V TO 35V FB GND SYNCBIAS

8003 TA05a

PINS NOT USED IN THIS CIRCUIT : TR/SS, PG 41.2k 1MHz RT INPUT BULK CAP VOUT –5V INPUT VOL TAGE (V) MAXIMUM LOAD CURRENT (A)

8003 TA05b

LTM8003 Pinout (Adjustable Version, Sorted by Pin Number) PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME A 1 GND B 1 PG C 1 PG D 1 GND E 1 GND F 1 FB G 1 BIAS H 1 V OUT A 2 SYNC B 2 SYNC C 2 GND D 2 GND E 2 GND F 2 FB G 2 BIAS H 2 V OUT A 3 SS B 3 SS C 3 GND D 3 GND E 3 GND F 3 GND G 3 V OUT H 3 V OUT A 4 RT B 4 GND C 4 GND D 4 GND E 4 GND F 4 GND G 4 V OUT H 4 V OUT A 5 RT B 5 RUN C 5 NC D 5 NC E 5 NC F 5 GND G 5 V OUT H 5 V OUT A 6 GND B 6 RUN C 6 V IN D 6 V IN E 6 NC F 6 GND G 6 V OUT H 6 V OUT LTM8003 Pinout (Fixed Output Voltage, Sorted by Pin Number) PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME PIN PIN NAME A 1 GND B 1 PG C 1 PG D 1 GND E 1 GND F 1 GND G 1 BIAS H 1 V OUT A 2 SYNC B 2 SYNC C 2 GND D 2 GND E 2 GND F 2 GND G 2 BIAS H 2 V OUT A 3 SS B 3 SS C 3 GND D 3 GND E 3 GND F 3 GND G 3 V OUT H 3 V OUT A 4 RT B 4 GND C 4 GND D 4 GND E 4 GND F 4 GND G 4 V OUT H 4 V OUT A 5 RT B 5 RUN C 5 NC D 5 NC E 5 NC F 5 GND G 5 V OUT H 5 V OUT A 6 GND B 6 RUN C 6 V IN D 6 V IN E 6 NC F 6 GND G 6 V OUT H 6 V OUT

Rev E For more information www.analog.com PACKAGE DESCRIPTION NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JEP95 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW BGA 48 0517 REV B L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” PIN 1 0.000 0.5 0.5 1.5 1.5 2.5 2.5 3.5 0.5 2.5 1.5 0.5 1.5 2.5 3.5 0.000 DETAIL A Øb (48 PLACES) F G H E A B C D 2 14 35 6 D A DETAIL B PACKAGE SIDE VIEW M X Y Z ddd M Z eee 0.50 ±0.025 Ø 48x E b e e b F G 48-Lead (9mm × 6.25mm × 3.32mm) (Reference LTC DWG # 05-08-1999 Rev B) SEE NOTESDETAIL A SYMBOL A b D E e F G aaa bbb ccc ddd eee MIN 3.12 0.40 2.72 0.50 0.47 0.27 2.45 NOM 3.32 0.50 2.82 0.60 0.50 9.00 6.25 1.00 7.00 5.00 0.32 2.50 MAX 3.52 0.60 2.92 0.70 0.53 0.37 2.55 0.15 0.10 0.20 0.25 0.10 TOTAL NUMBER OF BALLS: 48 DIMENSIONS NOTES BALL HT BALL DIMENSION PAD DIMENSION SUBSTRATE THK MOLD CAP HT Z DETAIL B SUBSTRATE ccc Z Z // bbb Z MOLD CAP 5. PRIMARY DATUM -Z- IS SEATING PLANE

6 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y

Rev EFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 2/17 Added “Silent Switcher” to product description and features. Added EMI performance graph. Added Fault Tolerance section and FMEA analysis table. 13, 14 B 5/17 Added LTM8003IY and LTM8003HY. Changed recommended BIAS pin connection from Open to GND for negative output applications. 5, 7, 11, 13, 14, 17, 19, 21, 27 C 12/17 Changed Peak Reflow Body Temperature from 260°C to 250°C. 2 D 7/18 Corrected graph title on p27 from Bias Open to Bias Tied to LTM8003 GND. 27 E 9/18 Corrected part numbers on the Order Information table: LTM8003-3.3IY#PBF to LTM8003IY-3.3#PBF LTM8003-3.3HY#PBF to LTM8003HY-3.3#PBF Updated package thermal resistance: JA = 23.5°C/W to JA = 24.7°C/W , JCbottom = 3.2°C/W to JCbottom = 4.5°C/W JCtop = 17.9°C/W to JCtop = 22.3°C/W , JB = 3.1°C/W to JB = 4.2°C/W Changed recommended BIAS voltage from 5 to, 3.2 to 19 on Table 1

Rev E For more information www.analog.com www.analog.com  ANALOG DEVICES, INC. 2016-2018 D17129-0-9/18(E) RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LTM8002 Lower Current of LTM8003. 40V, 2.5A Step-Down Silent Switcher µModule Regulator with FMEA Compliant Pinout 3.4V ≤ V IN ≤ 40V, 0.97V ≤ VOUT ≤ 18V, 6.25mm × 6.25mm × 2.22mm BGA Package LTM8063 40V, 2A Step-Down Silent Switcher µModule Regulator 3.2V ≤ VIN ≤ 40V, 0.8V ≤ VOUT ≤ 15V, 4mm × 6.25mm × 2.22mm BGA Package Package LTM8032 36V, 2A Low EMI Step-Down µModule Regulator 3.6V ≤ V IN ≤ 36V, 0.8V ≤ VOUT ≤ 10V, EN55022B Compliant LTM8033 36V, 3A Low EMI Step-Down µModule Regulator 3.6V ≤ V IN ≤ 36V, 0.8V ≤ VOUT ≤ 24V, EN55022B Compliant LTM8026 36V, 5A CVCC Step-Down µModule Regulator 6V ≤ V IN ≤ 36V, 1.2V ≤ VOUT ≤ 24V, Constant Voltage Constant Current Operation LTM4613 36V, 8A Low EMI Step-Down µModule Regulator 5V ≤ V IN ≤ 36V, 3.3V ≤ VOUT ≤ 15V, EN55022B Compliant LTM8073 60V, 3A Step-Down Silent Switcher µModule Regulator 3.4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 15V, 6.25mm × 9mm × 3.32mm BGA Package DESIGN RESOURCES EXTERNAL 3.3V 4.7µF 100µF 47pF L TM8003 VOUT FB VOUT 0.97V V INVIN 3.4V TO 40V BIASGND RUN SYNC 8003 TA06 PINS NOT USED IN THIS CIRCUIT : TR/SS, PG 84k 450kHz RT 0.97VOUT from 3.4VIN to 40VIN Step Down Converter with Spread Spectrum. BIAS is Tied to an External 3.3V Source SUBJECT DESCRIPTION µModule Design and Manufacturing Resources Design:

• Selector Guides
• Demo Boards and Gerber Files
• Free Simulation Tools Manufacturing:
• Quick Start Guide
• PCB Design, Assembly and Manufacturing Guidelines
• Package and Board Level Reliability µModule Regulator Products Search 1. Sort table of products by parameters and download the result as a spread sheet. 2. Search using the Quick Power Sear ch parametric table. Digital Power System Management Analog Devices’ family of digital power supply management ICs are highly integrated solutions that offer essential functions, including power supply monitoring, supervision, margining and sequencing, and feature EEPROM for storing user configurations and fault logging.