LTC3870 LINER | Alldatasheet
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Technical content
3870fbFor more information www.linear .com/L TC3870 Typical applicaTion FeaTures DescripTion PolyPhase Step-Down Slave Controller for Digital Power System Management The LT C®3870 is a PolyPhase® step-down slave control- ler specially designed for multiphase operation with the LTC3880 family digital power system management DC/DC controllers. It provides a small and cost effective solution for supplying very large currents by cascading it with a master controller. A peak current mode architecture pro- vides the LTC3870 with excellent current sharing from phase to phase and from chip to chip. Coherently working with the LTC3880 family, the LTC3870 does not require additional I2C addresses, and it supports all programmable features as well as fault protection. The constant switching frequency can be synchronized to an external clock from the master controller from 100kHz to 1MHz. Load Transient Response of a 2-Phase Master (3880)/Slave (3870) Converter
applicaTions
n LTC3880 Family Phase Extender Supporting LTC3880/3880-1, LTC3883/3883-1, LTC3886, LTC3887 Master Controllers n Cascade with Multiple Chips for Very Large Current n Accurate PolyPhase Current Sharing n EXTVCC Capable of 5V to 14V Input n Wide VIN Range: 4.5V to 60V n Wide Output Voltage Range : 0.5V to 14V n Wide SYNC Frequency Range: 100kHz to 1MHz n Pin Programmable of CCM/DCM Operation n Pin Programmable of Phase-Shift Control n Integrated Powerful N-Channel MOSFET Gate Drivers n Available in a 28-Pin (4mm × 5mm) QFN Package n High Power Distributed Power Systems n Telecom Systems n Industrial Applications L, LT, LT C, LT M, PolyPhase, Linear Technology and the Linear logo are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 5705919, 5929620, 6144194, 6177787, 6580258, 5408150 + + VIN 4.7µF BOOST0 SW0 BG0 BOOST1 TG0 TG1 SW1 BG1 FREQ * REFER TO L TC3880 DATA SHEET FOR MASTER SETUP L TC3870 ILIM PHASMD MODE0 MODE1 SGND RUN0 SYNC RUN1 FAUL T0 FAUL T1 PGND 0.1µF 0.1µF1.0µH 0.56µH 0.2µF 0.2µF RUN0 GPIO0 GPIO1 RUN1 SYNC ITH0 ITH1 3.3V VSENSE0+ ISENSE0+ ISENSE0– ISENSE1+ ISENSE1– ITH0 ITH1 VSENSE1 L TC3880* 1.8V 2.15k 1.74k 100k 530µF 530µF VOUT0 30A VOUT1 40A VIN INTVCC EXTVCC
3870 TA01a
VIN = 12V VOUT1 = 1.8V 50µs/DIV
3870 TA01b
IL_3880(CH1) 10A/DIV IL_3870(CH1) 10A/DIV VOUT1 100mV/DIV AC-COUPLED ILOAD 10A/DIV 0A TO 10A TO 0A
3870fb For more information www.linear .com/L TC3870 pin conFiguraTionabsoluTe MaxiMuM raTings 0.3V to 71V 65V 0.3V to 6V MODE0/MODE1, FREQ, PHASMD, ILIM ...–0.3V to INTVCC Operating Junction Temperature Range C to 150°C 9 10 TOP VIEW UFD PACKAGE 28-LEAD (4mm × 5mm) PLASTIC QFN 11 12 13 28 27 26 25 24 1MODE0 ISENSE0+ ISENSE0– RUN0 RUN1 ISENSE1– ISENSE1+ MODE1 BOOST0 BG0 V IN PGND EXTV CC INTVCC BG1 BOOST1 ITH0 FREQ FAULT0 FAULT1 TG0 SW0 I TH1 ILIM SYNC PHASMD TG1 SW1 8 15 SGND TJMAX = 125°C, θJA = 43°C/W, θJC_BOT = 3.4°C/W EXPOSED PAD (PIN 29) IS SGND, MUST BE SOLDERED TO PCB orDer inForMaTion
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Input Voltage Range (Note 3) 4.5 60 V VOUT Output Voltage Range (Note 4) 0.5 14 V IQ Input Voltage Supply Current Normal Operation VRUN0,VRUN1 = 0V (Note 5) VRUN0,VRUN1 = 3.3V, No Caps on TG and BG 1.1 2.6 mA mA V UVLO Undervoltage Lockout Threshold When V IN > 4.2V VINTVCC Falling VINTVCC Rising 3.7 4.0 V V The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 15V, VRUN0,VRUN1 = 3.3V, fSYNC = 350kHz (externally driven) unless otherwise specified. LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC3870EUFD#PBF LTC3870EUFD#TRPBF 3870 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C LTC3870IUFD#PBF LTC3870IUFD#TRPBF 3870 28-Lead (4mm × 5mm) Plastic QFN –40°C to 125°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult L TC Marketing for information on nonstandard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ (Note 1)
3870fbFor more information www.linear .com/L TC3870 elecTrical characTerisTics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 15V, VRUN0,VRUN1 = 3.3V, fSYNC = 350kHz (externally driven) unless otherwise specified. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Control Loop IISENSE0+, IISENSE1+ Current Sense + Pin Current VISENSE0,1+ = 3.3V l ±0.1 ±1 µA IISENSE0–, IISENSE1– Current Sense − Pin Current VISENSE0,1– = 3.3V l ±0.1 ±1 µA VIILIMIT Maximum Current Sense threshold (High Range) VITH = 2.22V, ILIM = INTVCC l 70 75 80 mV Maximum Current Sense threshold (Low Range) VITH = 2.22V, ILIM = GND l 45 50 55 mV Gate Drivers TG RUP Pull-Up On-Resistance TG High 2.5 Ω TG RDOWN Pull-down On-Resistance TG Low 1.5 Ω BG RUP Pull-Up On-Resistance BG High 2.4 Ω BG RDOWN Pull-down On-Resistance BG Low 1.1 Ω TG0, TG1 tr tf TG T ransition Time: Rise Time Fall Time (Note 6) C LOAD = 3300pF CLOAD = 3300pF ns ns BG0, BG1 t r tf BG T ransition Time: Rise Time Fall Time (Note 6) C LOAD = 3300pF CLOAD = 3300pF ns ns TG/BG t 1D Top Gate Off to Bottom Gate On Delay Time (Note 6) CLOAD = 3300pF Each Driver 30 ns BG/TG t2D Bottom Gate Off to Top Gate On Delay Time (Note 6) CLOAD = 3300pF Each Driver 30 ns tON(MIN) Minimum On-Time (Note 7) 90 ns INTVCC Regulator VINTVCC_VIN Internal VCC Voltage No Load 6.0V <VIN <60V, VEXTVCC = 0 V 4.85 5.1 5.35 V VLDO INT INTV CC Load Regulation ICC = 0mA to 50mA, VEXTVCC = 0V 0.8 ±2 % VINTVCC_EXT Internal VCC Voltage No Load VEXTVCC = 8.5V (Note 8) 4.85 5.1 5.35 V VLDO EXT INTV CC Load Regulation with EXTVCC ICC = 0 to 20mA, VEXTVCC = 8.5V 0.5 ±2 % VEXTVCC EXTVCC Switchover Voltage VEXTVCC Ramping Positive (Note 8) 4.7 4.8 4.9 V VHYS_EXTVCC EXTVCC HYSTERESIS 200 mV Oscillator and Phase-Locked Loop fSNYC Oscillator SYNC Range l 100 1000 kHz VTH,SYNC SYNC Input Threshold VTH,sync Falling (Note 9) VTH,sync Rising 0.4 2.0 V V f NOM Nominal Frequency VFREQ = 1.0V 500 kHz IFREQ FREQ setting current 9 10 11 µA θ SYNC-θ0 SYNC to Ch0 Phase Relationship Based on the Falling Edge of Sync and Rising Edge of TG0 PHASMD = 0 PHASMD = 1/3 INTV CC PHASMD = 2/3 INTVCC PHASMD = INTVCC 180 120 Deg Deg Deg Deg θ SYNC-θ1 SYNC to Ch1 Phase Relationship Based on the Falling Edge of Sync and Rising Edge of TG1 PHASMD = 0 PHASMD = 1/3 INTV CC PHASMD = 2/3 INTVCC PHASMD = INTVCC 300 240 270 Deg Deg Deg Deg
3870fb For more information www.linear .com/L TC3870 Typical perForMance characTerisTics Efficiency vs Load Current Efficiency vs Load Current Full Load Efficiency and Power Loss vs Input Voltage elecTrical characTerisTics The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C. (Note 2) VIN = 15V, VRUN0,VRUN1 = 3.3V, fSYNC = 350kHz (externally driven) unless otherwise specified. Note 1: Stresses beyond those listed in under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC3870 is tested under pulsed load conditions such that T J ≈ TA. The LTC3870E is guaranteed to meet specifications from 0°C to 85°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC3870I is guaranteed over the full –40°C to 125°C operating junction temperature range. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the related package thermal impedance and other environmental factors. The junction temperature T J is calculated from the ambient temperature TA and power dissipation PD according to the following formula: TJ = TA + (PD • 43°C/W) Note 3: When VIN >15V, EXTVCC is recommended to reduce IC Temperature. Note 4: Output voltage is set and controlled by the master controller in multiphase operations. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Application Information. Note 6: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Note 7: The minimum on-time condition corresponds to an inductor peak-to-peak ripple current ≥40% of IMAX (see Minimum On-Time Considerations in the Applications Information section. Note 8: EXTVCC is enabled only if VIN is higher than 6.5V. Note 9: Guaranteed by design. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Inputs RUN0/RUN1, MODE0/MODE1, FAUL T0/FAUL T1 VIH Input High Threshold Voltage l 2.0 V VIL Input Low Threshold Voltage l 1.4 V LOAD CURRENT (A) 0.1 EFFICIENCY (%) 100 1 10 100
3870 G01
VIN = 12V VOUT = 1.8V fSW = 400kHz L = 0.56µH DCR = 1.8m/uni03A9 LOAD CURRENT (A) 0.1 EFFICIENCY (%) 100 1 10 100
3870 G02
VIN = 12V VOUT = 3.3V fSW = 400kHz L = 0.56µH DCR = 1.8m/uni03A9 INPUT VOL TAGE (V) EFFICIENCY (%) POWER LOSS (W) 2.5 1.5 0.5 7 9 11 13 15 17 19
3870 G03
VIN = 12V VOUT = 1.8V
3870fbFor more information www.linear .com/L TC3870 Typical perForMance characTerisTics Load Step (Discontinuous Conduction Mode) 4-Phase Operation LTC3880 and LTC3870 Load Step (Forced Continuous Mode) 4-Phase Operation LTC3880 and LTC3870 Inductor Current at Light Load Start-Up Into a Pre-Biased Output 4-Phase Operation LTC3880 and LTC3870 Current Sense Threshold vs I TH Voltage INTVCC Line Regulation DC Output Current Matching Between LTC3880 and LTC3870 Dynamic Current Sharing During a Load Transient in a 4-Phase Operation LTC3880 and LTC3870 Quiescent Current vs Input Voltage Without EXTV CC VITH (V) –40 VISENSE (mV) –20 0.5 1 1.5 2 2.5
3870 G08
INPUT VOL TAGE (V) INTVCC VOL TAGE (V) 20 10 30 40 50 60
3870 G09
INPUT VOL TAGE (V) SUPPL Y CURRENT (mA) 2.5 1.5 0.5 3.5 20 10 30 40 50 60
3870 G12
1µs/DIV IL_3870(CH0) FORCED CONTINUOUS MODE 5A/DIV IL_3870(CH0) DISCONTINUOUS CONDUCTION MODE 5A/DIV
3870 G06
VIN = 12V VOUT = 1.8V ILOAD = 1A 2ms/DIV RUN ALL RUN PINS TIED TOGETHER 2V/DIV VOUT LTC3870 IN DCM 500mV/DIV
3870 G07
VIN = 12V VOUT = 1.8V TOTAL OUTPUT CURRENT (A) CHANNEL CURRENT (A) 10 20 30 40 50 60 70 80 90
3870 G10
50µs/DIV IL_3880(CH0) IL_3880(CH1) IL_3870(CH0) IL_3870(CH1) 5A/DIV
3870 G11
50µs/DIV ILOAD 20A/DIV 0A TO 20A TO 0A IL_3880(CH0) 10A/DIV IL_3870(CH0) 10A/DIV VOUT 100mV/DIV AC-COUPLED
3870 G04
VIN = 12V VOUT = 1.8V 50µs/DIV ILOAD 20A/DIV 0A TO 20A TO 0A IL_3880(CH0) 10A/DIV IL_3870(CH0) 10A/DIV VOUT 100mV/DIV AC-COUPLED
3870 G05
VIN = 12V VOUT = 1.8V
3870fb For more information www.linear .com/L TC3870 pin FuncTions MODE0/MODE1 (Pin 1/Pin 8): DCM/CCM Mode Control Pins. Channel0/Channel1 operates in forced continuous mode if MODE0/MODE1 pin is logic high. There is a 500kΩ pull down resistor on MODE0/MODE1 internally. The default operation mode in each channel is discontinuous mode operation unless these pins are actively driven high. I SENSE0+/ISENSE1+ (Pin 2/Pin 7): Current Sense Comparator positive inputs, normally connected to the positive node of the DCR sensing networks or current sensing resistors. ISENSE0−/ISENSE1− (Pin 3/Pin 6): Current Sense Comparator negative inputs, normally connected to the negative node of the DCR sensing network or current sensing resistors. RUN0/RUN1 (Pin 4/Pin 5): Enable RUN Input Pins. Logic high on these pins enables the corresponding channel. In multiphase operation, these pins are connected to master RUN pins. I TH0/ITH1 (Pin 28/Pin 9): Current Control Threshold. Each associated channel’s current comparator tripping threshold increases with its I TH voltage. In multiphase operation, these pins are connected to the master controller’s I TH pins for current sharing. I LIM ( Pin 10): Program Current Comparators’ Sense Voltage Range. This pin can be tied to SGND or INTV CC to select the maximum current sense threshold for each current comparator. SGND sets both channels’ current low range with maximum 50mV sensing voltage. INTVCC sets both channels’ current high range with maximum 75mV sensing voltage. For equal current sharing, the setup on the I LIM pin has to be same as the setup on the bit 7 of MFR_PWM_MODE_3880/3883/3886/3887 register in the master controller. See Table 2 in the Operation Section for details. SYNC (Pin 11): External Clock Synchronization Input. If an external clock is present at this pin, the switching frequency will be synchronized to the falling edge of the external clock. In multiphase operation, this pin is connected to the master's SYNC pin for frequency synchronization. Do not float the SYNC pin. PHASMD (Pin 12): Phase Set Pin. This pin can be tied to SGND, INTV CC or a resistor divider from INTVCC to SGND. This pin determines the relative phases between the ext- ernal clock on the SYNC pin and the internal controllers. See T able 1 in the Operation Section for details. TG0/TG1 (Pin 24/Pin 13): Top Gate Driver Outputs. These are the outputs of floating drivers with a voltage swing equal to INTV CC superimposed on the switch node voltages. SW0/SW1 (Pin 23/Pin 14): Switch Node Connections to Inductors. Voltage swings at the pins are from a Schottky diode (external) voltage drop below ground to V IN. BOOST0/BOOST1 (Pin 22/Pin 15): Boosted Floating Driver Supplies. The (+) terminal of the bootstrap capacitors con- nect to these pins. These pins swing from a diode voltage drop below INTV CC up to VIN + INTVCC. BG0/BG1 (Pin 21/Pin 16): Bottom Gate Driver Outputs. These pins drive the gates of the bottom N-Channel MOS- FETs between PGND and INTV CC. INTVCC ( Pin 17): Internal Regulator 5V Output. The internal control circuits are powered from this voltage. Bypass this pin to PGND with a minimum of 4.7µF low ESR tantalum or ceramic capacitor. INTVCC is enabled as soon as VIN is powered. EXTVCC (Pin 18): External power input to an internal LDO connected to INTV CC. This LDO supplies INTV CC power bypassing the internal LDO powered from V IN whenever EXTVCC is higher than 4.8V. See EXTVCC connection in the Applications Information Section. Do not exceed 14V on this pin. Bypass this pin to PGND with a minimum of 4.7µF low ESR tantalum or ceramic capacitor. If the EXTVCC pin is not used, leave it open or tie it to ground. EXTVCC can be present before VIN. However, EXTVCC is enabled only if VIN is higher than 6.5V. PGND (Pin 19): Power Ground Pin. Connect this pin closely to the sources of the bottom N-Channel MOSFETs and the (–) terminals of C IN. VIN (Pin 20): Main Input Supply. Bypass this pin to PGND with a capacitor (0.1µF to 1µF).
3870fbFor more information www.linear .com/L TC3870 FAUL T0/FAUL T1 (Pin 26/Pin 25): Fault Input Pins. Con- nect these pins to the master chip GPIO pins to respond to fault signals from the master controller. If this pin is low, both TG and BG pins are pulled down at the corre - sponding channel. There is a 500k pull down resistor on FAUL T0/FAUL T1 internally. These pins have to be driven high externally for normal operation. FREQ (Pin 27): Frequency Set Pin. There is a precision 10µA current flowing out of this pin. A resistor to ground sets a voltage which in turn programs the frequency. This pin FuncTions pin sets the default switching frequency when there is no external clock on the SYNC pin. Set the frequency close to the external clock to help the internal PLL sync to the SYNC pin clock quickly and smoothly. See the application section for the detailed information. SGND (Exposed Pad Pin 29): Signal Ground. All small- signal and compensation components should connect to this ground, which in turn connects to PGND at one point. The exposed pad must be soldered to the PCB, providing a local ground for the control components of the IC, and be tied to PGND under the IC.
3870fb For more information www.linear .com/L TC3870 block DiagraM 11 12 18 1 4 26 2928 10µA SYNC PHASMD EXTVCC INTVCC INTVCC IREVICMP INTVCC ITH0 ILIM ISENSE0+ ISENSE0– CB DB CVCC BOOST0 L ON REV UVLO FCNT RUN FAUL TB SGND 1.7V RUN0MODE0 FAUL T0 TG0 SW0 BG0 PGND VIN VIN VOUT0 COUT0 CIN 4.8V FREQ CCRC 27 20 SYNC DET PHASE PROGRAM OSC PFD VCO UVLO SLOPE COMPENSATION ILIM RANGE SELECT HI: 1:1 LO: 1:1.5 SWITCH LOGIC AND ANTI- SHOOT- THROUGH S R Q 5.0V LDO EN 5.0V LDO EN REF 3870 BD 71.1k (CH0 Shown)
3870fbFor more information www.linear .com/L TC3870 operaTion Main Control Loop The LTC3870 is a constant frequency, current mode step-down slave controller for parallel operation with the LTC3880 family master controllers. During normal opera- tion, each top MOSFET is turned on when the clock for that channel sets the RS latch , and turned off when the main current comparator, ICMP, resets the RS latch. The peak inductor current at which ICMP resets the RS latch is controlled by the voltage on the I TH pin, which is tied directly to the corresponding ITH pin of the master control- lers. When the load current increases, master controllers drive and increase the I TH voltage, which in turn cause the peak current in the corresponding slave channels to increase, until the average inductor current matches the new load current. After the top MOSFET has been turned off, the bottom MOSFET is turned on until the beginning of the next cycle in Continuous Conduction Mode (CCM) or until the inductor current starts to reverse, as indicated by the reverse current comparator I REV, in Discontinuous Conduction Mode (DCM). The LTC3870 slave controllers DO NOT regulate the output voltage but regulate the current in each channel for current sharing with master controllers. Output voltage regulation is achieved through the voltage feedback loops in master controllers. INTV CC/EXTVCC Power Power for the top and bottom MOSFET drivers and most other internal circuitry is derived from the INTV CC pin. Normally an internal 5.0V linear regulator supplies INTVCC power from V IN. In high V IN applications, if a high effi - ciency external voltage source is available for the EXTVCC pin, another internal 5.0V linear regulator is enabled and supplies INTV CC power from EXTVCC. To enable the linear regulator driven by the EXTVCC pin, VIN has to be higher than 6.5V and EXTVCC pin voltage has to be higher than 4.8V. Do not exceed 14V on the EXTVCC pin. Each top MOSFET driver is biased from the floating bootstrap capacitor C B, which normally recharges during each off cycle through an external diode when the top MOSFET turns off. If the input voltage V IN decreases to a voltage close to VOUT, the loop may enter dropout and attempt to turn on the top MOSFET continuously. The dropout detector detects this and forces the top MOSFET off for about one-twelfth of the clock period plus 100ns every three cycles to allow C B to recharge. However, it is recommended that a load be present or the IC operates at low frequency during the drop-out transition to ensure C B is recharged. Start-Up and Shutdown (RUN0, RUN1) The two channels of the LTC3870 can independently start up and shut down using the RUN0 and RUN1 pins. Pulling either of these pins below 1.4V shuts down the control circuits for that channel. During shutdown, both TG and BG are pulled down to turn off the external power MOSFETs. Pulling either of these pins above 2V enables the corresponding channel and internal circuits. During startup, the RUN0/RUN1 pins are actively pulled down until the INTV CC voltage passes the under-voltage lockout threshold of 4V. For multiphase parallel operation, the RUN0/RUN1 pins have to be connected and driven by the RUN pins of the master controller. Do not exceed the Absolute Maximum Rating of 6V on these pins. The start-up of each channel’s output voltage V OUT is controlled and programmed by the master controller. After the RUN pins are released, the master controller drives the output based on the programmed delay time and rise time, and the slave controller LTC3870 just follows the master to supply equivalent current to the output during startup. Light Load Current Operation (Discontinuous Conduction Mode, Continuous Conduction Mode) The LTC3870 can be set to operate either in Discontinuous Conduction Mode (DCM) or forced Continuous Conduc- tion Mode (CCM). To select forced Continuous Mode of operation, tie the MODE pin to a DC voltage above 2V (e.g., INTVCC). To select discontinuous conduction mode of operation, tie the MODE pin to a DC voltage below 1.4V (e.g., SGND). In forced continuous operation, the induc- tor current is allowed to reverse at light loads or under large transient conditions . The peak inductor current is determined by the voltage on the I TH pin. In this mode, the efficiency at light loads is lower than in discontinu - ous Mode operation. However, continuous mode has the advantages of lower output ripple and less inter ference with audio cir cuitry. When the MODE pin is connected to
3870fb For more information www.linear .com/L TC3870 SGND, the LTC3870 operates in discontinuous mode at light loads. At very light loads, the current comparator ICMP may remain tripped for several cycles and force the external top MOSFET to stay off for the same number of cycles (i.e., skipping pulses). This mode provides higher light load efficiency than forced continuous mode and the inductor current is not allowed to reverse. There are 500k pull down resistors internally connected to the MODE0/ MODE1 pins. If MODE0/MODE1 pins are floating, both channels default to discontinuous conduction mode. Multichip Operation (PHASMD and SYNC Pins) The PHASMD pin determines the relative phases between the internal channels as well as the external clock signal on the SYNC pin, as shown in Table 1. The phases tabulated are relative to zero degree phase being defined as the falling edge of the clock on SYNC. Table 1. PHASMD Channel 0 Phase Channel 1 Phase GND 180° 0° 1/3 INTVCC 60° 300° 2/3 INTVCC or Float 120° 240° INTVCC 90° 270° The SYNC pin is used to synchronize switching frequency between master and slave controllers. Input capacitance ESR requirements and efficiency losses are substantially reduced because the peak current drawn from the input capacitor is effectively divided by the number of phases used and power loss is proportional to the RMS current squared. A two-phase, single output voltage implementa- tion can reduce input path power loss by 75% and radi - cally reduce the required RMS current rating of the input capacitor(s). operaTion Single Output Multiphase Operation The LTC3870 is designed for multiphase converters with the master controller by making these connections: Tie all the I TH pins of paralleled channels together for current sharing between masters and slaves. Note that ILIM setup on slaves has to match MFR_PWM_MODE current range setup in masters. Tie all SYNC pins together between master and slaves for same switching frequency synchronization; one and only one of the master controllers has to be programmed as master to generate clock signal on the SYNC pin. Tie all the RUN pins of paralleled channels together between master and slaves for startup and shutdown sequences. Tie the GPIO pin of the master controller to the FAUL T pin of slave controllers and program the master GPIO as fault sharing for fault protections. Examples of single output multiphase converters are shown in Figure 1. Inductor Current Sensing Like the LTC3880/LTC3883, LTC3870 can use either induc- tor DCR or R SENSE to sense the inductor current. Inductor DCR current sensing provides a lossless method of sens- ing the instantaneous current. Therefore, it can provide higher efficiency for applications with high output currents. However, the DCR of a copper inductor typically has 10% tolerance. For precise current sensing, a precision sensing resistor R SENSE can be used to sense the inductor current. It is important to match the current sensing circuit between master controllers and slave controllers to guarantee bal- anced load sharing and overcurrent protection.
6 PHASE OPERATION4 PHASE OPERATION
3870 F01
Figure 1. Examples of Single/Dual Output Multiphase Converters any frequency within the range of 100kHz to 1MHz.
3870fb For more information www.linear .com/L TC3870 The Typical Application on the first page of this data sheet is a basic LTC3870 application circuit featuring the LTC3880 as a slave controller. In paralleled operation, the current sensing scheme as well as the power stage parameters in LTC3870 must be the same as the master controller to achieve balanced current sharing between masters and slaves. Finally, input and output capacitors are selected based on RMS current rating, ripple, and transient specs. Current Limit Programming To match the master controller current limit, each chan- nel of LTC3870 can be programmed separately with two current ranges. The ILIM pin of LTC3870 is a 4-level logic input which sets the current limit of LTC3870. When ILIM is grounded, both channel0 and channel1 are set to be low current range. When I LIM is tied to INTVCC, both channel0 and channel1 are set to be high current range. Here, low current range means the current sense threshold linearly increases from 0mV to 50mV as I TH voltage is increased from 0.5V to 2.22V without slope compensation. High cur- rent range means the current sense threshold increases to 75mV as I TH voltage is increased to 2.22V without slope compensation. Set ILIM to one-third INTVCC for channel0 high current range and channel1 low current range. Set I LIM to two-thirds INTVCC or float for channel0 low current range and channel1 high current range. The summary of I LIM pin setups is shown in Table 2. For balanced load current sharing, use the same current range setting as in the master controller. Note that the LTC3870 does not have active clamping circuit on I TH pin for peak current limit and over current protection. Over current protection relies on the master controller to drive and clamp the I TH pin voltage not to exceed the programmed voltage through the PMBus command. Table 2. ILIM Channel 0 Current limit Channel 1 Current limit GND Range Low Range Low 1/3 INT VCC Range High Range Low 2/3 INTVCC or Float Range Low Range High INTVCC Range High Range High applicaTions inForMaTion INTVCC Regulators and EXTVCC The LTC3870 features a PMOS LDO that supplies power to INTV CC from the V IN supply. INTVCC powers the gate drivers and most of the LTC3870’s internal circuitry. The linear regulator regulates the voltage at the INTV CC pin to 5.0V when VIN is greater than 6V. EXTVCC connects to INTVCC through another PMOS LDO and can supply the needed power when its voltage is higher than 4.8V and V IN is higher than 6.5V. Each of these LDOs can supply a peak current of 100mA and must be bypassed to ground with a minimum of 4.7µF ceramic capacitor or low ESR electrolytic capacitor. No matter what type of bulk capaci- tor is used, an additional 0.1µF ceramic capacitor placed directly adjacent to the INTVCC and PGND pins is highly recommended. Good bypassing is needed to supply the high transient currents required by the MOSFET gate drivers and to prevent interaction between the channels. High input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maximum junction temperature rating for the LTC3870 to be exceeded. The INTV CC current, which is dominated by the gate charge current, may be supplied by either the 5.0V linear regula- tor from VIN or the linear regulator from EXTV CC. When the voltage on the EXTVCC pin is less than 4.8V, the linear regulator from VIN is enabled. Power dissipation for the IC in this case is highest and is equal to VIN • IINTVCC. The gate charge current is dependent on operating frequency. The junction temperature can be estimated by using the equations given in Note 2 of the Electrical Characteristics. For example, the LTC3870 INTV CC current is limited to less than 34mA from a 38V supply in the UFD package and not using the EXTV CC supply: where ambient temperature is 70°C and thermal resistance from junction to ambient is 43°C/W. To prevent the maximum junction temperature from be - ing exceeded, the input supply current must be checked while operating in continuous conduction mode (MODE INTVCC) at maximum VIN. When the voltage applied to EXTVCC rises above 4.8V and VIN above 6.5V, the INTVCC linear regulator is turned off and the EXTVCC linear regulator is turned on. Using the EXTVCC allows the MOSFET driver
Do not apply more than 14V to the EXTVCC pin. which is typically 4.5V for logic-level devices. the final arbiter is the total input current for the regulator. current, then there is no change in efficiency. down to disable the master’s switching action.
3870 F04
Figure 2. Setup for a 5V Input that of the total input capacitance of the topside MOSFET(s).
block diagram is shown in Figure 4. the filter capacitor holds the voltage. threshold is 2V, while the input low threshold is 0.4V. corresponding channel is back to the normal operation. back to normal operation when the FAULT pin is released. Figure 3. Relationship Between Oscillator Figure 4. Phase-Locked Loop Block Diagram on Fault pins low if FAULT pins are floating.
3870 F02
3870 F03
3870fbFor more information www.linear .com/L TC3870 master controller. If the master and slave channels are exactly the same, then the transient response and loop stability of the multiphase design is almost the same as the single phase operation of the master by tying the ITH pins together between the master and slaves. For example, design the compensation for a single phase 1.8V/20A output using LTC3880 with a 0.56µH inductor and 530µF output capacitors. To extend the output to 1.8V/40A, simply parallel one channel of LTC3870 with the same inductor and output capacitors (total output capacitors are 1060µF) and tie the I TH pin of LTC3870 to the master I TH. The loop stability and transient responses of the two phase converter are very similar to the single phase design without any extra compensator on the I TH pin of LTC3870 slave controller. Furthermore, L TpowerCAD is provided on the L TC website as a free download for transient and stability analysis. To minimize the high frequency noise on the I TH trace between master and slave ITH pins, a small filter capacitor in the range of tens of pF can be placed closely at each ITH pin of the slave controller. This small capacitor normally does not significantly affect the closed loop bandwidth but increases the gain margin at high frequency. Mode Selection and Pre-Biased Startup There may be situations that require the power supply to start up with a pre-bias on the output capacitors. In this case, it is desirable to start up without discharging the output capacitors. The LTC3870 can be configured to DCM mode for pre-biased start-up. If PGOOD signal is available on the master controller (e.g. LTC3883), the PGOOD pin can be connected to MODE pins of LTC3870 to ensure DCM operation at startup and CCM operation at steady state. Minimum On-Time Considerations Minimum on-time t ON(MIN) is the smallest time duration that the LTC3870 is capable of turning on the top MOSFET. It is determined by internal timing delays and the gate charge required to turn on the top MOSFET. Low duty cycle applications may approach this minimum on-time limit and care should be taken to ensure that: tON(MIN) <TSW VOUT/VIN where TSW is the switching period. applicaTions inForMaTion If the duty cycle falls below what can be accommodated by the minimum on-time, the controller will begin to skip cycles. The output voltage will continue to be regulated, but the ripple voltage and current will increase. The minimum on-time for the LTC3870 is approximately 90ns, with rea- sonably good PCB layout, minimum 30% inductor current ripple and at least 10mV ripple on the current sense signal. The minimum on-time can be affected by PCB switch - ing noise in the current loop. As the peak sense voltage decreases, the minimum on-time gradually increases to 130ns. This is of particular concern in forced continuous applications with low ripple current at light loads. If the duty cycle drops below the minimum on-time limit in this situation, a significant amount of cycle skipping can occur with correspondingly larger current and voltage ripple. PC Board Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the IC. These items are also illustrated graphically in the layout diagram of Figure 5. Figure 6 illustrates the current waveforms present in the various branches of the 2-phase synchronous regulators operating in the continuous mode. Check the following in the PC layout: Are the top N-channel MOSFETs M1 and M3 located within 1cm of each other with a common drain connection at CIN? Do not attempt to split the input bypassing for the two channels as it can cause a large resonant loop. 2. Are the signal and power grounds kept separate? The combined IC signal ground pin and the ground return of C INTVCC must return to the combined COUT (–) terminals. The ITH traces should be as short as possible. The path formed by the top N-channel MOSFET, Schottky diode and the CIN capacitor should have short leads and PC trace lengths. The output capacitor (–) terminals should be connected as close as possible to the (–) terminals of the input capacitor by placing the capacitors next to each other and away from the Schottky loop described above. Are the ISENSE+ and ISENSE– leads routed together with minimum PC trace spacing? The filter capacitor between ISENSE+ and ISENSE– should be as close as possible to the IC. Ensure accurate current sensing with Kelvin connections at the sense resistor or inductor, whichever is used for current sensing.
3870fb For more information www.linear .com/L TC3870 applicaTions inForMaTion 4. Is the INTVCC bypassing capacitor connected close to the IC, between the INTVCC and the power ground pins? This capacitor carries the MOSFET drivers current peaks. An additional 1µF ceramic capacitor placed immediately next to the INTV CC and PGND pins can help improve noise performance substantially. 5. Keep the switching nodes (SW1, SW0), top gate nodes (TG1, TG0), and boost nodes (BOOST1, BOOST0) away from sensitive small-signal nodes, especially from the opposite channel’s current sensing feedback pins. All of these nodes have very large and fast moving signals and therefore should be kept on the “output side” of the LTC3870 and occupy minimum PC trace area. If DCR sensing is used, place the right resistor (Block Diagram, “R C”) close to the switching node. 6. Use a modified “ star ground” technique: a low imped- ance, large copper area central grounding point on the same side of the PC board as the input and output capacitors with tie-ins for the bottom of the INT V CC bypassing capacitor, the bottom of the voltage feedback resistive divider and the SGND pin of the IC. PC Board Layout Debugging Start with one controller at a time. It is helpful to use a DC- 50MHz current probe to monitor the current in the inductor while testing the circuit. Monitor the output switching node (SW pin) to synchronize the oscilloscope to the internal oscillator and probe the actual output voltage as well. Check for proper performance over the operating voltage and current range expected in the application. The frequency of operation should be maintained over the input voltage range down to dropout and until the output load drops below the low current operation threshold—typically 10% of the maximum designed current level in Burst Mode operation. The duty cycle percentage should be maintained from cycle to cycle in a well-designed, low noise PCB implementation. Variation in the duty cycle at a sub-harmonic rate can sug- gest noise pickup at the current or voltage sensing inputs or inadequate loop compensation. Overcompensation of the loop can be used to tame a poor PC layout if regulator bandwidth optimization is not required. Only after each controller is checked for its individual performance should both controllers be turned on at the same time. A particularly difficult region of operation is when one controller channel is nearing its current comparator trip point when the other channel is turning on its top MOSFET. This occurs around 50% duty cycle on either channel due to the phasing of the internal clocks and may cause minor duty cycle jitter. Reduce V IN from its nominal level to verify operation of the regulator in dropout. Check the operation of the un- dervoltage lockout circuit by further lowering V IN while monitoring the outputs to verify operation. Investigate whether any problems exist only at higher output currents or only at higher input voltages. If problems coincide with high input voltages and low output currents, look for capacitive coupling between the BOOST, SW, TG, and pos- sibly BG connections and the sensitive voltage and current pins. The capacitor placed across the current sensing pins needs to be placed immediately adjacent to the pins of the IC. This capacitor helps to minimize the effects of differential noise injection due to high frequency capacitive coupling. If problems are encountered with high current output loading at lower input voltages, look for inductive coupling between C IN, Schottky and the top MOSFET components to the sensitive current and voltage sensing traces. In addition, investigate common ground path voltage pickup between these components and the SGND pin of the IC. Design Example As a design example using master chip LTC3880 and slave chip LTC3870 for a 4-phase high current regulator, assume V IN = 12V (nominal), VIN = 15V (maximum), VOUT = 1.0V, IMAX = 100A, and f = 425kHz (see Typical Applications). The master chip LTC3880 design can be found in the LTC3880 data sheet Design Example section. LTC3880's SYNC pin is connected to LTC3870's SYNC pin and LTC3870's PHASMD is connected to LTC3870’s INTV CC. Slave chip LTC3870 should use the same inductor, power MOSFET, C IN, and COUT as the master chip. DCR sensing is also used for the slave chip. LTC3870's ILIM pin is forced to 0V to match the master chip's 50mV current limit. Both chips' V IN, VOUT, RUN, ITH pins are connected together. LTC3880's GPIO pins are connected to LTC3870's FAUL T pins so the slave controller will be disabled during fault conditions.
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Figure 5. Recommended Printed Circuit Layout Diagram Figure 6. Branch Current Waveforms
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3870fb For more information www.linear .com/L TC3870 Typical applicaTions High Efficiency 425kHz 4-phase 1.0V Step-Down Converter +++ ITH1 VTRIM1_CFG VTRIM0_CFG VOUT1_CFG VOUT0_CFG VDD25 EXTVCC ILIM FREQ_CFG ASEL ITH0 VDD33 VSENSE0+ VSENSE0– ISENSE0– ISENSE0+ SYNC L TC3880 L TC3870 SGND RUN1 RUN0 SCL SDA WP TSNS0 PGND BG0 SW0 BOOST0 TG0 SHARE_CLK GPIO0 ALERT GPIO1 ISENSE1+ VSENSE1 TSNS1 TG1 BOOST1 SW1 BG1 ISENSE1– VIN VIN 6V TO 15V INTVCC ISENSE0– ITH0 ITH1 ISENSE1– ISENSE1+ISENSE0+ PGND RUN0 RUN1 SYNC FAUL T0 FAUL T1 BG0 SW0 BOOST0 TG0 TG1 BOOST1 SW1 BG1 PHASMD FREQ MODE0 MODE1 SGND VIN INTVCC 10µF 0.1µF 0.19µH 0.19µH 0.19µH 0.19µH 1µF 0.1µF 0.22µF 10nF 24.9k 4.32k 4700pF 2.55k10k L0 TO L3 VISHAY IHLP-4040DZ-01 0.19µH M1, M2, M5, M6: INFINEON BSC050N03LS M3, M4, M7, M8: INFINEON BSC010NE2LSI 1µF 10k 10k 10k 10k 10k 10k 10nF 0.22µF 1µF 0.9k 0.9k530µF 15k 15k 1µF 20k 20k 22µF 22µF 1µF 0.1µF 0.1µF 530µF 0.22µF 100k
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0.22µF 1µF 0.9k 0.9k 4.7µF 1µF M5 M6 0.9k 0.9k 0.9k 0.9k 530µF 530µF VOUT 1.0V 100A
3870fbFor more information www.linear .com/L TC3870 Typical applicaTions High Efficiency 425kHz 3-phase 1.8V Step-Down Converter with Input Current Sensing VIN 6V TO 14V 100/uni03A9 3/uni03A9 100/uni03A9 10µF D1 0.1µF 0.22µF 24.9k 11.3k 4.99k 17.8k 2200pF 22µF 4.7µF 1µF 0.22µF 1.43k 1.43k 100k D1 TO D3: CENTRAL CMDSH-3TR L0 TO L2: VISHAY IHLP-4040DZ-11 0.56µH M1, M3, M4: INFINEON BSC050NE2LS M2, M5, M6: INFINEON BSC010NE2LSI 0.1µF 0.1µF 530µF530µF 0.22µF 100pF 1µF M3 M4 1.43k 1.43k 17.4k 1µF 20k 16.2k 1.43k1.43k 1µF 530µF V OUT 1.8V 50A 5m/uni03A9 1µF 1µF 10nF 10µF 10nF 1µF 10k 10k 10k 10k 10k 10k 10k 10k 10nF MMBT3906
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0.56µH 0.56µH 0.56µH VTRIM_CFG VOUT_CFGVDD33 FREQ_CFG ASEL ITH L TC3883 GND PGOOD SYNC RUN SCL SDA WP TSNS PGND SHARE_CLK ALERT GPIO ISENSE+ TG BOOST SW BG ISENSE– VSENSE+ VSENSE– VDD25 VIN VIN_SNS IIN_SNS INTVCC EXTVCC ILIM L TC3870 ISENSE0– ITH0 ITH1 ISENSE1+ ISENSE1– ISENSE0+ RUN0 RUN1 SYNC FAUL T0 FAUL T1 BG0 SW0 BOOST0 TG0 TG1 BOOST1 SW1 BG1 PGND PHASMD FREQ MODE0 MODE1 SGND VIN INTVCC D2 D3
3870fb For more information www.linear .com/L TC3870 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 4.00 ±0.10 (2 SIDES)
2.50 REF
5.00 ±0.10 (2 SIDES) NOTE: 1. DRAWING PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WXXX-X). 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT , SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONL Y A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 0.40 ±0.10 27 28 BOTTOM VIEW—EXPOSED PAD
3.50 REF
0.75 ±0.05 R = 0.115 TYP R = 0.05 TYP PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER 0.25 ±0.05
0.50 BSC
0.200 REF
0.00 – 0.05 (UFD28) QFN 0506 REV B RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPL Y SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.70 ±0.05 0.25 ±0.05 4.10 ±0.05 5.50 ±0.05 2.65 ±0.05 3.10 ±0.05 4.50 ±0.05 PACKAGE OUTLINE 2.65 ±0.10 3.65 ±0.10 3.65 ±0.05 28-Lead Plastic QFN (4mm × 5mm) (Reference LTC DWG # 05-08-1712 Rev B)
3870fbFor more information www.linear .com/L TC3870 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER A 8/14 Added Note 9 Miscellaneous typographical changes 1, 3, 8, 13, 16 B 7/15 Changed title and added master parts supported 1
3870fb For more information www.linear .com/L TC3870 LINEAR TECHNOLOGY CORPORATION 2014 LT 0715 REV B • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com/L TC3870 relaTeD parTs Typical applicaTion PART NUMBER DESCRIPTION COMMENTS LTC3886 60V Dual Output Step-Down Controller with Digital Power System Management 4.5V ≤ VIN ≤ 60V, 0.5V ≤ VOUT ≤ 13.8V, Programmable Loop Compensation, Input Current Sense LTM4676/ LTM4676A Dual 13A or Single 26A Step-Down DC/DC µModule Regulator with Digital Power System Management 4.5V ≤ V IN ≤ 17V/26.5V, 0.5V ≤ VOUT ≤ 4V/5.5V, ±1% VOUT Accuracy, Fault Logging, I2C/PMBus Interface, 16mm × 16mm × 5mm, BGA Package LTC3887/ LTC3887-1 Dual Output Multiphase Step-Down DC/DC Controller with Digital Power System Management, 70ms Start-Up 4.5V ≤ V IN ≤ 24V, 0.5V ≤ VOUT ≤ 5.5V, 70mS Start-Up, Analog Control Loop, I2C/PMBus Interface, -1 Version Drives DrMOS and Power Blocks LTC3880/ LTC3880-1 Dual Output Multiphase Step-Down DC/DC Controller with Digital Power System Management 4.5V ≤ V IN ≤ 24V, 0.5V ≤ VOUT0 ≤ 5.4V, Analog Control Loop, I2C/PMBus Interface with EEPROM and 16-Bit ADC LTC3883/ LTC3883-1 Single Phase Step-Down DC/DC Controller with Digital Power System Management V IN Up to 24V, 0.5V ≤ VOUT ≤ 5.5V, Input Current Sense Amplifier, I2C/PMBus Interface with EEPROM and 16-Bit ADC LTC3882 Dual Output Multiphase Step-Down DC/DC Voltage Mode Controller with Digital Power System Management V IN Up to 38V, 0.5V ≤ VOUT1,2 ≤ 5.25V, ±0.5% VOUT Accuracy I2C/PMBus Interface, Drives DrMOS and Power Blocks LTC3892-1 60V Low IQ Dual, 2-Phase Synchronous Step-Down DC/DC Controller VIN Up to 60V, 0.8V ≤ VOUT ≤ 99%•VIN, 29µA Quiescent Current Adjustable Gate Drive Voltage LTC2977 8-Channel PMBus Power System Manager Featuring Accurate Output Voltage Measurement Sequence and Supervise Eight Power Supplies Margin or T rim Supplies to 0.25% Accuracy VIN 6V TO 24V 5VCC 4.7µF PHASMD FREQ BOOST0 BOOST1 TG0 TG1 SW0 SW1 BG0 BG1 PGND * REFER TO L TC3880 DATA SHEET FIGURE TA04 FOR MASTER SETUP L TC3870 RUN0 SYNC RUN1 FAUL T0 FAUL T1 MODE0 MODE1 SGND 0.1µF 0.1µF 1000pF 100/uni03A9 100/uni03A9 0.42µH 0.0015/uni03A9 0.42µH 0.0015/uni03A9 RUN0 GPIO0 GPIO1 RUN1 SYNC ITH0 ITH1 VSENSE0+ EXTVCC5VCC ISENSE0+ ISENSE0– 1000pF ISENSE1+ ISENSE1– ITH0 ITH1 VSENSE1 L TC3880-1* 1.5V 84.5k 100/uni03A9 100/uni03A9 530µF 530µF VOUT 1.5V 80A VIN INTVCC EXTVCC ILIM
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4-Phase 1.5V Step-Down Converter with Sensing Resistors and External VCC