LTM4607

DATASHEET SEARCH SITE | WWW.ALLDATASHEET.COM

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 28

Technical content

FEATURES

APPLICATIONS

DESCRIPTION

High Effi ciency, Synchronous, 4-Switch Buck-Boost Controller The L TC®3780 is a high performance buck-boost switch- ing regulator controller that operates from input voltages above, below or equal to the output voltage. The constant frequency current mode architecture allows a phase-lock- able frequency of up to 400kHz. With a wide 4V to 30V (36V maximum) input and output range and seamless transfers between operating modes, the L TC3780 is ideal for automotive, telecom and battery-powered systems. The operating mode of the controller is determined through the FCB pin. For boost operation, the FCB mode pin can select among Burst Mode ® operation, discontinuous mode and forced continuous mode. During buck operation, the FCB mode pin can select among skip-cycle mode, discon- tinuous mode and forced continuous mode. Burst Mode operation and skip-cycle mode provide high effi ciency operation at light loads while forced continuous mode and discontinuous mode operate at a constant frequency. Fault protection is provided by an output overvoltage comparator and internal foldback current limiting. A power good output pin indicates when the output is within 7.5% of its designed set point. High Effi ciency Buck-Boost Converter n Single Inductor Architecture Allows VIN Above, Below or Equal to VOUT n Wide VIN Range: 4V to 36V Operation n Synchronous Rectifi cation: Up to 98% Effi ciency n Current Mode Control n ±1% Output Voltage Accuracy: 0.8V < VOUT < 30V n Phase-Lockable Fixed Frequency: 200kHz to 400kHz n Power Good Output Voltage Monitor n Internal LDO for MOSFET Supply n Quad N-Channel MOSFET Synchronous Drive n V OUT Disconnected from VIN During Shutdown n Adjustable Soft-Start Current Ramping n Foldback Output Current Limiting n Selectable Low Current Modes n Output Overvoltage Protection n Available in 24-Lead SSOP and Exposed Pad (5mm × 5mm) 32-Lead QFN Packages n Automotive Systems n Telecom Systems n DC Power Distribution Systems n High Power Battery-Operated Devices n Industrial Control , L T , L TC, L TM and Burst Mode are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 6304066, 5929620, 5408150, 6580258, patent pending on current mode architecture and protection VIN TG2 0.1μF 0.1μF BOOST2 SW2 BG2 TG1 BOOST1 SW1 BG1 PLLIN RUN VOSENSE ITH SS SGND FCB 0.010Ω 4.7μF A B D C 2200pF 1μF CER 100μF 16V CER 330μF 16V ON/OFF 0.1μF 4.7μH 20k PGOOD L TC3780 INTV CC SENSE+ SENSE– PGND 7.5k

3780 TA01

22μF 50V CER V IN 5V TO 32V VOUT 12V 5A+ VIN (V) EFFICIENCY (%) POWER LOSS (W) 100 15 25

3780 TA01b

Effi ciency and Power Loss VOUT = 12V , ILOAD = 5A

CC, EXTVCC, (BOOST – SW1), CC (Note 1) INTV Operating Junction Temperature Range (Notes 5, 2, 7) Lead Temperature (Soldering, 10 sec) TOP VIEW G PACKAGE 24-LEAD PLASTIC SSOP PGOOD SS SENSE SENSE– ITH VOSENSE SGND RUN FCB PLLFL TR PLLIN STBYMD BOOST1 TG1 SW1 V IN EXTVCC INTVCC BG1 PGND BG2 SW2 TG2 BOOST2 TJMAX = 125°C, θJA = 130°C/W 32 31 30 29 28 27 26 25 9 10 11 12 TOP VIEW UH PACKAGE 32-LEAD (5mm s 5mm) PLASTIC QFN 13 14 15 16 1SENSE+ SENSE– ITH VOSENSE SGND RUN FCB PLLFTR SW1 VIN EXTVCC INTVCC BG1 PGND BG2 SW2 NC SS PGOOD NC NC BOOST1 TG1 NC NC PLLIN STBYMD NC NC BOOST2 TG2 NC TJMAX = 125°C, θJA = 34°C/W EXPOSED PAD (PIN 33) IS GND, MUST BE SOLDERED TO PCB PIN CONFIGURATION

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TA = 25°C. VIN = 15V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Main Control Loop VOSENSE Feedback Reference Voltage I TH = 1.2V , –40°C ≤ T ≤ 85°C (Note 3) –55°C ≤ T ≤ 125°C l l 0.792 0.792 0.800 0.800 0.808 0.811 V V IVOSENSE Feedback Pin Input Current (Note 3) –5 –50 nA VLOADREG Output Voltage Load Regulation (Note 3) ∆ITH = 1.2V to 0.7V ∆ITH = 1.2V to 1.8V l l 0.1 –0.1 0.5 –0.5 VREF(LINEREG) Reference Voltage Line Regulation V IN = 4V to 30V , ITH = 1.2V (Note 3) 0.002 0.02 %/V gm(EA) Error Amplifi er T ransconductance I TH = 1.2V , Sink/Source = 3μA (Note 3) 0.32 mS gm(GBW) Error Amplifi er GBW (Note 8) 0.6 MHz IQ Input DC Supply Current Normal Standby Shutdown Supply Current (Note 4) V RUN = 0V , VSTBYMD > 2V VRUN = 0V , VSTBYMD = Open 2400 1500 55 70 μA μA μA V FCB Forced Continuous Threshold 0.76 0.800 0.84 V IFCB Forced Continuous Pin Current V FCB = 0.85V –0.30 –0.18 –0.1 μA VBINHIBIT Burst Inhibit (Constant Frequency) Threshold Measured at FCB Pin 5.3 5.5 V UVLO Undervoltage Reset V IN Falling l 3.8 4 V VOVL Feedback Overvoltage Lockout Measured at V OSENSE Pin 0.84 0.86 0.88 V ISENSE Sense Pins Total Source Current V SENSE– = VSENSE+ = 0V –380 μA VSTBYMD(START) Start-Up Threshold V STBYMD Rising 0.4 0.7 V VSTBYMD(KA) Keep-Alive Power-On Threshold V STBYMD Rising, VRUN = 0V 1.25 V ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3780EG#PBF L TC3780EG#TRPBF L TC3780EG 24-Lead Plastic SSOP –40°C to 85°C L TC3780IG#PBF L TC3780IG#TRPBF L TC3780IG 24-Lead Plastic SSOP –40°C to 125°C L TC3780EUH#PBF L TC3780EUH#TRPBF 3780 32-Lead (5mm × 5mm) Plastic QFN –40°C to 85°C L TC3780IUH#PBF L TC3780IUH#TRPBF 3780I 32-Lead (5mm × 5mm) Plastic QFN –40°C to 125°C LEAD BASED FINISH TAPE AND REEL PART MARKING PACKAGE DESCRIPTION TEMPERATURE RANGE L TC3780EG L TC3780EG#TR L TC3780EG 24-Lead Plastic SSOP –40°C to 85°C L TC3780IG L TC3780IG#TR L TC3780IG 24-Lead Plastic SSOP –40°C to 125°C L TC3780MPG L TC3780MPG#TR L TC3780MPG 24-Lead Plastic SSOP –55°C to 125°C L TC3780EUH L TC3780EUH#TR 3780 32-Lead (5mm × 5mm) Plastic QFN –40°C to 85°C L TC3780IUH L TC3780IUH#TR 3780I 32-Lead (5mm × 5mm) Plastic QFN –40°C to 125°C Consult L TC Marketing for parts specifi ed with wider operating temperature ranges. For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifi cations, go to: http://www.linear .com/tapeandreel/

ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TA = 25°C. VIN = 15V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS DF MAX, Boost Maximum Duty Factor % Switch C On 99 % DF MAX, Buck Maximum Duty Factor % Switch A On (in Dropout) 99 % V RUN(ON) RUN Pin On Threshold V RUN Rising 1 1.5 2 V ISS Soft-Start Charge Current V RUN = 2V 0.5 1.2 μA VSENSE(MAX) Maximum Current Sense Threshold Boost: V OSENSE = VREF – 50mV Buck: VOSENSE = VREF – 50mV l l –95 160 –110 185 –150 mV mV VSENSE(MIN,BUCK) Minimum Current Sense Threshold Discontinuous Mode –6 mV TG1, TG2 tr TG Rise Time C LOAD = 3300pF (Note 5) 50 ns TG1, TG2 tf TG Fall Time C LOAD = 3300pF (Note 5) 45 ns BG1, BG2 tr BG Rise Time C LOAD = 3300pF (Note 5) 45 ns BG1, BG2 tf BG Fall Time C LOAD = 3300pF (Note 5) 55 ns TG1/BG1 t1D TG1 Off to BG1 On Delay, Switch C On Delay CLOAD = 3300pF Each Driver 80 ns BG1/TG1 t2D BG1 Off to TG1 On Delay, Synchronous Switch D On Delay CLOAD = 3300pF Each Driver 80 ns TG2/BG2 t3D TG2 Off to BG2 On Delay, Synchronous Switch B On Delay CLOAD = 3300pF Each Driver 80 ns BG2/TG2 t4D BG2 Off to TG2 On Delay, Switch A On Delay CLOAD = 3300pF Each Driver 80 ns Mode T ransition 1 BG1 Off to BG2 On Delay, Switch A On Delay CLOAD = 3300pF Each Driver 250 ns Mode T ransition 2 BG2 Off to BG1 On Delay, Synchronous Switch D On Delay CLOAD = 3300pF Each Driver 250 ns tON(MIN,BOOST) Minimum On-Time for Main Switch in Boost Operation Switch C (Note 6) 200 ns tON(MIN,BUCK) Minimum On-Time for Synchronous Switch in Buck Operation Switch B (Note 6) 180 ns Internal VCC Regulator VINTVCC Internal VCC Voltage 7V < V IN < 30V , VEXTVCC = 5V l 5.7 6 6.3 V ∆VLDO(LOADREG) Internal VCC Load Regulation I CC = 0mA to 20mA, VEXTVCC = 5V 0.2 2 % VEXTVCC EXTVCC Switchover Voltage I CC = 20mA, VEXTVCC Rising l 5.4 5.7 V ∆VEXTVCC(HYS) EXTVCC Switchover Hysteresis 300 mV ∆VEXTVCC EXTVCC Switch Drop Voltage I CC = 20mA, VEXTVCC = 6V 150 300 mV Oscillator and Phase-Locked Loop fNOM Nominal Frequency V PLLFL TR = 1.2V 260 300 330 kHz fLOW Lowest Frequency V PLLFL TR = 0V 170 200 220 kHz fHIGH Highest Frequency V PLLFL TR = 2.4V 340 400 440 kHz RPLLIN PLLIN Input Resistance 50 kΩ IPLLLPF Phase Detector Output Current f PLLIN < fOSC fPLLIN > fOSC (Note 9) –15 μA μA

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: T J for the QFN package is calculated from the temperature TA and power dissipation PD according to the following formula: T J = TA + (PD • 34°C/W) Note 3: The IC is tested in a feedback loop that servos VITH to a specifi ed voltage and measures the resultant VOSENSE. Note 4: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: Rise and fall times are measured using 10% and 90% levels. Delay times are measured using 50% levels. Note 6: The minimum on-time condition is specifi ed for an inductor peak-to-peak ripple current ≥ 40% of IMAX (see minimum on-time considerations in the Applications Information section). Note 7: The L TC3780E is guaranteed to meet performance specifi cations from 0°C to 85°C. Performance over the –40°C to 85°C operating junction temperature range is assured by design, characterization and correlation with statistical process controls. The L TC3780I is guaranteed over the –40°C to 125°C operating junction temperature range. The L TC3780MP is guaranteed and tested over the full –55 to 125°C operating junction temperature range. Note 8: This parameter is guaranteed by design. Note 9: f OSC is the running frequency for the application. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS PGOOD Output ∆VFBH PGOOD Upper Threshold V OSENSE Rising 5.5 7.5 10 % ∆VFBL PGOOD Lower Threshold V OSENSE Falling –5.5 –7.5 –10 % ∆VFB(HYST) PGOOD Hysteresis V OSENSE Returning 2.5 % VPGL PGOOD Low Voltage I PGOOD = 2mA 0.1 0.3 V IPGOOD PGOOD Leakage Current V PGOOD = 5V ±1 μA ELECTRICAL CHARACTERISTICS The l denotes the specifi cations which apply over the full operating junction temperature range, otherwise specifi cations are at TA = 25°C. VIN = 15V unless otherwise noted.

TYPICAL PERFORMANCE CHARACTERISTICS Effi ciency vs Output Current (Boost Operation) Effi ciency vs Output Current Effi ciency vs Output Current (Buck Operation) Supply Current vs Input Voltage Internal 6V LDO Line Regulation EXTV CC Voltage Drop INTVCC and EXTVCC Switch Voltage vs Temperature EXTVCC Switch Resistance vs Temperature Load Regulation TA = 25°C, unless otherwise noted. ILOAD (A) 0.01 EFFICIENCY (%) 100 0.1 1 10

3780 G01

VIN = 6V VOUT = 12V ILOAD (A) 0.01 EFFICIENCY (%) 100 0.1 1 10

3780 G02

VIN = 12V VOUT = 12V ILOAD (A) 0.01 EFFICIENCY (%) 100 0.1 1 10

3780 G03

VIN = 18V VOUT = 12V INPUT VOLTAGE (V) SUPPLY CURRENT (μA) 1000 2500 10 20 25

3780 G04

VFCB = 0V STANDBY SHUTDOWN INPUT VOLTAGE (V) INTVCC VOLTAGE (V) 5.5 6.0 6.5 15 25

3780 G05

5.0 4.5 51 0 20 30 35 4.0 3.5 CURRENT (mA) EXTVCC VOLTAGE DROP (mV) 100 120 10 20 30 40

3780 G06

TEMPERATURE (°C) –75 –50 5.55INTVCC AND EXTVCC SWITCH VOLTAGE (V) 5.60 5.70 5.75 5.80 6.05 5.90 0 50 75

3780 G07

5.65 5.95 6.00 5.85 –25 25 100 125 INTVCC VOLTAGE EXTVCC SWITCHOVER THRESHOLD TEMPERATURE (°C) –75 –50 –25 EXTVCC SWITCH RESISTANCE (Ω) 0 50 75

3780 G08

LOAD CURRENT (A) NORMALIZED VOUT (%) –0.2 –0.1

3780 G09

–0.3 –0.4 –0.5 1 2 3 5 VIN = 18V FCB = 0V VOUT = 12V VIN = 12V VIN = 6V

(CCM, VIN = 6V , VOUT = 12V) Continuous Current Mode (CCM, VIN = 12V , VOUT = 12V) Continuous Current Mode (CCM, VIN = 18V , VOUT = 12V) Burst Mode Operation (VIN = 6V , VOUT = 12V) Burst Mode Operation (VIN = 12V , VOUT = 12V) Skip-Cycle Mode (VIN = 18V , VOUT = 12V) Discontinuous Current Mode (DCM, VIN = 6V , VOUT = 12V) Discontinuous Current Mode (DCM, VIN = 12V , VOUT = 12V) Discontinuous Current Mode (DCM, VIN = 18V , VOUT = 12V) TYPICAL PERFORMANCE CHARACTERISTICS SW2 10V/DIV SW1 10V/DIV VOUT 100mV/DIV 5μs/DIVVIN = 6V VOUT = 12V

3780 G10

5μs/DIVVIN = 12V VOUT = 12V

3780 G11

5μs/DIVVIN = 18V VOUT = 12V

3780 G12

25μs/DIVVIN = 6V VOUT = 12V

3780 G13

10μs/DIVVIN = 12V VOUT = 12V

3780 G14

2.5μs/DIVVIN = 18V VOUT = 12V

3780 G15

5μs/DIVVIN = 6V VOUT = 12V

3780 G16

5μs/DIVVIN = 12V VOUT = 12V

3780 G17

2.5μs/DIVVIN = 18V VOUT = 12V

3780 G18

TA = 25°C, unless otherwise noted.

Threshold vs Duty Factor (Buck) Maximum Current Sense Threshold vs Duty Factor (Boost) Maximum Current Sense Threshold vs Duty Factor (Buck) Minimum Current Sense Threshold vs Temperature Peak Current Threshold vs VITH (Boost) Valley Current Threshold vs VITH (Buck) Current Foldback Limit TYPICAL PERFORMANCE CHARACTERISTICS TEMPERATURE (°C) –75 –50 FREQUENCY (kHz) 150 200 250 450

3780 G19

0–25 75 10025 125 300 350 400 VPLLFLTR = 2.4V VPLLFLTR = 1.2V VPLLFLTR = 0V TEMPERATURE (°C) –75 –50 –25 3.0 UNDERVOLTAGE RESET (V) 3.4 4.2 4.0 0 50 75

3780 G20

3.2 3.8 3.6 25 100 125 DUTY FACTOR (%) –80 ISENSE+ (mV) –60 –40 –20 80 60 40 20

3780 G21

DUTY FACTOR (%) ISENSE+ (mV)140 160

3780 G22

DUTY FACTOR (%)

110 ISNESE+ (mV)

3780 G23

TEMPERATURE (°C) –75 –50 100 200 25 75

3780 G24

–50 –25 0 50 100 125 –100 –150 150MAXIMUM ISNESE+ THRESHOLD (mV) BOOST BUCK VITH (V) –100 ISENSE+ (mV) –50 100 200 0.4 0.8 1.2 1.6

3780 G25

1.8 2.4 150 VITH (V) –150 ISENSE+ (mV) –100 –50 100 0.4 0.8 1.2 1.6

3780 G26

2.0 2.4 VOSENSE (V) ISENSE+ (mV) 120 160 200 BUCK BOOST 0.2 0.4 0.6

3780 G32

0.8 TA = 25°C, unless otherwise noted.

Load Step Load Step Load Step Line T ransient Line T ransient TYPICAL PERFORMANCE CHARACTERISTICS VOUT 500mV/DIV 200μs/DIVVIN = 18V VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE

3780 G27

200μs/DIVVIN = 12V VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE

3780 G28

200μs/DIVVIN = 6V VOUT = 12V LOAD STEP: 0A TO 5A CONTINUOUS MODE

3780 G29

500μs/DIVVOUT = 12V ILOAD = 1A VIN STEP: 7V TO 20V CONTINUOUS MODE

3780 G30

500μs/DIVVOUT = 12V ILOAD = 1A VIN STEP: 20V TO 7V CONTINUOUS MODE

3780 G31

(SSOP/QFN) PGOOD (Pin 1/Pin 30): Open-Drain Logic Output. PGOOD is pulled to ground when the output voltage is not within ±7.5% of the regulation point. SS (Pin 2/Pin 31): Soft-start reduces the input power sources’ surge currents by gradually increasing the controller’s current limit. A minimum value of 6.8nF is recommended on this pin. SENSE + (Pin 3/Pin 1): The (+) Input to the Current Sense and Reverse Current Detect Comparators. The I TH pin voltage and built-in offsets between SENSE– and SENSE+ pins, in conjunction with R SENSE, set the current trip threshold. SENSE– (Pin 4/Pin 2): The (–) Input to the Current Sense and Reverse Current Detect Comparators. ITH (Pin 5/Pin 3): Current Control Threshold and Error Amplifi er Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V . TA = 25°C, unless otherwise noted.

PIN FUNCTIONS (SSOP/QFN) VOSENSE (Pin 6/Pin 4): Error Amplifi er Feedback Input. This pin connects the error amplifi er input to an external resistor divider from VOUT. SGND (Pin 7/Pin 5): Signal Ground. All small-signal com- ponents and compensation components should connect to this ground, which should be connected to PGND at a single point. RUN (Pin 8/Pin 6): Run Control Input. Forcing the RUN pin below 1.5V causes the IC to shut down the switching regulator circuitry. There is a 100k resistor between the RUN pin and SGND in the IC. Do not apply >6V to this pin. FCB (Pin 9/Pin 7): Forced Continuous Control Input. The voltage applied to this pin sets the operating mode of the controller . When the applied voltage is less than 0.8V , the forced continuous current mode is active. When this pin is allowed to fl oat, the Burst Mode operation is active in boost operation and the skip-cycle mode is active in buck operation. When the pin is tied to INTV CC, the constant frequency discontinuous current mode is active in buck or boost operation. PLLFL TR (Pin 10/Pin 8): The phase-locked loop’s lowpass fi lter is tied to this pin. Alternatively, this pin can be driven with an AC or DC voltage source to vary the frequency of the internal oscillator . PLLIN (Pin 11/Pin 10): External Synchronization Input to Phase Detector . This pin is internally terminated to SGND with 50kΩ. The phase-locked loop will force the rising bottom gate signal of the controller to be synchronized with the rising edge of the PLLIN signal. STBYMD (Pin 12/Pin 11): LDO Control Pin. Determines whether the internal LDO remains active when the control- ler is shut down. See Operation section for details. If the STBYMD pin is pulled to ground, the SS pin is internally pulled to ground, preventing start-up and thereby provid- ing a single control pin for turning off the controller . To keep the LDO active when RUN is low, for example to power a “wake up” circuit which controls the state of the RUN pin, bypass STBYMD to signal ground with a 0.1μF capacitor , or use a resistor divider from V IN to keep the pin within 2V to 5V . BOOST2, BOOST1 (Pins 13, 24/Pins 14, 27): Boosted Floating Driver Supply. The (+) terminal of the bootstrap capacitor C A and CB (Figure 11) connects here. The BOOST2 pin swings from a diode voltage below INTVCC up to VIN + INTVCC. The BOOST1 pin swings from a diode voltage below INTVCC up to VOUT + INTVCC. TG2, TG1 (Pins 14, 23/Pins 15, 26): Top Gate Drive. Drives the top N-channel MOSFET with a voltage swing equal to INTV CC superimposed on the switch node voltage SW . SW2, SW1 (Pins 15, 22/Pins 17, 24): Switch Node. The (–) terminal of the bootstrap capacitor CA and CB (Figure 11) connects here. The SW2 pin swings from a Schottky diode (external) voltage drop below ground up to V IN. The SW1 pin swings from a Schottky diode (external) voltage drop below ground up to V OUT. BG2, BG1 (Pins 16, 18/Pins 18, 20): Bottom Gate Drive. Drives the gate of the bottom N-channel MOSFET between ground and INTV CC. PGND (Pin 17/Pin 19): Power Ground. Connect this pin closely to the source of the bottom N-channel MOSFET , the (–) terminal of C VCC and the (–) terminal of CIN (Figure 11). INTVCC (Pin 19/Pin 21): Internal 6V Regulator Output. The driver and control circuits are powered from this voltage. Bypass this pin to ground with a minimum of 4.7μF low ESR tantalum or ceramic capacitor . EXTV CC (Pin 20/Pin 22): External VCC Input. When EXTVCC exceeds 5.7V , an internal switch connects this pin to INTVCC and shuts down the internal regulator so that the controller and gate drive power is drawn from EXTV CC. Do not exceed 7V at this pin and ensure that EXTVCC < VIN. VIN (Pin 21/Pin 23): Main Input Supply. Bypass this pin to SGND with an RC fi lter (1Ω, 0.1μF). Exposed Pad (Pin 33, QFN Only): This pin is SGND and must be soldered to PCB ground.

0.86V VOUT 0.80V 3780 BD OV EA SHDN RST 4(VFB) RUN/ SS BUCK LOGIC BOOST LOGIC SENSE+ SENSE– IREV ICMP SLOPE 1.2V 4(VFB) SS 1.2μA 100k RUN FCB STBYMD 5.7V VIN VIN VREF INTERNAL SUPPLY EXTVCC INTVCC SGND LDO REG CLK 0.86V 0.74V VOSENSE RLP CLP OSCILLATOR PHASE DET PLLFLTR PLLIN 50k FIN PGOOD

output voltage above, equal to or below the input voltage. ploys a current-sensing resistor in buck or boost modes. compared to the internal reference voltage by the EA. SS voltage while C SS is slowly charged during start-up. being drawn from the input power supply. and switch A is turned on for the remainder of the cycle. and f is the operating frequency in Hz. approaches VOUT, the buck-boost region is reached. mode. Figure 4 shows typical waveforms in this mode.

3780 F01

3780 F02

Figure 1. Simplifi ed Diagram of the Output Switches Figure 2. Operating Mode vs Duty Cycle

A and D are turned on for the remainder of the time. off in boost mode. Every cycle, switch C is turned on fi rst.

3780 F03

Figure 3. Buck Mode (VIN > VOUT)

3780 F04a

3780 F04b

Figure 4. Buck-Boost Mode behaving like a typical synchronous boost regulator . and f is the operating frequency in Hz. proaches VOUT, the buck-boost region is reached.

3780 F05

Figure 5. Boost Mode (VIN < VOUT) buck and boost operations by accepting a logic input. Figure 6 shows the different modes. Figure 6. Different Operating Modes switching regulator . In boost mode, switch A is always on.

on. switch A and synchronous switch B are alternately turned on to maintain the output voltage independent of direction of inductor current. Every ten cycles, synchro- nous switch D is forced off for about 300ns to allow C B to recharge. This is the least effi cient operating mode at light load, but may be desirable in certain applications. In this mode, the output can source or sink current. When the FCB pin voltage is below V INTVCC – 1V , but greater than 0.8V , the controller enters Burst Mode operation in boost operation or enters skip-cycle mode in buck opera- tion. During boost operation, Burst Mode operation sets a minimum output current level before inhibiting the switch C and turns off synchronous switch D when the inductor current goes negative. This combination of requirements will, at low currents, force the I TH pin below a voltage threshold that will temporarily inhibit turn-on of power switches C and D until the output voltage drops. There is 100mV of hysteresis in the burst comparator tied to the I TH pin. This hysteresis produces output signals to the MOSFETs C and D that turn them on for several cycles, followed by a variable “sleep” interval depending upon the load current. The maximum output voltage ripple is limited to 3% of the nominal DC output voltage as determined by a resistive feedback divider . During buck operation at no load, switch A is turned on for its minimum on-time. This will not occur every clock cycle when the output load current drops below 1% of the maximum designed load. The body diode of synchronous switch B or the Schottky diode, which is in parallel with switch B, is used to dis- charge the inductor current; switch B only turns on every ten clock cycles to allow C B to recharge. As load current is applied, switch A turns on every cycle, and its on-time begins to increase. At higher current, switch B turns on briefl y after each turn-off of switch A. switches C and D remain off at light load, except to refresh CA (Figure 11) every 10 clock cycles. In Burst Mode operation/skip-cycle mode, the output is prevented from sinking current. When the FCB pin voltage is tied to the INTV CC pin, the controller enters constant frequency discontinuous current mode (DCM). For boost operation, synchronous switch D is held off whenever the I TH pin is below a threshold volt- age. In every cycle, switch C is used to charge inductor current. After the output voltage is high enough, the controller will enter continuous current buck mode for one cycle to discharge inductor current. In the following cycle, the controller will resume DCM boost operation. For buck operation, constant frequency discontinuous current mode sets a minimum negative inductor current level. synchronous switch B is turned off whenever inductor current is lower than this level. At very light loads, this constant frequency operation is not as effi cient as Burst Mode operation or skip-cycle, but does provide lower noise, constant frequency operation. FREQUENCY SYNCHRONIZATION AND FREQUENCY SETUP The phase-locked loop allows the internal oscillator to be synchronized to an external source via the PLLIN pin. The phase detector output at the PLLFL TR pin is also the DC frequency control input of the oscillator . The frequency ranges from 200kHz to 400kHz, corresponding to a DC voltage input from 0V to 2.4V at PLLFL TR. When locked, the PLL aligns the turn on of the top MOSFET to the ris- ing edge of the synchronizing signal. When PLLIN is left open, the PLLFL TR pin goes low, forcing the oscillator to its minimum frequency. INTV CC/EXTVCC Power Power for all power MOSFET drivers and most inter- nal circuitry is derived from the INTV CC pin. When the EXTVCC pin is left open, an internal 6V low dropout linear regulator supplies INTVCC power . If EXTVCC is taken above 5.7V , the 6V regulator is turned off and an internal switch is turned on, connecting EXTV CC to INTVCC. This allows the INTVCC power to be derived from a high effi ciency external source. POWER GOOD (PGOOD) PIN The PGOOD pin is connected to an open drain of an internal MOSFET . The MOSFET turns on and pulls the pin low when the output is not within ±7.5% of the nominal output level as determined by the resistive feedback divider . When the output meets the ±7.5% requirement, the MOSFET is turned off and the pin is allowed to be pulled up by an external resistor to a source of up to 7V .

Foldback current limiting is activated when the output voltage falls below 70% of its nominal level, reducing power waste. During start-up, foldback current limiting is disabled. INPUT UNDERVOL TAGE RESET The SS capacitor will be reset if the input voltage is al- lowed to fall below approximately 4V . The SS capacitor will attempt to charge through a normal soft-start ramp after the input voltage rises above 4V . OUTPUT OVERVOL TAGE PROTECTION An overvoltage comparator guards against transient over- shoots (>7.5%) as well as other more serious conditions that may overvoltage the output. In this case, synchronous switch B and synchronous switch D are turned on until the overvoltage condition is cleared or the maximum negative current limit is reached. When inductor current is lower than the maximum negative current limit, synchronous switch B and synchronous switch D are turned off, and switch A and switch C are turned on until the inductor current reaches another negative current limit. If the comparator still detects an overvoltage condition, switch A and switch C are turned off, and synchronous switch B and synchronous switch D are turned on again. SHORT-CIRCUIT PROTECTION AND CURRENT LIMIT Switch A on-time is limited by output voltage. When output voltage is reduced and is lower than its nominal level, switch A on-time will be reduced. In every boost mode cycle, current is limited by a voltage reference, which is proportional to the I TH pin voltage. The maximum sensed current is limited to 160mV . In every buck mode cycle, the maximum sensed current is limited to 130mV . STANDBY MODE PIN The STBYMD pin is a three-state input that controls circuitry within the IC as follows: When the STBYMD pin is held at ground, the SS pin is pulled to ground. When the pin is left open, the internal SS current source charges the SS capacitor , allowing turn-on of the controller and activat- ing necessary internal biasing. When the STBYMD pin is taken above 2V , the internal linear regulator is turned on independent of the state on the RUN and SS pins, providing an output power source for “wake-up” circuitry. Bypass the pin with a small capacitor (0.1μF) to ground if the pin is not connected to a DC potential.

operation up to an input voltage of 36V . frequency is determined by the internal oscillator capacitor . such as ferrite and molypermalloy (from Magnetics, Inc.). use a toroid, pot core or shielded bobbin inductor . RSENSE is chosen based on the required output current.

3780 F07

Figure 7. Frequency vs PLLFL TR Pin Voltage

30% margin is usually recommended.

• VIN VOUT This formula has a maximum at V IN = 2V OUT, where IRMS = I OUT(MAX)/2. This simple worst-case condition is commonly used for design because even signifi cant deviations do not offer much relief. Note that ripple cur- rent ratings from capacitor manufacturers are often based on only 2000 hours of life which makes it advisable to derate the capacitor . In boost mode, the discontinuous current shifts from the input to the output, so C OUT must be capable of reducing the output voltage ripple. The effects of ESR (equivalent series resistance) and the bulk capacitance must be considered when choosing the right capacitor for a given output ripple voltage. The steady ripple due to charging and discharging the bulk capacitance is given by: Ripple (Boost,Cap)= IOUT(MAX) V OUT –V IN(MIN)( ) COUT VOUT f V Ripple (Buck,Cap)= IOUT(MAX) V IN(MAX ) –V OUT( ) COUT VIN(MAX) f V where COUT is the output fi lter capacitor . The steady ripple due to the voltage drop across the ESR is given by: ∆VBOOST ,ESR = IL(MAX,BOOST) • ESR ∆VBUCK,ESR = IL(MAX,BUCK) • ESR Multiple capacitors placed in parallel may be needed to meet the ESR and RMS current handling requirements. Dry tantalum, special polymer , aluminum electrolytic and ceramic capacitors are all available in surface mount packages. Ceramic capacitors have excellent low ESR characteristics but can have a high voltage coeffi cient. Capacitors are now available with low ESR and high ripple current ratings, such as OS-CON and POSCAP. VIN/VOUT (V) 0.1

100 IMAX(LOAD) • RSENSE (mV)

3780 F08

Figure 8. Load Current vs VIN/VOUT

capacitance CRSS and maximum current IDS(MAX). temperature, typically about 0.4%/°C as shown in Figure 9. the gate drive current and has an empirical value of 1.7. power dissipation unless a short occurs at the output.

3780 F09

Figure 9. Normalized RDS(ON) vs Temperature

Schottky Diode (D1, D2) Selection and Light Load Operation The Schottky diodes D1 and D2 shown in Figure 1 conduct during the dead time between the conduction of the power MOSFET switches. They are intended to prevent the body diode of synchronous switches B and D from turning on and storing charge during the dead time. In particular , D2 signifi cantly reduces reverse recovery current between switch D turn-off and switch C turn-on, which improves converter effi ciency and reduces switch C voltage stress. In order for the diode to be effective, the inductance between it and the synchronous switch must be as small as possible, mandating that these components be placed adjacently. In buck mode, when the FCB pin voltage is 0.85 < V FCB < 5V , the converter operates in skip-cycle mode. In this mode, synchronous switch B remains off until the induc- tor peak current exceeds one-fi fth of its maximum peak current. As a result, D1 should be rated for about one-half to one-third of the full load current. In boost mode, when the FCB pin voltage is higher than 5.3V , the converter operates in discontinuous current mode. In this mode, synchronous switch D remains off until the inductor peak current exceeds one-fi fth of its maximum peak current. As a result, D2 should be rated for about one-third to one-fourth of the full load current. In buck mode, when the FCB pin voltage is higher than 5.3V , the converter operates in constant frequency discontinu- ous current mode. In this mode, synchronous switch B remains on until the inductor valley current is lower than the sense voltage representing the minimum negative inductor current level (V SENSE = –5mV). Both switch A and B are off until next clock signal. In boost mode, when the FCB pin voltage is 0.85 < V FCB < 5.3V , the converter operates in Burst Mode operation. In this mode, the controller clamps the peak inductor current to approximately 20% of the maximum inductor current. The output voltage ripple can increase during Burst Mode operation. INTV CC Regulator An internal P-channel low dropout regulator produces 6V at the INTVCC pin from the VIN supply pin. INTVCC powers the drivers and internal circuitry within the L TC3780. The INTV CC pin regulator can supply a peak current of 40mA and must be bypassed to ground with a minimum of 4.7μF tantalum, 10μF special polymer or low ESR type electrolytic capacitor . A 1μF ceramic capacitor placed directly adjacent to the INTV CC and PGND IC pins is highly recommended. Good bypassing is necessary to supply the high transient current required by MOSFET gate drivers. Higher input voltage applications in which large MOSFETs are being driven at high frequencies may cause the maxi- mum junction temperature rating for the L TC3780 to be exceeded. The system supply current is normally dominated by the gate charge current. Additional external loading of the INTV CC also needs to be taken into account for the power dissipation calculations. The total INTVCC current can be supplied by either the 6V internal linear regulator or by the EXTV CC input pin. When the voltage applied to the EXTVCC pin is less than 5.7V , all of the INTVCC current is supplied by the internal 6V linear regulator . Power dis- sipation for the IC in this case is V IN • IINTVCC, and overall effi ciency is lowered. The junction temperature can be estimated by using the equations given in Note 2 of the Electrical Characteristics. For example, a typical application operating in continuous current mode might draw 24mA from a 24V supply when not using the EXTV CC pin: T J = 70°C + 24mA • 24V • 34°C/W = 90°C Use of the EXTV CC input pin reduces the junction tem- perature to: T J = 70°C + 24mA • 6V • 34°C/W = 75°C To prevent maximum junction temperature from being exceeded, the input supply current must be checked operating in continuous mode at maximum V IN.

The L TC3780 contains an internal P-channel MOSFET switch connected between the EXTVCC and INTVCC pins. When the voltage applied to EXTVCC rises above 5.7V , the internal regulator is turned off and a switch connects the EXTV CC pin to the INTVCC pin thereby supplying internal power . The switch remains closed as long as the voltage applied to EXTV CC remains above 5.5V . This allows the MOSFET driver and control power to be derived from the output when (5.7V < V OUT < 7V) and from the internal regulator when the output is out of regulation (start-up, short-circuit). If more current is required through the EXTV CC switch than is specifi ed, an external Schottky diode can be interposed between the EXTVCC and INTVCC pins. Ensure that EXTVCC ≤ VIN. The following list summarizes the three possible connec- tions for EXTV CC: 1. EXTVCC left open (or grounded). This will cause INTVCC to be powered from the internal 6V regulator at the cost of a small effi ciency penalty. 2. EXTV CC connected directly to VOUT (5.7V < VOUT < 7V). This is the normal connection for a 6V regulator and provides the highest effi ciency. 3. EXTV CC connected to an external supply. If an external supply is available in the 5.5V to 7V range, it may be used to power EXTV CC provided it is compatible with the MOSFET gate drive requirements. Output Voltage The L TC3780 output voltage is set by an external feedback resistive divider carefully placed across the output capacitor . The resultant feedback signal is compared with the internal precision 0.800V voltage reference by the error amplifi er . The output voltage is given by the equation: VV R ROUT =+ ⎛ ⎟08 1 2 Topside MOSFET Driver Supply (CA, DA, CB, DB) Referring to Figure 11, the external bootstrap capacitors CA and C B connected to the BOOST1 and BOOST2 pins supply the gate drive voltage for the topside MOSFET switches A and D. When the top MOSFET switch A turns on, the switch node SW2 rises to V IN and the BOOST2 pin rises to approximately VIN + INTVCC. When the bottom MOSFET switch B turns on, the switch node SW2 drops to low and the boost capacitor C B is charged through DB from INTVCC. When the top MOSFET switch D turns on, the switch node SW1 rises to VOUT and the BOOST1 pin rises to approximately VOUT + INTVCC. When the bottom MOSFET switch C turns on, the switch node SW1 drops to low and the boost capacitor C A is charged through DA from INTVCC. The boost capacitors C A and C B need to store about 100 times the gate charge required by the top MOSFET switch A and D. In most applications a 0.1μF to 0.47μF , X5R or X7R dielectric capacitor is adequate. Run Function The RUN pin provides simple ON/OFF control for the L TC3780. Driving the RUN pin above 1.5V permits the controller to start operating. Pulling RUN below 1.5V puts the L TC3780 into low current shutdown. Do not apply more than 6V to the RUN pin. Soft-Start Function Soft-start reduces the input power sources’ surge cur- rents by gradually increasing the controller’s current limit (proportional to an internally buffered and clamped equivalent of V ITH). An internal 1.2μA current source charges up the C SS capacitor . As the voltage on SS increases from 0V to 2.4V , the internal current limit rises from 0V/R SENSE to 150mV/RSENSE. The output current limit ramps up slowly, taking 1.5s/μF to reach full current. The output current thus ramps up slowly, eliminating the starting surge current required from the input power supply. TIRMP = 2.4V 1.2µA C SS = 1.5s/µF( ) C SS Do not apply more than 6V to the SS pin. Current foldback is disabled during soft-start until the voltage on CSS reaches 2V . Make sure CSS is large enough when there is loading during start-up.

The Standby Mode (STBYMD) Pin Function The standby mode (STBYMD) pin provides several choices for start-up and standby operational modes. If the pin is pulled to ground, the SS pin is internally pulled to ground, preventing start-up and thereby providing a single control pin for turning off the controller . If the pin is left open or bypassed to ground with a capacitor , the SS pin is internally provided with a starting current, permitting external control for turning on the controller . If the pin is connected to a voltage greater than 1.25V , the internal regulator (INTV CC) will be on even when the controller is shut down (RUN pin voltage < 1.5V). In this mode, the onboard 6V linear regulator can provide power to keep-alive functions such as a keyboard controller . Fault Conditions: Current Limit and Current Foldback The maximum inductor current is inherently limited in a current mode controller by the maximum sense voltage. In boost mode, maximum sense voltage and the sense resistance determines the maximum allowed inductor peak current, which is: IL(MAX,BOOST) = 160mV RSENSE In buck mode, maximum sense voltage and the sense resistance determines the maximum allowed inductor valley current, which is: IL(MAX,BUCK) = 130mV RSENSE To further limit current in the event of a short circuit to ground, the L TC3780 includes foldback current limiting. If the output falls by more than 30%, then the maximum sense voltage is progressively lowered to about one third of its full value. Fault Conditions: Overvoltage Protection A comparator monitors the output for overvoltage con- ditions. The comparator (OV) detects overvoltage faults greater than 7.5% above the nominal output voltage. When the condition is sensed, switches A and C are turned off, and switches B and D are turned on until the overvoltage condition is cleared. During an overvoltage condition, a negative current limit (V SENSE = –60mV) is set to limit negative inductor current. When the sensed current inductor current is lower than –60mV , switch A and C are turned on, and switch B and D are turned off until the sensed current is higher than –20mV . If the output is still in overvoltage condition, switch A and C are turned off, and switch B and D are turned on again. Effi ciency Considerations The percent effi ciency of a switching regulator is equal to the output power divided by the input power times 100%. It is often useful to analyze individual losses to determine what is limiting the effi ciency and which change would produce the most improvement. Although all dissipative elements in circuit produce losses, four main sources account for most of the losses in L TC3780 circuits: 1. DC I 2R losses. These arise from the resistances of the MOSFETs, sensing resistor , inductor and PC board traces and cause the effi ciency to drop at high output currents. 2. T ransition loss. This loss arises from the brief amount of time switch A or switch C spends in the saturated region during switch node transitions. It depends upon the input voltage, load current, driver strength and MOSFET capacitance, among other factors. The loss is signifi cant at input voltages above 20V and can be estimated from: T ransition Loss ≈ 1.7A –1 • VIN2 • IOUT • CRSS • f where C RSS is the reverse transfer capacitance.

1. INTVCC current. This is the sum of the MOSFET driver and control currents. This loss can be reduced by sup- plying INTV CC current through the EXTVCC pin from a high effi ciency source, such as an output derived boost network or alternate supply if available. 4. C IN and COUT loss. The input capacitor has the diffi cult job of fi ltering the large RMS input current to the regula- tor in buck mode. The output capacitor has the more diffi cult job of fi ltering the large RMS output current in boost mode. Both C IN and COUT are required to have low ESR to minimize the AC I 2R loss and suffi cient capacitance to prevent the RMS current from causing additional upstream losses in fuses or batteries. 5. Other losses. Schottky diode D1 and D2 are respon- sible for conduction losses during dead time and light load conduction periods. Inductor core loss occurs predominately at light loads. Switch C causes reverse recovery current loss in boost mode. When making adjustments to improve effi ciency, the input current is the best indicator of changes in effi ciency. If you make a change and the input current decreases, then the effi ciency has increased. If there is no change in input current, then there is no change in effi ciency. Design Example As a design example, assume V IN = 5V to 18V (12V nominal), VOUT = 12V (5%), IOUT(MAX) = 5A and f = 400kHz. Set the PLLFL TR pin at 2.4V for 400kHz operation. The inductance value is chosen fi rst based on a 30% ripple current assumption. In buck mode, the ripple current is: Δ= ⎛ ⎠⎟I V fL V VLB U C K OUT OUT IN , s sn1 IRIPPLE, BUCK = ΔIL, BUCKs100 IOUT The highest value of ripple current occurs at the maximum input voltage. In boost mode, the ripple current is: Δ= ⎛ ⎠⎟I V fL V VL BOOST IN IN OUT , s sn1 IRIPPLE, BOOST = ΔIL, BOOSTs100 IIN The highest value of ripple current occurs at VIN = VOUT/2. A 6.8μH inductor will produce 11% ripple in boost mode (VIN = 6V) and 29% ripple in buck mode (VIN = 18V). The RSENSE resistor value can be calculated by using the maximum current sense voltage specifi cation with some accommodation for tolerances. RSENSE = 2 s160mV sVIN(MIN) 2 sIOUT(MAX, BOOST) sVOUT +Δ IL, BOOSTsVIN(MIN) Select an RSENSE of 10mΩ. Output voltage is 12V . Select R1 as 20k. R2 is: R2 = VOUT R 1 0.8 –R 1 Select R2 as 280k. Both R1 and R2 should have a toler- ance of no more than 1%. Next, choose the MOSFET switches. A suitable choice is the Siliconix Si4840 (R DS(ON) = 0.009Ω (at V GS = 6V), CRSS = 150pF , θJA = 40°C/W). The maximum power dissipation of switch A occurs in boost mode when switch A stays on all the time. Assum- ing a junction temperature of T J = 150°C with ρ150°C = 1.5, the power dissipation at VIN = 5V is: PWA BOOST, ss s ..= ⎛ ⎠⎟ =12 5 5 1 5 0 009 1 94

in boost mode when its duty cycle is higher than 50%. ripple is 57mV (assuming ESR dominate ripple). COUT is chosen to fi lter the square current in boost mode. provides heat sinking for power components.

• The ground plane layer should not have any traces and it should be as close as possible to the layer with power MOSFETs. Place CIN, switch A, switch B and D1 in one com- pact area. Place C OUT, switch C, switch D and D2 in one compact area. One layout example is shown in Figure 10. GND VOUT COUT L RSENSE

3780 F10

Figure 10. Switches Layout

• Use immediate vias to connect the components (in- cluding the L TC3780’s SGND and PGND pins) to the ground plane. Use several large vias for each power component.
• Use planes for V IN and VOUT to maintain good voltage fi ltering and to keep power losses low.
• Flood all unused areas on all layers with copper . Flooding with copper will reduce the temperature rise of power components. Connect the copper areas to any DC net IN or GND).
• Segregate the signal and power grounds. All small- signal components should return to the SGND pin at one point, which is then tied to the PGND pin close to the sources of switch B and switch C.
• Place switch B and switch C as close to the controller as possible, keeping the PGND, BG and SW traces short.
• Keep the high dV/dT SW1, SW2, BOOST1, BOOST2, TG1 and TG2 nodes away from sensitive small-signal nodes.
• The path formed by switch A, switch B, D1 and the C IN capacitor should have short leads and PC trace lengths. The path formed by switch C, switch D, D2 and the C OUT capacitor also should have short leads and PC trace lengths.
• The output capacitor (–) terminals should be connected as close as possible the (–) terminals of the input capacitor .
• Connect the top driver boost capacitor C A closely to the BOOST1 and SW1 pins. Connect the top driver boost capacitor C B closely to the BOOST2 and SW2 pins.
• Connect the input capacitors C IN and output capacitors COUT closely to the power MOSFETs. These capaci- tors carry the MOSFET AC current in boost and buck mode.
• Connect V OSENSE pin resistive dividers to the (+) termi- nals of COUT and signal ground. A small VOSENSE bypass capacitor may be connected closely to the L TC3780 SGND pin. The R2 connection should not be along the high current or noise paths, such as the input capacitors.
• Route SENSE – and SENSE+ leads together with minimum PC trace spacing. Avoid sense lines pass through noisy area, such as switch nodes. The fi lter capacitor between SENSE + and SENSE – should be as close as possible to the IC. Ensure accurate current sensing with Kelvin connections at the SENSE resistor . One layout example is shown in Figure 12.
• Connect the I TH pin compensation network close to the IC, between ITH and the signal ground pins. The capaci- tor helps to fi lter the effects of PCB noise and output voltage ripple voltage from the compensation loop.
• Connect the INTV CC bypass capacitor , CVCC, close to the IC, between the INTVCC and the power ground pins. This capacitor carries the MOSFET drivers’ current peaks. An additional 1μF ceramic capacitor placed immediately next to the INTV CC and PGND pins can help improve noise performance substantially.

3780 F11

Figure 11. L TC3780 Layout Diagram1

3780 F12

Figure 12. Sense Lines Layout

24-Lead Plastic SSOP (5.3mm) (Reference L TC DWG # 05-08-1640) G24 SSOP 0204 0.09 – 0.25 (.0035 – .010) 0o – 8o 0.55 – 0.95 (.022 – .037) 5.00 – 5.60** (.197 – .221) 7.40 – 8.20 (.291 – .323) 1234 5 6 7 8 9 10 11 12 7.90 – 8.50* (.311 – .335) 2122 18 17 16 15 14 1319202324 2.0 (.079) MAX 0.05 (.002) MIN 0.65 (.0256) BSC 0.22 – 0.38 (.009 – .015) TYP MILLIMETERS (INCHES) DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED .152mm (.006") PER SIDE DIMENSIONS DO NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED .254mm (.010") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE 0.42 p0.03 0.65 BSC 5.3 – 5.77.8 – 8.2 RECOMMENDED SOLDER PAD LAYOUT 1.25 p0.12

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. PACKAGE DESCRIPTION 32-Lead Plastic QFN (5mm × 5mm) (Reference L TC DWG # 05-08-1693 Rev D) 5.00 p 0.10 (4 SIDES) NOTE: 1. DRAWING PROPOSED TO BE A JEDEC PACKAGE OUTLINE M0-220 VARIATION WHHD-(X) (TO BE APPROVED) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.20mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 0.40 p 0.10 BOTTOM VIEW—EXPOSED PAD

3.50 REF

(4-SIDES) 3.45 p 0.10 3.45 p 0.10 0.75 p 0.05 R = 0.115 TYP 0.25 p 0.05 (UH32) QFN 0406 REV D

0.50 BSC

0.200 REF

0.00 – 0.05 0.70 p0.05 (4 SIDES) 4.10 p0.05 5.50 p0.05 0.25 p 0.05 PACKAGE OUTLINE RECOMMENDED SOLDER PAD LAYOUT APPL Y SOLDER MASK TO AREAS THAT ARE NOT SOLDERED PIN 1 NOTCH R = 0.30 TYP OR 0.35 s 45o CHAMFER R = 0.05 TYP 3.45 p 0.05 3.45 p 0.05

3780 TA02

Figure 13. L TC3780 12V/5A, Buck-Boost Regulator