LTM4601HVIVPBF LINEAR_DIMENSIONS | Alldatasheet
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12A 28VIN DC/DC µModule Regulator with PLL, Output Tracking and Margining n Telecom and Networking Equipment n Servers n Industrial Equipment n Point of Load Regulation n Complete Switch Mode Power Supply n Wide Input Voltage Range: 4.5V to 28V n 12A DC Typical, 14A Peak Output Current n 0.6V to 5V Output Voltage n Output Voltage T racking and Margining n Parallel Multiple µModule® Regulators for Current Sharing n Differential Remote Sensing for Precision Regulation n PLL Frequency Synchronization n ±1.5% Regulation n Current Foldback Protection (Disabled at Start-Up) n RoHS Compliant with Pb-Free Finish, Gold Finish LGA (e4) or SAC 305 BGA (e1) n Ultrafast T ransient Response n Current Mode Control n Up to 95% Efficiency at 5VIN, 3.3VOUT n Programmable Soft-Start n Output Overvoltage Protection n Small Footprint, Low Profile (15mm × 15mm × 2.82mm) Surface Mount LGA and (15mm × 15mm × 3.42mm) BGA Packages 2.5V/12A Power Supply with 4.5V to 28V Input Efficiency and Power Loss vs Load Current The L TM®4601HV is a complete 12A step-down switch mode DC/DC power supply with onboard switching control- ler , MOSFETs, inductor and all support components. The µModule regulator is housed in small surface mount 15mm × 15mm × 2.82mm LGA and 15mm × 15mm × 3.42mm BGA packages. Operating over an input voltage range of 4.5V to 28V , the L TM4601HV supports an output voltage range of 0.6V to 5V as well as output voltage tracking and margining. The high efficiency design delivers 12A continuous current (14A peak). Only bulk input and output capacitors are needed to complete the design. The low profile and light weight package easily mounts in unused space on the back side of PC boards for high density point of load regulation. The µModule regulator can be synchronized with an external clock for reducing undesirable frequency harmonics and allows PolyPhase operation for high load currents. A high switching frequency and adaptive on-time current mode architecture deliver a very fast transient response to line and load changes without sacrificing stability. An onboard differential remote sense amplifier can be used to accurately regulate an output voltage independent of load current. L, L T , L TC, L TM, Linear Technology, the Linear logo, µModule and PolyPhase are registered trademarks and L TpowerCAD is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Protected by U.S. Patents including 5481178, 5847554, 6580258, 6304066, 6476589, 6774611, 6677210. TYPICAL APPLICATION FEATURES DESCRIPTION
APPLICATIONS
VOUT_LCL DIFFVOUT VOSNS+ VOSNS– PGOOD RUN COMP INTV CC DRVCC MPGM TRACK/SSPLLIN L TM4601HV ON/OFF 392k RSET 19.1k MARGIN CONTROL C OUT 4601HV TA01a VOUT 2.5V 12A CLOCK SYNC TRACK/SS CONTROL 100pF CIN VIN fSETPGNDSGND 5% MARGIN VIN 4.5V TO 28V LOAD CURRENT (A) EFFICIENCY (%) POWER LOSS (W) 12VIN 12VIN 24VIN 24VIN 4 8 10 4601HV TA01b 2 6 12 14 POWER LOSS EFFICIENCY
INTVCC, DRVCC, VOUT_LCL, VOUT (VOUT ≤ 3.3V with PLLIN, TRACK/SS, MPGM, MARG0, MARG1, (Note 1) LEAD FREE FINISH TRAY PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L TM4601HVEV#PBF L TM4601HVEV#PBF L TM4601HVV 118-Lead (15mm × 15mm × 2.82mm) LGA –40°C to 85°C L TM4601HVIV#PBF L TM4601HVIV#PBF L TM4601HVV 118-Lead (15mm × 15mm × 2.82mm) LGA –40°C to 85°C L TM4601HVEY#PBF L TM4601HVEY#PBF L TM4601HVY 118-Lead (15mm × 15mm × 3.42mm) BGA –40°C to 85°C L TM4601HVIY#PBF L TM4601HVIY#PBF L TM4601HVY 118-Lead (15mm × 15mm × 3.42mm) BGA –40°C to 85°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ This product is only offered in trays. For more information go to: http://www.linear .com/packaging/ ABSOLUTE MAXIMUM RATINGS ORDER INFORMATION Operating Temperature Range (Note 2)....–40°C to 85°C MARG1 DRVCC VFB PGOOD SGND VOSNS+ DIFFVOUT VOUT_LCL VOSNS– VIN PGND VOUT fSET MARG0 RUN COMP MPGM PLLIN INTV CC TRACK/SS LGA PACKAGE 118-LEAD (15mm × 15mm × 2.82mm) TOP VIEW TJMAX = 125°C, θJA = 15°C/W , θJC = 6°C/W , θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.7g MARG1 DRVCC VFB PGOOD SGND VOSNS+ DIFFVOUT VOUT_LCL VOSNS– VIN PGND VOUT fSET MARG0 RUN COMP MPGM PLLIN INTV CC TRACK/SS BGA PACKAGE 118-LEAD (15mm × 15mm × 3.42mm) TOP VIEW TJMAX = 125°C, θJA = 15.5°C/W , θJC = 6.5°C/W , θJA DERIVED FROM 95mm × 76mm PCB WITH 4 LAYERS WEIGHT = 1.9g PIN CONFIGURATION
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN(DC) Input DC Voltage l 4.5 28 V VOUT(DC) Output Voltage (With Remote Sense Amp) CIN = 10µF ×3, COUT = 200µF , RSET = 40.2k VIN = 12V , VOUT = 1.5V , IOUT = 0 l 1.478 1.5 1.522 V Input Specifications VIN(UVLO) Undervoltage Lockout Threshold IOUT = 0A 3.2 4 V IINRUSH(VIN) Input Inrush Current at Startup IOUT = 0A. VOUT = 1.5V VIN = 5V VIN = 12V 0.6 0.7 A A I Q(VIN,NO LOAD) Input Supply Bias Current VIN = 12V , No Switching VIN = 12V , VOUT = 1.5V , Switching Continuous VIN = 5V , No Switching VIN = 5V , VOUT = 1.5V , Switching Continuous Shutdown, RUN = 0, VIN = 12V 3.8 2.5 mA mA mA mA µA I S(VIN) Input Supply Current VIN = 12V , VOUT = 1.5V , IOUT = 12A VIN = 12V , VOUT = 3.3V , IOUT = 12A VIN = 5V , VOUT = 1.5V , IOUT = 12A 1.81 3.63 4.29 A A A INTV CC VIN = 12V , RUN > 2V No Load 4.7 5 5.3 V Output Specifications IOUTDC Output Continuous Current Range VIN = 12V , VOUT = 1.5V (Note 5) 0 12 A ΔVOUT(LINE) VOUT Line Regulation Accuracy VOUT = 1.5V , IOUT = 0A, VIN from 4.5V to 28V l 0.3 % ΔVOUT(LOAD) VOUT Load Regulation Accuracy VOUT = 1.5V , IOUT = 0A to 12A, with RSA (Note 5) VIN = 5V VIN = 12V l l 0.25 0.25 V OUT(AC) Output Ripple Voltage IOUT = 0A, COUT = 2× 100µF X5R Ceramic VIN = 12V , VOUT = 1.5V VIN = 5V , VOUT = 1.5V mV P-P mVP-P fS Output Ripple Voltage Frequency IOUT = 5A, VIN = 12V , VOUT = 1.5V 850 kHz ΔVOUT(START) Turn-On Overshoot COUT = 200µF , VOUT = 1.5V , IOUT = 0A, TRACK/SS = 10nF VIN = 12V VIN = 5V mV mV t START Turn-On Time COUT = 200µF , VOUT = 1.5V , TRACK/SS = Open, IOUT = 1A Resistive Load VIN = 12V VIN = 5V 0.5 0.5 ms ms ΔV OUTLS Peak Deviation for Dynamic Load Load: 0% to 50% to 0% of Full Load, C OUT = 2 × 22µF Ceramic, 470µF 4V Sanyo POSCAP VIN = 12V VIN = 5V mV mV t SETTLE Settling Time for Dynamic Load Step Load: 0% to 50%, or 50% to 0% of Full Load VIN = 12V µs IOUTPK Output Current Limit COUT = 200µF Ceramic VIN = 12V , VOUT = 1.5V VIN = 5V , VOUT = 1.5V A A The l denotes the specifications which apply over the –40°C to 85°C temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V , per typical application (front page) configuration, RSET = 40.2k.
ELECTRICAL CHARACTERISTICS
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Remote Sense Amp (Note 3) VOSNS+, VOSNS– CM Range Common Mode Input Voltage Range VIN = 12V , RUN > 2V 0 INTVCC – 1 V DIFFVOUT Range Output Voltage Range VIN = 12V , DIFFVOUT Load = 100k 0 INTVCC – 1 V VOS Input Offset Voltage Magnitude 1.25 mV AV Differential Gain 1 V/V GBP Gain Bandwidth Product 3 MHz SR Slew Rate 2 V/µs RIN Input Resistance VOSNS+ to GND 20 kW CMRR Common Mode Rejection Mode 100 dB Control Stage V FB Error Amplifier Input Voltage Accuracy IOUT = 0A, VOUT = 1.5V l 0.594 0.6 0.606 V VRUN RUN Pin On/Off Threshold 1 1.5 1.9 V ITRACK/SS Soft-Start Charging Current VTRACK/SS = 0V –1.0 –1.5 –2.0 µA tON(MIN) Minimum On Time (Note 4) 50 100 ns tOFF(MIN) Minimum Off Time (Note 4) 250 400 ns RPLLIN PLLIN Input Resistance 50 kW IDRVCC Current into DRVCC Pin VOUT = 1.5V , IOUT = 1A, DRVCC = 5V 18 25 mA RFBHI Resistor Between VOUT_LCL and VFB 60.098 60.4 60.702 kW VMPGM Margin Reference Voltage 1.18 V VMARG0, VMARG1 MARG0, MARG1 Voltage Thresholds 1.4 V PGOOD Output ΔVFBH PGOOD Upper Threshold VFB Rising 7 10 13 % ΔVFBL PGOOD Lower Threshold VFB Falling –7 –10 –13 % ΔVFB(HYS) PGOOD Hysteresis VFB Returning 1.5 % The l denotes the specifications which apply over the –40°C to 85°C temperature range (Note 2), otherwise specifications are at TA = 25°C, VIN = 12V , per typical application (front page) configuration, RSET = 40.2k. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The L TM4601HV is tested under pulsed load conditions such that T J ≈ TA. The L TM4601HVE is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. The L TM4601HVI is guaranteed over the –40°C to 85°C temperature range. Note 3: Remote sense amplifier recommended for ≤3.3V output. Note 4: 100% tested at wafer level only. Note 5: See output current derating curves for different V IN, VOUT and TA.
Efficiency vs Load Current with 5VIN Efficiency vs Load Current with 12VIN Efficiency vs Load Current with 24VIN 1.2V T ransient Response 1.5V T ransient Response 2.5V T ransient Response 3.3V T ransient Response (See Figures 19 and 20 for all curves) 1.8V T ransient Response TYPICAL PERFORMANCE CHARACTERISTICS LOAD CURRENT (A) EFFICIENCY (%)75 4601HV G01 5 10 100 0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT LOAD CURRENT (A) EFFICIENCY (%) 100 5 10 4601HV G02 0.6VOUT 1.2VOUT 1.5VOUT 2.5VOUT 3.3VOUT 5VOUT LOAD CURRENT (A) EFFICIENCY (%) 5 10 4601HV G03 1.5VOUT 2.5VOUT 3.3VOUT 5.0VOUT VOUT 50mV/DIV 20µs/DIV 4601HV G04 0A TO 6A LOAD STEP 1.2V AT 6A/µs LOAD STEP COUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601HV G05 0A TO 6A LOAD STEP 1.5V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601HV G06 0A TO 6A LOAD STEP 1.8V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601HV G07 0A TO 6A LOAD STEP 2.5V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF VOUT 50mV/DIV 20µs/DIV 4601 G08 0A TO 6A LOAD STEP 3.3V AT 6A/µs LOAD STEP C OUT = 3 • 22µF 6.3V CERAMICS 470µF 4V SANYO POSCAP C3 = 100pF
(See Figures 19 and 20 for all curves) Start-Up, IOUT = 12A (Resistive Load)Start-Up, IOUT = 0A VIN to VOUT Step-Down Ratio Short-Circuit Protection, IOUT = 0A Short-Circuit Protection, IOUT = 12A T rack, IOUT = 12A TYPICAL PERFORMANCE CHARACTERISTICS VOUT 0.5V/DIV 5ms/DIV 4601HV G09 IIN 0.5A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VOUT 0.5V/DIV 2ms/DIV 4601HV G10 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF INPUT VOL TAGE (V) OUTPUT VOL TAGE (V) 3.0 4.0 5.5 5.0 4601HV G11 2.0 1.0 2.5 3.5 4.5 1.5 0.5 4 2 8 6 12 14 1810 20 22 24 3.3V OUTPUT WITH 130k FROM VOUT TO ION 5V OUTPUT WITH 100k RESISTOR ADDED FROM fSET TO GND 5V OUTPUT WITH NO RESISTOR ADDED FROM fSET TO GND 2.5V OUTPUT 1.8V OUTPUT 1.5V OUTPUT 1.2V OUTPUT VFB 0.5V/DIV TRACK/SS 0.5V/DIV 2ms/DIV 4601HV G12 VOUT 1V/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VOUT 0.5V/DIV 50µs/DIV 4601HV G13 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF VOUT 0.5V/DIV 50µs/DIV 4601HV G14 IIN 1A/DIV VIN = 12V VOUT = 1.5V COUT = 470µF , 3 × 22µF SOFT-START = 10nF
(See Package Description for Pin Assignment) VIN (Bank 1): Power Input Pins. Apply input voltage be - tween these pins and PGND pins. Recommend placing input decoupling capacitance directly between V IN pins and PGND pins. VOUT (Bank 3): Power Output Pins. Apply output load between these pins and PGND pins. Recommend placing output decoupling capacitance directly between these pins and PGND pins. See Figure 17. PGND (Bank 2): Power ground pins for both input and output returns. V OSNS– (Pin M12): (–) Input to the Remote Sense Ampli- fier . This pin connects to the ground remote sense point. The remote sense amplifier is used for VOUT ≤3.3V . Tie to INTVCC if not used. VOSNS+ (Pin J12): (+) Input to the Remote Sense Ampli- fier . This pin connects to the output remote sense point. The remote sense amplifier is used for V OUT ≤3.3V . Tie to ground if not used. DIFFVOUT (Pin K12): Output of the Remote Sense Ampli- fier . This pin connects to the VOUT_LCL pin. Leave floating if remote sense amplifier is not used. DRV CC (Pin E12): This pin normally connects to INTV CC for powering the internal MOSFET drivers. This pin can be biased up to 6V from an external supply with about 50mA capability, or an external circuit as shown in Figure 18. This improves efficiency at the higher input voltages by reducing power dissipation in the module. INTV CC (Pin A7): This pin is for additional decoupling of the 5V internal regulator . PLLIN (Pin A8): External Clock Synchronization Input to the Phase Detector . This pin is internally terminated to SGND with a 50k resistor . Apply a clock with a high level above 2V and below INTV CC. See the Applications Information section. TRACK/SS (Pin A9): Output Voltage T racking and Soft- Start Pin. When the module is configured as a master output, then a soft-start capacitor is placed on this pin to ground to control the master ramp rate. A soft-start capacitor can be used for soft-start turn on of a stand alone regulator . Slave operation is performed by putting a resistor divider from the master output to ground, and connecting the center point of the divider to this pin. See the Applications Information section. MPGM (Pin A12): Programmable Margining Input. A re- sistor from this pin to ground sets a current that is equal to 1.18V/R. This current multiplied by 10k W will equal a value in millivolts that is a percentage of the 0.6V refer - ence voltage. See Applications Information. To parallel L TM4601HVs, each requires an individual MPGM resistor . Do not tie MPGM pins together . f SET (Pin B12): Frequency Set Internally to 850kHz. An external resistor can be placed from this pin to ground to increase frequency. See the Applications Information section for frequency adjustment. V FB (Pin F12): The Negative Input of the Error Amplifier . Internally, this pin is connected to V OUT_LCL pin with a 60.4k precision resistor . Different output voltages can be programmed with an additional resistor between VFB and SGND pins. See the Applications Information section. MARG0 (Pin C12): This pin is the LSB logic input for the margining function. Together with the MARG1 pin it will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See the Applications Information section. MARG1 (Pin D12): This pin is the MSB logic input for the margining function. Together with the MARG0 pin it will determine if margin high, margin low or no margin state is applied. The pin has an internal pull-down resistor of 50k. See the Applications Information section. PIN FUNCTIONS
(See Package Description for Pin Assignment)PIN FUNCTIONS SGND (Pin H12): Signal Ground. This pin connects to PGND at output capacitor point. See Figure 17. COMP (Pin A11): Current Control Threshold and Error Amplifier Compensation Point. The current comparator threshold increases with this control voltage. The voltage ranges from 0V to 2.4V with 0.7V corresponding to zero sense voltage (zero current). PGOOD (Pin G12): Output Voltage Power Good Indicator . Open-drain logic output that is pulled to ground when the output voltage is not within ±10% of the regulation point, after a 25µs power bad mask timer expires. RUN (Pin A10): Run Control Pin. A voltage above 1.9V will turn on the module, and when below 1V , will turn off the module. A programmable UVLO function can be accomplished by connecting to a resistor divider from V IN to ground. See Figure 1. This pin has a 5.1V Zener to ground. Maximum pin voltage is 5V . Limit current into the RUN pin to less than 1mA. V OUT_LCL (Pin L12): VOUT connects directly to this pin to bypass the remote sense amplifier , or DIFFVOUT connects to this pin when remote sense amplifier is used.
Figure 1. Simplified L TM4601HV Block Diagram
The L TM4601HV is a standalone nonisolated switching mode DC/DC power supply. It can deliver up to 12A of DC output current with some external input and output capacitors. This module provides a precisely regulated output voltage programmable via one external resistor from 0.6V DC to 5.0V DC over a 4.5V to 28V wide input voltage. The typical application schematics are shown in Figures 19 and 20. The L TM4601HV has an integrated constant on-time current mode regulator , ultralow R DS(ON) FETs with fast switching speed and integrated Schottky diodes. The typical switching frequency is 850kHz at full load. With current mode control and internal feedback loop compensation, the L TM4601HV module has sufficient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors, even all ceramic output capacitors. Current mode control provides cycle-by-cycle fast current limit. Besides, foldback current limiting is provided in an overcurrent condition while V FB drops. Internal overvolt- age and undervoltage comparators pull the open-drain PGOOD output low if the output feedback voltage exits a ±10% window around the regulation point. Furthermore, in an overvoltage condition, internal top FET Q1 is turned off and bottom FET Q2 is turned on and held on until the overvoltage condition clears. Pulling the RUN pin below 1V forces the controller into its shutdown state, turning off both Q1 and Q2. At low load current, the module works in continuous current mode by default to achieve minimum output voltage ripple. When DRV CC pin is connected to INTV CC an integrated 5V linear regulator powers the internal gate drivers. If a 5V external bias supply is applied on the DRVCC pin, then an efficiency improvement will occur due to the reduced power loss in the internal linear regulator . This is especially true at the high end of the input voltage range. The L TM4601HV has a very accurate differential remote sense amplifier with very low offset. This provides for very accurate output voltage sensing at the load. The MPGM pin, MARG0 pin and MARG1 pin are used to support voltage margining, where the percentage of margin is programmed by the MPGM pin, and MARG0 and MARG1 select margining. The PLLIN pin provides frequency synchronization of the device to an external clock. The TRACK/SS pin is used for power supply tracking and soft-start programming. OPERATION
requirements for a particular application. down ratio that can be achieved for a given input voltage. The PWM controller has an internal 0.6V reference voltage. Table 1. RSET Standard 1% Resistor Values vs VOUT RPGM resistor on the MPGM pin programs the current.
- 10k where RPGM is the resistor value to place on the MPGM pin to ground. The margining voltage, V OUT(MARGIN), will be added or subtracted from the nominal output voltage as determined by the state of the MARG0 and MARG1 pins. See the truth table below: MARG1 MARG0 MODE LOW LOW NO MARGIN LOW HIGH MARGIN UP HIGH LOW MARGIN DOWN HIGH HIGH NO MARGIN Input Capacitors L TM4601HV module should be connected to a low AC impedance DC source. Input capacitors are required to be placed adjacent to the module. In Figure 20, the 10µF ceramic input capacitors are selected for their ability to handle the large RMS current into the converter . An input bulk capacitor of 100µF is optional. This 100µF capacitor is only needed if the input source impedance is compro- mised by long inductive leads or traces. For a buck converter , the switching duty-cycle can be estimated as: D= VOUT VIN APPLICATIONS INFORMATION
gether used as a high frequency input decoupling capacitor . current for the external input capacitors. The L TM4601HV is designed for low output ripple voltage. to maximize transient performance. Figure 2. Normalized Input RMS Ripple Current
The RUN pin is used to enable the power module. The pin has an internal 5.1V Zener to ground. The pin can be driven with a logic input not to exceed 5V . The RUN pin can also be used as an undervoltage lock out (UVLO) function by connecting a resistor divider from the input supply to the RUN pin: VUVLO = R1+ R2 R2 •1.5V See Figure 1, Simplified Block Diagram. Power Good The PGOOD pin is an open-drain pin that can be used to monitor valid output voltage regulation. This pin monitors a ±10% window around the regulation point and tracks with margining. COMP Pin This pin is the external compensation pin. The module has already been internally compensated for most output voltages. Table 2 is provided for most application require- ments. L TpowerCAD is available for other control loop optimization. PLLIN The power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector . This allows the internal top MOSFET turn-on to be locked to the rising edge of the external clock. The frequency range is ±30% around the operating frequency of 850kHz. A pulse detection circuit is used to detect a clock on the PLLIN pin to turn on the phase-locked loop. The pulse width of the clock has to be at least 400ns and at least 2V in amplitude. The PLLIN pin must be driven from a low impedance source such as a logic gate located close to the pin. During the start-up of the regulator , the phase-locked loop function is disabled. INTV CC and DRVCC Connection An internal low dropout regulator produces an internal 5V supply that powers the control circuitry and DRV CC for driving the internal power MOSFETs. Therefore, if the system does not have a 5V power rail, the L TM4601HV can be directly powered by V IN. The gate driver current through the LDO is about 20mA. The internal LDO power dissipation can be calculated as: PLDO_LOSS = 20mA • (VIN – 5V) The L TM4601HV also provides the external gate driver voltage pin DRV CC. If there is a 5V rail in the system, it is recommended to connect DRV CC pin to the external 5V rail. This is especially true for higher input voltages. Do not apply more than 6V to the DRV CC pin. A 5V output can be used to power the DRV CC pin with an external circuit as shown in Figure 18. Parallel Operation of the Module The L TM4601HV device is an inherently current mode controlled device. Parallel modules will have very good current sharing. This will balance the thermals on the design. The voltage feedback equation changes with the variable N as modules are paralleled: VOUT = 0.6V • 60.4k N + RSET RSET or equivalently: RSET = 60.4k N VOUT 0.6V − 1 where N is the number of paralleled modules. Figure 21 shows two L TM4601HV modules used in a par- allel design. An L TM4601HV device can be used without the remote sense amplifier . APPLICATIONS INFORMATION
**Table 2. Output Voltage Response Versus Component Matrix* (Refer to Figures 19 and 20), 0A to 6A Load Step**
- X7R is recommended for extended temperature range.
- (1/Frequency) equates to a 400ns on-time, and a 400ns off-time. The “V IN to VOUT Step-Down Ratio Curve” reflects an operating range of 10V to 28V for 1.24MHz operation with a 100k resistor to ground as shown in Figure 18, and an 8V to 16V operation for f SET floating. These modifica- tions are made to provide wider input voltage ranges for the 5V output designs while limiting the inductor ripple current, and maintaining the 400ns minimum off-time. Example for 3.3V Output L TM4601HV minimum on-time = 100ns tON = ((VOUT • 10pF)/IfSET) L TM4601HV minimum off-time = 400ns tOFF = t – tON, where t = 1/Frequency Duty Cycle (DC) = tON/t or VOUT/VIN Equations for setting frequency: IfSET = (VIN/(3 • RfSET)), for 28V operation, IfSET = 238µA, tON = ((3.3 • 10pF)/IfSET), tON = 138.7ns, where the internal RfSET is 39.2k. Frequency = (VOUT/(VIN • tON)) = (3.3V/(28 • 138.7ns)) ~ 850kHz. The minimum on-time and minimum off-time are within specification at 139ns and 1037ns. The 4.5V minimum input for converting 3.3V output will not meet the minimum off-time specification of 400ns. t ON = 868ns, Frequency = 850kHz, tOFF = 315ns. Solution Lower the switching frequency at lower input voltages to allow for higher duty cycles, and meet the 400ns minimum off-time at 4.5V input voltage. The off-time should be about 500ns, which includes a 100ns guard band. The duty cycle for (3.3V/4.5V) = ~73%. Frequency = (1 – DC)/t OFF or (1 – 0.73)/500ns = 540kHz. The switching frequency needs to be lowered to 540kHz at 4.5V input. t ON = DC/ frequency, or 1.35µs. The f SET pin voltage compliance is 1/3 of VIN, and the IfSET current equates to 38µA with the internal 39.2k. The IfSET current needs to be 24µA for 540kHz operation. As shown in Figure 19, a resistor can be placed from V OUT to f SET to lower the effective I fSET current out of the fSET pin to 24µA. The fSET pin is 4.5V/3 =1.5V and VOUT = 3.3V , therefore 130k will source 14µA into the f SET node and lower the I fSET current to 24µA. This enables the 540kHz operation and the 4.5V to 28V input operation for down converting to 3.3V output. The frequency will scale from 540kHz to 1.1 MHz over this input range. This provides for an effective output current of 8A over the input range. APPLICATIONS INFORMATION
Figure 18. 5V at 8A Design Without Differential Amplifier
Figure 21. 2-Phase Parallel, 3.3V at 20A Design *C5 OPTIONAL TO REDUCE ANY LC RINGING.
Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings. NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JESD MS-028 AND JEP95 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW PIN 1 SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW BGA 118 0112 REV A L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A 0.0000 0.0000 DETAIL A Øb (118 PLACES) DETAIL B SUBSTRATE 0.27 – 0.37 2.45 – 2.55 // bbb Z D A ccc Z DETAIL B PACKAGE SIDE VIEW MOLD CAP Z M X Y Z ddd M Z eee 0.630 ±0.025 Ø 118x SYMBOL A b D E e F G aaa bbb ccc ddd eee MIN 3.22 0.50 2.72 0.60 0.60 NOM 3.42 0.60 2.82 0.75 0.63 15.0 15.0 1.27 13.97 13.97 MAX 3.62 0.70 2.92 0.90 0.66 0.15 0.10 0.20 0.30 0.15 NOTES DIMENSIONS TOTAL NUMBER OF BALLS: 118 E b e e b F G 118-Lead (15mm × 15mm × 3.42mm) (Reference LTC DWG # 05-08-1903 Rev A) 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 F G HM L J K E A B C D
Please refer to http://www.linear .com/designtools/packaging/ for the most recent package drawings. NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JESD MS-028 AND JEP95 5. PRIMARY DATUM -Z- IS SEATING PLANE DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW C(0.30) PAD 1 SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW LGA 118 1011 REV A L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A 0.0000 0.0000 D 0.630 ±0.025 Ø 118x E b e e b F G 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 6.9850 F G HM L J K E A B C D DETAIL A 0.630 ±0.025 SQ. 118x 118-Lead (15mm × 15mm × 2.82mm) (Reference LTC DWG # 05-08-1801 Rev A) DETAIL B PACKAGE SIDE VIEW bbb Z S Y X eee SYMBOL A b D E e F G aaa bbb eee MIN 2.72 0.60 0.27 2.45 NOM 2.82 0.63 15.00 15.00 1.27 13.97 13.97 0.32 2.50 MAX 2.92 0.66 0.37 2.55 0.15 0.10 0.05 NOTES DIMENSIONS TOTAL NUMBER OF LGA PADS: 118 DETAIL B SUBSTRATEMOLD CAP Z A
Table 5. Pin Assignment (Arranged by Pin Number)
Table 6. Pin Assignment (Arranged by Pin Function)
Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER B 03/12 Revised entire data sheet to include the BGA package. 1–30 (Revision history begins at Rev B)
LINEAR TECHNOLOGY CORPORATION 2007 LT 0312 REV B • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com PACKAGE PHOTOS This product contains technology licensed from Silicon Semiconductor Corporation. RELATED PARTS 15mm 15mm 2.82mm 15mm 15mm 3.42mm PART NUMBER DESCRIPTION COMMENTS L TM4628 26V , Dual 8A, DC/DC Step-Down μModule Regulator 4.5V ≤ VIN ≤ 26.5V , 0.6V ≤ VOUT ≤ 5V , Remote Sense Amplifier , Internal Temperature Sensing Output, 15mm × 15mm × 4.32mm LGA L TM4627 20V , 15A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 20V , 0.6V ≤ VOUT ≤ 5V , PLL Input, VOUT T racking, Remote Sense Amplifier , 15mm × 15mm × 4.32mm LGA L TM4611 1.5VIN(MIN), 15A DC/DC Step-Down μModule Regulator 1.5V ≤ VIN ≤ 5.5V , 0.8V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking, 15mm × 15mm × 4.32mm LGA L TM4613 8A EN55022 Class B DC/DC Step-Down μModule Regulator 5V ≤ V IN ≤ 36V , 3.3V ≤ VOUT ≤ 15V , PLL Input, VOUT T racking and Margining, 15mm × 15mm × 4.32mm LGA L TM4601AHV 28V , 12A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 28V , 0.6V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking and Margining, 15mm × 15mm × 2.82mm LGA or 15mm × 15mm × 3.42mm BGA L TM4601A 20V , 12A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 20V , 0.6V ≤ VOUT ≤ 5V , PLL Input, Remote Sense Amplifier , VOUT T racking and Margining, 15mm × 15mm × 2.82mm LGA or 15mm × 15mm × 3.42mm BGA L TM8027 60V , 4A DC/DC Step-Down μModule Regulator 4.5V ≤ V IN ≤ 60V , 2.5V ≤ VOUT ≤ 24V , CLK Input, 15mm × 15mm × 4.32mm LGA L TM8032 36V , 2A EN55022 Class B DC/DC Step-Down μModule Regulator 3.6V ≤ V IN ≤ 36V , 0.8V ≤ VOUT ≤ 10V , Synchronizable, 9mm × 15mm × 2.82mm LGA or 9mm × 15mm × 3.42mm BGA L TM8061 32V , 2A Step-Down μModule Battery Charger with Programmable Input Current Limit Compatible with Single Cell or Dual Cell Li-Ion or Li-Poly Battery Stacks (4.1V , 4.2V , IN ≤ 32V , C/10 or Adjustable Timer Charge Termination, NTC Resistor Monitor Input, 9mm × 15mm × 4.32mm LGA