LTM2883

LTM2883 SPI/Digital or I2C µModule Isolator with Adjustable ±12.5V and 5V Regulated Power

Document overview

• Manufacturer or author: Analog Devices, Inc,
• PDF pages: 36

Technical content

2883fdFor more information www.linear .com/L TM2883 TYPICAL APPLICATION FEATURES DESCRIPTION SPI/Digital or I2C µModule Isolator with Adjustable ±12.5V and 5V Regulated Power The LT M®2883 is a complete galvanic 6-channel digital µModule® (micromodule) isolator. No external components are required. A single 3.3V or 5V supply powers both sides of the interface through an integrated, isolated DC/ DC converter. A logic supply pin allows easy interfacing with different logic levels from 1.62V to 5.5V, independent of the main supply. Available options are compliant with SPI and I2C (master mode only) specifications. The isolated side includes ±12.5V and 5V nominal power supplies, each capable of providing more than 20mA of load current. Each supply may be adjusted from its nominal value using a single external resistor. Coupled inductors and an isolation power transformer provide 2500VRMS of isolation between the input and out- put logic interface. This device is ideal for systems where the ground loop is broken, allowing for a large common mode voltage range. Communication is uninterrupted for common mode transients greater than 30kV/μs. All registered trademarks and trademarks are the property of their respective owners. Isolated 4MHz SPI Interface

APPLICATIONS

n 2500V RMS for One Minute per UL1577 UL Recognized ® File #E151738 n Isolated Adjustable DC Power: 3V to 5V at Up to 30mA ±12.5V at Up to 20mA n No External Components Required n SPI (LTM2883-S) or I2C (LTM2883-I) Options n High Common Mode T ransient Immunity: 30kV/μs n High Speed Operation: 10MHz Digital Isolation 4MHz/8MHz SPI Isolation 400kHz I 2C Isolation n 3.3V (LTM2883-3) or 5V (LTM2883-5) Operation n 1.62V to 5.5V Logic Supply n ±10kV ESD HBM Across the Isolation Barrier n Maximum Continuous Working Voltage: 560VPEAK n Low Current Shutdown Mode (<10µA) n Low Profile (15mm × 11.25mm × 3.42mm) n Isolated SPI or I2C Interfaces n Industrial Systems n Test and Measurement Equipment n Breaking Ground Loops LTM2883 Operating Through 35kV/µs CM T ransient

2883 TA01a

AV– AVCC2 VCC2 SDO SDO2SDO SDO DO1 I1 ISOLATION BARRIER 5V AT 20mA 12.5V AT 20mA –12.5V AT 15mA 20ns/DIV 2V/DIV 2V/DIV SCK SD0 SCK2 = SD02 200V/DIV

2883 TA01b

2883fd For more information www.linear .com/L TM2883 ABSOLUTE MAXIMUM RATINGS Logic Inputs DI1, SCK, SDI, CS, SCL, SDA, SDOE, I1, I2, SDA2, (Note 1) Logic Outputs O1, SCK2, SDI2, CS2, Operating Temperature Range (Note 4) LTM2883-I LTM2883-S VCCGNDDO1 AV+AV–GND2I1 BGA PACKAGE 32-PIN (15mm × 11.25mm × 3.42mm) TOP VIEW AVCC2 F G H L J K E A B C D 21 43 5 6 7 8 DNCDO2 SDASCL DI1 GND ON VL DNCI2 SDA2SCL2 O1 VCC2 V– V+ TJMAX = 125°C, θJA = 30°C/W, θJC(BOTTOM) = 15.7°C/W, θJC(TOP) = 25°C/W, θJBOARD = 14.5°C/W θ VALUES DETERMINED PER JESD51-9, WEIGHT = 1.2g VCCGNDDO1 AV+AV–GND2I1 BGA PACKAGE 32-PIN (15mm × 11.25mm × 3.42mm) TOP VIEW AVCC2 F G H L J K E A B C D 21 43 5 6 7 8 DO2SDO SDISCK CS SDOE ON VL I2SDO2 SDI2SCK2 CS2 VCC2 V– V+ TJMAX = 125°C, θJA = 30°C/W, θJC(BOTTOM) = 15.7°C/W, θJC(TOP) = 25°C/W, θJBOARD = 14.5°C/W θ VALUES DETERMINED PER JESD51-9, WEIGHT = 1.2g PIN CONFIGURATION

2883fdFor more information www.linear .com/L TM2883 ORDER INFORMATION ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted. Specifications apply to all options unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supplies VCC Input Supply Range LTM2883-3 LTM2883-5 l l 4.5 3.3 3.6 5.5 V V VL Logic Supply Range LTM2883-S LTM2883-I l l 1.62 5.5 5.5 V V ICC Input Supply Current ON = 0V LTM2883-3, ON = VL, No Load LTM2883-5, ON = VL, No Load l l l µA mA mA IL Logic Supply Current ON = 0V LTM2883-S, ON = VL LTM2883-I, ON = VL l 0 150 µA µA µA PART NUMBER INPUT VOL TAGE PAD OR BALL FINISH PART MARKING PACKAGE TYPE MSL RATING TEMPERATURE RANGEDEVICE FINISH CODE LTM2883CY-3S#PBF 3V TO 3.6V SAC305 (RoHS) LTM2883Y-3S e1 BGA 4 0°C TO 70°C LTM2883IY-3S#PBF –40°C TO 85°C LTM2883HY-3S#PBF –40°C TO 105°C LTM2883CY-5S#PBF 4.5V TO 5.5V LTM2883Y-5S 0°C TO 70°C LTM2883IY-5S#PBF –40°C TO 85°C LTM2883HY-5S#PBF –40°C TO 105°C LTM2883CY-3I#PBF 3V TO 3.6V LTM2883Y-3I 0°C TO 70°C LTM2883IY-3I#PBF –40°C TO 85°C LTM2883HY-3I#PBF –40°C TO 105°C LTM2883CY-5I#PBF 4.5V TO 5.5V LTM2883Y-5I 0°C TO 70°C LTM2883IY-5I#PBF –40°C TO 85°C LTM2883HY-5I#PBF –40°C TO 105°C

• Device temperature grade is indicated by a label on the shipping container.
• Pad or ball finish code is per IPC/JEDEC J-STD-609.
• Terminal Finish Part Marking: www.linear.com/leadfree
• This product is not recommended for second side reflow. For more information, go to: www.linear.com/BGA-assy
• Recommended BGA PCB Assembly and Manufacturing Procedures: www.linear.com/BGA-assy
• BGA Package and T ray Drawings: www.linear.com/packaging
• This product is moisture sensitive. For more information, go to: www.linear.com/BGA-assy http://www.linear.com/product/LTM2883#orderinfo

2883fd For more information www.linear .com/L TM2883 ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted. Specifications apply to all options unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Output Supplies VCC2 Regulated Output Voltage No Load l 4.75 5 5.25 V Output Voltage Operating Range (Note 2) 3 5.5 V Line Regulation ILOAD = 1mA, MIN ≤ VCC ≤ MAX l 25 100 mV Load Regulation ILOAD = 100µA to 20mA l 8 80 mV ADJ Pin Voltage ILOAD = 100µA to 20mA l 585 600 615 mV Voltage Ripple ILOAD = 20mA (Note 2) 1 mVRMS Efficiency ILOAD = 20mA (Note 2) 45 % ICC2 Output Short Circuit Current VCC2 = 0V 45 mA Current Limit ΔVCC2 = –5% l 20 mA V+ Regulated Output Voltage No Load l 12 12.5 13 V Line Regulation ILOAD = 1mA, MIN ≤ VCC ≤ MAX l 5 30 mV Load Regulation ILOAD = 100µA to 20mA l 200 mV ADJ Pin Voltage ILOAD = 100µA to 20mA l 1.170 1.220 1.260 mV Voltage Ripple ILOAD = 20mA (Note 2) 3 mVRMS Efficiency ILOAD = 20mA (Note 2) 45 % I+ Output Short Circuit Current V+ = 0V 70 mA Current Limit ΔV+ = –0.5V l 20 mA V– Regulated Output Voltage No Load l –12 –12.5 –13 V Line Regulation ILOAD = –1mA, MIN ≤ VCC ≤ MAX l 4 15 mV Load Regulation ILOAD = 100µA to 15mA, V+LOAD = 1.5mA 35 mV ADJ Pin Voltage ILOAD = 100µA to 15mA, V+LOAD = 1.5mA l –1.184 –1.220 –1.256 mV Voltage Ripple ILOAD = 15mA, V+LOAD = 1.5mA (Note 2) 2 mVRMS Efficiency ILOAD = 15mA (Note 2) 45 % I– Output Short-Circuit Current V– = 0V 30 mA Current Limit ΔV– = 0.5V, V+ = 1.5mA l 10 15 mA Logic/SPI V ITH Input Threshold Voltage ON, DI1, SDOE, SCK, SDI, CS 1.62V ≤ VL < 2.35V ON, DI1, SDOE, SCK, SDI, CS 2.35V ≤ VL I1, I2, SDO2 l l l 0.25 • VL 0.33 • VL 0.33 • VCC2 0.75 • VL 0.67 • VL 0.67 • VCC2 V V V IINL Input Current l ±1 µA VHYS Input Hysteresis (Note 2) 150 mV VOH Output High Voltage DO1, DO2, SDO ILOAD = –1mA, 1.62V ≤ VL < 3V ILOAD = –4mA, 3V ≤ VL ≤ 5.5V l VL – 0.4 V O1, SCK2, SDI2, CS2, ILOAD = –4mA l VCC2 – 0.4 V VOL Output Low Voltage DO1, DO2, SDO ILOAD = 1mA, 1.62V ≤ VL < 3V ILOAD = 4mA, 3V ≤ VL ≤ 5.5V l 0.4 V O1, SCK2, SDI2, CS2, ILOAD = 4mA l 0.4 V ISC Short-Circuit Current 0V ≤ (DO1, DO2, SDO) ≤ VL 0V ≤ (O1, SCK2, SDI2, CS2) ≤ VCC2 l ±60 ±85 mA mA

2883fdFor more information www.linear .com/L TM2883

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS I2C VIL Low Level Input Voltage SCL, SDA SDA2 l l 0.3 • VL 0.3 • VCC2 V V VIH High Level Input Voltage SCL, SDA SDA2 l l 0.7 • VL 0.7 • VCC2 V V IINL Input Current SCL, SDA = VL or 0V l ±1 µA VHYS Input Hysteresis SCL, SDA SDA2 0.05 • VL 0.05 • VCC2 mV mV VOH Output High Voltage SCL2, ILOAD = –2mA DO2, ILOAD = –2mA l l VCC2 – 0.4 VL – 0.4 V V VOL Output Low Voltage SDA, VL = 3V, ILOAD = 3mA DO2, VL = 3V, ILOAD = 2mA SCL2, ILOAD = 2mA SDA2, No Load, SDA = 0V, 4.5V ≤ VCC2 < 5.5V SDA2, No Load, SDA = 0V, 3V < VCC2 < 4.5V l l l l l 0.3 0.4 0.4 0.4 0.45 0.55 V V V V V CIN Input Pin Capacitance SCL, SDA, SDA2 (Note 2) l 10 pF CB Bus Capacitive Load SCL2, Standard Speed (Note 2) SCL2, Fast Speed SDA, SDA2, SR ≥ 1V/μs, Standard Speed (Note 2) SDA, SDA2, SR ≥ 1V/μs, Fast Speed l l l l 400 200 400 200 pF pF pF pF Minimum Bus Slew Rate SDA, SDA2 l 1 V/µs ISC Short-Circuit Current SDA2 = 0, SDA = VL 0V ≤ SCL2 ≤ VCC2 0V ≤ DO2 ≤ VL SDA = 0, SDA2 = VCC2 SDA = VL, SDA2 = 0 l ±30 ±30 –1.8 100 mA mA mA mA mA ESD (HBM) (Note 2) Isolation Boundary (VCC2, V+, V–, GND2) to (VCC, VL, GND) ±10 kV The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted. Specifications apply to all options unless otherwise noted. SWITCHING CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Logic Maximum Data Rate Ix → DOx, CL = 15pF (Note 3) l 10 MHz tPHL, tPLH Propagation Delay CL = 15pF (Figure 1) l 35 60 100 ns tR Rise Time CL = 15pF (Figure 1) LTM2883-I, DO2, CL = 15pF (Figure 1) l l 12.5 ns ns tF Fall Time CL = 15pF (Figure 1) LTM2883-I, DO2, CL = 15pF (Figure 1) l l 12.5 ns ns SPI Maximum Data Rate Bidirectional Communication (Note 3) Unidirectional Communication (Note 3) l l MHz MHz tPHL, tPLH Propagation Delay CL = 15pF (Figure 1) l 35 60 100 ns tPWU Output Pulse Width Uncertainty SDI2, CS2 (Note 2) –20 50 ns The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted. Specifications apply to all options unless otherwise noted.

2883fd For more information www.linear .com/L TM2883 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VISO Rated Dielectric Insulation Voltage (Notes 5, 6, 7)

1 Minute, Derived from 1 Second Test 2500 VRMS

1 Second ±4400 V

Common Mode T ransient Immunity LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = ON = 3.3V, VCM = 1kV, Δt = 33ns (Note 2) 30 kV/µs VIORM Maximum Continuous Working Voltage (Notes 2, 5) 560 400 VPEAK VRMS Partial Discharge VPD = 1050VPEAK (Notes 2, 5) 5 pC CTI Comparative T racking Index IEC 60112 (Note 2) 600 VRMS Depth of Erosion IEC 60112 (Note 2) 0.017 mm DTI Distance Through Insulation (Note 2) 0.06 mm Input to Output Resistance (Notes 2, 5) 109 Ω Input to Output Capacitance (Notes 2, 5) 6 pF Creepage Distance (Note 2) 9.48 mm ISOLATION CHARACTERISTICS TA = 25°C. SWITCHING CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tR Rise Time CL = 15pF (Figure 1) l 3 12.5 ns tF Fall Time CL = 15pF (Figure 1) l 3 12.5 ns tPZH, tPZL Output Enable Time SDOE = ↓, RL = 1kΩ, CL = 15pF (Figure 2) l 50 ns tPHZ, tPLZ Output Disable Time SDOE = ↑, RL = 1kΩ, CL = 15pF (Figure 2) l 50 ns I2C Maximum Data Rate (Note 3) l 400 kHz tPHL, tPLH Propagation Delay SCL → SCL2, CL = 15pF (Figure 1) SDA → SDA2, RL = Open, CL = 15pF (Figure 3) SDA2 → SDA, RL = 1.1kΩ, CL = 15pF (Figure 3) l l l 150 150 200 225 250 350 ns ns ns tPWU Output Pulse Width Uncertainty SDA, SDA2 (Note 2) –20 50 ns tHD;DAT Data Hold Time (Note 2) 600 ns tR Rise Time SDA2, CL = 200pF (Figure 3) SDA2, CL = 200pF (Figure 3) SDA, RL = 1.1kΩ, CL = 200pF (Figure 3) SCL2, CL = 200pF (Figure 1) l l l 250 300 250 250 ns ns ns ns tF Fall Time SDA2, CL = 200pF (Figure 3) SDA, RL = 1.1kΩ, CL = 200pF (Figure 3) SCL2, CL = 200pF (Figure 1) l l l 250 250 250 ns ns ns tSP Pulse Width of Spikes Suppressed by Input Filter l 0 50 ns Power Supply Power-Up Time ON = ↑ to VCC2 (Min) ON = ↑ to V+ (Min) ON = ↑ to V– (Min) l l l 0.6 0.6 0.6 2.5 ms ms ms The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, and GND = GND2 = 0V, ON = VL unless otherwise noted. Specifications apply to all options unless otherwise noted.

2883fdFor more information www.linear .com/L TM2883 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design and not subject to production test. Note 3: Maximum data rate is guaranteed by other measured parameters and is not tested directly. Note 4: This module includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above specified maximum operating junction temperature may result in device degradation or failure. Note 5: Device considered a 2-terminal device. Pin group A1 through B8 shorted together and pin group K1 through L8 shorted together. Note 6: The rated dielectric insulation voltage should not be interpreted as a continuous voltage rating. Note 7: In accordance with UL1577, each device is proof tested for the 2500V RMS rating by applying the equivalent positive and negative peak voltage multiplied by an acceleration factor of 1.2 for one second. ISOLATION CHARACTERISTICS

2883fd For more information www.linear .com/L TM2883 TYPICAL PERFORMANCE CHARACTERISTICS VCC2 Line Regulation vs Load Current V+ Line Regulation vs Load Current V– Line Regulation vs Load Current VCC2 Line Regulation vs Load Current V+ Line Regulation vs Load Current V– Line Regulation vs Load Current VCC Supply Current vs Temperature Isolated Supplies vs Equal Load Current Isolated Supplies vs Equal Load Current T A = 25°C, LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. TEMPERATURE (°C) –50 SUPPL Y CURRENT (mA) 500 100

2883 G01

12525–25 75 NO LOAD, REFRESH DATA ONL Y L TM2883-3 VCC = 3.3V L TM2883-5 VCC = 5V LOAD CURRENT (mA) VCC2, V+, |V–| VOL TAGE (V) 2010 155

2883 G02

VCC = 3.3V VCC2 LOAD CURRENT (mA) VCC2, V+, |V–| VOL TAGE (V) 2010 155

2883 G03

VCC = 5V VCC2 LOAD CURRENT (mA) VCC2 VOL TAGE (V) 6.0 3.0 3.5 4.0 4.5 5.0 5.5 2.5 2010 30

2883 G04

I+ = I– = 0A VCC = 3V VCC = 3.3V VCC = 3.6V LOAD CURRENT (mA) V+ VOL TAGE (V) 13.0 10.0 10.5 11.0 11.5 12.0 12.5 9.0 9.5 2010 30

2883 G05

VCC = 3V VCC = 3.15V VCC = 3.3V VCC = 3.6V L TM2883-3 ICC2 = I– = 0A –9.0 –10.0 –10.5 –11.0 –11.5 –12.0 –12.5 –13.0 –9.5 LOAD CURRENT (mA) V– VOL TAGE (V) 2010

2883 G06

VCC = 3V VCC = 3.15V VCC = 3.3V VCC = 3.6V L TM2883-3 ICC2 = I+ = 0A LOAD CURRENT (mA) VCC2 VOL TAGE (V) 6.0 3.0 3.5 4.0 4.5 5.0 5.5 2.5 2010 30

2883 G07

VCC = 4.5V VCC = 5V VCC = 5.5V L TM2883-5 I+ = I– = 0A LOAD CURRENT (mA) V+ VOL TAGE (V) 13.0 10.0 10.5 11.0 11.5 12.0 12.5 9.0 9.5 2010 30

2883 G08

VCC = 4.5V VCC = 4.75V VCC = 5V VCC = 5.5V L TM2883-5 ICC2 = I– = 0A –9.0 –10.0 –10.5 –11.0 –11.5 –12.0 –12.5 –13.0 –9.5 LOAD CURRENT (mA) V– VOL TAGE (V) 2010 30

2883 G09

VCC = 4.5V VCC = 4.75V VCC = 5V VCC = 5.5V L TM2883-5 ICC2 = I+ = 0A

2883fdFor more information www.linear .com/L TM2883 TYPICAL PERFORMANCE CHARACTERISTICS V+ Load Regulation vs Temperature V– Load Regulation vs Temperature V– Load Regulation vs Temperature VCC2 Efficiency VCC2 Voltage and ICC Current vs Load Current VCC2 Load Regulation vs Temperature VCC2 Load Regulation vs Temperature V+ Load Regulation vs Temperature TA = 25°C, LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. TEMPERATURE (°C) –50 VCC2 VOL TAGE (V) 5.20 5.05 5.15 5.10 5.00 4.90 4.95 500 100

2883 G10

12525–25 75 L TM2883-3 VCC = 3.3V I+ = I– = 0A ICC2 = 1mA ICC2 = 20mA TEMPERATURE (°C) –50 VCC2 VOL TAGE (V) 5.20 5.05 5.15 5.10 5.00 4.90 4.95 500 100

2883 G11

12525–25 75 L TM2883-5 VCC = 5V I+ = I– = 0A ICC2 = 1mA ICC2 = 20mA TEMPERATURE (°C) –50 V+ VOL TAGE (V) 12.8 12.5 12.7 12.6 12.4 12.2 12.3 500 100

2883 G12

12525–25 75 L TM2883-3 VCC = 3.3V ICC2 = I– = 0A I+ = 1mA I+ = 5mA I+ = 10mA I+ = 15mA I+ = 20mA TEMPERATURE (°C) –50 V+ VOL TAGE (V) 12.7 12.5 12.6 12.4 12.1 12.2 12.3 500 100

2883 G13

12525–25 75 I+ = 1mA I+ = 5mA I+ = 10mA I+ = 15mA I+ = 20mA L TM2883-5 VCC = 5V ICC2 = I– = 0A TEMPERATURE (°C) –50 V– VOL TAGE (V) –12.2 –12.5 –12.3 –12.4 –12.6 –12.8 –12.7 500 100

2883 G14

12525–25 75 I– = 1mA I– = 15mA L TM2883-3 VCC = 3.3V ICC2 = I+ = 0A TEMPERATURE (°C) –50 V– VOL TAGE (V) –12.2 –12.5 –12.3 –12.4 –12.6 500 100

2883 G15

12525–25 75 I– = 1mA I– = 20mA L TM2883-5 VCC = 5V ICC2 = I+ = 0A LOAD CURRENT (mA) EFFICIENCY (%) POWER LOSS (W) 0 0.6 0.4 0.2 0.3 0.1 0.5 2010 30

2883 G16

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V EFFICIENCY POWER LOSS I+ = I– = 0A LOAD CURRENT (mA) VCC2 VOL TAGE (V) ICC CURRENT (mA) 0 150 100 125 2010 30

2883 G17

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V VOL TAGE ICC CURRENT I+ = I– = 0A

2883fd For more information www.linear .com/L TM2883 TYPICAL PERFORMANCE CHARACTERISTICS V– Efficiency V– Voltage and ICC Current vs Load Current VCC2 T ransient Response 20mA Load Step V+ T ransient Response 20mA Load Step V– T ransient Response 20mA Load Step V+ Efficiency V+ Voltage and ICC Current vs Load Current TA = 25°C, LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. LOAD CURRENT (mA) EFFICIENCY (%) POWER LOSS (W) 1.2 0.8 0.4 0.6 0.2 1.0 2010 30

2883 G18

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V EFFICIENCY POWER LOSS ICC2 = I– = 0A 0 2010 30 5040 LOAD CURRENT (mA) V+ VOL TAGE (V) ICC CURRENT (mA) 350 250 150 200 100 300

2883 G19

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V ICC2 = I– = 0AVOL TAGE ICC CURRENT LOAD CURRENT (mA) EFFICIENCY (%) POWER LOSS (W) 0 0.6 0.4 0.2 0.3 0.1 0.5 2010

2883 G20

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V EFFICIENCY POWER LOSS LOAD CURRENT (mA) V– VOL TAGE (V) ICC CURRENT (mA) –9.0 –12.5 –12.0 –11.5 –11.0 –10.0 –9.5 –10.5 –13.0 320 200 120 160 240 280 2010

2883 G21

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V VOL TAGE ICC CURRENT 100µs/DIV VCC2 100mV/DIV ICC2 10mA/DIV

2883 G22

100µs/DIV 200mV/DIV 10mA/DIV

2883 G23

100µs/DIV 200mV/DIV 10mA/DIV

2883 G24

I+ = 1.5mA

2883fdFor more information www.linear .com/L TM2883 TYPICAL PERFORMANCE CHARACTERISTICS VCC Supply Current vs Single Channel Data Rate Logic Input Threshold vs VL Supply Voltage Logic Output Voltage vs Load Current V CC2 Ripple V+ Ripple V– Ripple TA = 25°C, LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. VCC2 Noise V+ Noise V– Noise 1ms/DIV 2mV/DIV

2883 G30

2883 G25

I+ = 1mA I+ = 20mA

2883 G26

I– = 1mA I– = 20mA

2883 G27

2883 G28

2883 G29

DATA RATE (Hz) VCC CURRENT (mA) 100k10k 1M

2883 G31

VCC = 5V ICC2 = I+ = I– = 0 CL = 1nF CL = 330pF CL = 100pF CL = 20pF VL SUPPL Y VOL TAGE (V) THRESHOLD VOL TAGE (V) 3.5 2.5 0.5 1.0 2.0 3.0 1.5 4 52

2883 G32

LOAD CURRENT (mA) OUTPUT VOL TAGE (V) 6.0 1.0 2.0 3.0 4.0 5.0 21 3

2883 G33

VL = 5.5V VL = 3.3V VL = 1.62V

2883fd For more information www.linear .com/L TM2883 TYPICAL PERFORMANCE CHARACTERISTICS VCC2 Cross Regulation vs V+, V– Load Isolated Supply Efficiency with Equal Load Current Power On Sequence VCC2 Cross Regulation vs V+, V– Load TA = 25°C, LTM2883-3 VCC = 3.3V, LTM2883-5 VCC = 5V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. 200µs/DIV 5V/DIV ON VCC2

2883 G34

LOAD CURRENT (mA) VCC2 VOL TAGE (V) V+, |V–| VOL TAGE (V) 5.2 4.9 5.0 5.1 4.8 2010 30

2883 G35

VCC = 3.3V ICC2 = 15mA VCC2 0 2010 30 40 LOAD CURRENT (mA) VCC2 VOL TAGE (V) V+, |V–| VOL TAGE (V) 5.2 4.9 5.0 5.1 4.8

2883 G36

VCC = 5V ICC2 = 15mA VCC2 V+ Cross Regulation vs V– Load V+ Cross Regulation vs V– Load LOAD CURRENT (mA) EFFICIENCY (%) POWER LOSS (W) 0 1.0 0.8 0.4 0.6 0.2 0.7 0.3 0.5 0.1 0.9 2010

2883 G37

L TM2883-3, VCC = 3.3V L TM2883-5, VCC = 5V EFFICIENCY POWER LOSS LOAD CURRENT (mA) V+, |V–| VOL TAGE (V) 20105 15

2883 G38

VCC = 3.3V V+, I+ = 10mA V–, I+ = 10mA V+, I+ = 15mA V–, I+ = 15mA LOAD CURRENT (mA) V+, |V–| VOL TAGE (V) 20105 2515 30

2883 G39

VCC = 5V V+, I+ = 10mA V–, I+ = 10mA V+, I+ = 15mA V–, I+ = 15mA

2883fdFor more information www.linear .com/L TM2883 PIN FUNCTIONS Logic Side DO2 (A1): Digital Output, Referenced to VL and GND. Logic output connected to I2 through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. DNC (A2): Do Not Connect Pin. Pin connected internally. SCL (A3): Serial I 2C Clock Input, Referenced to VL and GND. Logic input connected to isolated side SCL2 pin through isolation barrier. Clock is unidirectional from logic to isolated side. Do not float. SDA (A4): Serial I 2C Data Pin, Referenced to VL and GND. Bidirectional logic pin connected to isolated side SDA2 pin through isolation barrier. Under the condition of an isola- tion communication failure this pin is in a high impedance state. Do not float. DI1 (A5): Digital Input, Referenced to VL and GND. Logic input connected to O1 through isolation barrier. The logic state on DI1 translates to the same logic state on O1. Do not float. GND (A6, B2 to B6): Circuit Ground. ON (A7): Enable. Enables power and data communica- tion through the isolation barrier. If ON is high the part is enabled and power and communications are functional to the isolated side. If ON is low the logic side is held in reset, all digital outputs are in a high impedance state, and the isolated side is unpowered. Do not float. VL (A8): Logic Supply. Interface supply voltage for pins DI1, SCL, SDA, DO1, DO2, and ON. Operating voltage is 3V to 5.5V. Internally bypassed with 2.2µF. DO1 (B1): Digital Output, Referenced to V L and GND. Logic output connected to I1 through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. V CC (B7 to B8): Supply Voltage. Operating voltage is 3V to 3.6V for LTM2883-3 and 4.5V to 5.5V for LTM2883-5. Internally bypassed with 2.2µF. Isolated Side I2 (L1): Digital Input, Referenced to VCC2 and GND2. Logic input connected to DO2 through isolation barrier. The logic state on I2 translates to the same logic state on DO2. Do not float. DNC (L2): Do Not Connect Pin. Pin connected internally. SCL2 (L3): Serial I 2C Clock Output, Referenced to VCC2 and GND2. Logic output connected to logic side SCL pin through isolation barrier. Clock is unidirectional from logic to isolated side. SCL2 has a push-pull output stage, do not connect an external pull-up device. Under the condition of an isolation communication failure this output defaults to a high state. SDA2 (L4): Serial I2C Data Pin, Referenced to VCC2 and GND2. Bidirectional logic pin connected to logic side SDA pin through isolation barrier. Output is biased high by a 1.8mA current source. Do not connect an external pull- up device to SDA2. Under the condition of an isolation communication failure this output defaults to a high state. O1 (L5): Digital Output, Referenced to VCC2 and GND2. Logic output connected to DI1 through isolation barrier. Under the condition of an isolation communication failure O1 defaults to a high state. V CC2 (L6): 5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed with 2.2µF. V– (L7): –12.5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to –12.5V. Internally bypassed with 1µF. V + (L8): 12.5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 12.5V. Internally bypassed with 1µF. I1 ( K1): Digital Input, Referenced to VCC2 and GND2. Logic input connected to DO1 through isolation barrier. The logic state on I1 translates to the same logic state on DO1. Do not float. GND2 (K2 to K5): Isolated Ground. AVCC2 (K6): 5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is 600mV referenced to GND2. AV – (K7): –12.5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is –1.22V referenced to GND2. AV + (K8): 12.5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is 1.22V referenced to GND2. (LTM2883-I)

2883fd For more information www.linear .com/L TM2883 PIN FUNCTIONS Logic Side SDO (A1): Serial SPI Digital Output, Referenced to VL and GND. Logic output connected to isolated side SDO2 pin through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. DO2 (A2): Digital Output, Referenced to VL and GND. Logic output connected to I2 through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. SCK (A3): Serial SPI Clock Input, Referenced to VL and GND. Logic input connected to isolated side SCK2 pin through isolation barrier. Do not float. SDI (A4): Serial SPI Data Input, Referenced to V L and GND. Logic input connected to isolated side SDI2 pin through isolation barrier. Do not float. CS (A5): Serial SPI Chip Select, Referenced to V L and GND. Logic input connected to isolated side CS2 pin through isolation barrier. Do not float. SDOE (A6): Serial SPI Data Output Enable, Referenced to V L and GND. A logic high on SDOE places the logic side SDO pin in a high impedance state, a logic low enables the output. Do not float. ON (A7): Enable. Enables power and data communica- tion through the isolation barrier. If ON is high the part is enabled and power and communications are functional to the isolated side. If ON is low the logic side is held in reset, all digital outputs are in a high impedance state, and the isolated side is unpowered. Do not float. VL (A8): Logic Supply. Interface supply voltage for pins SDI, SCK, SDO, DO1, DO2, CS, and ON. Operating voltage DO1 (B1): Digital Output, Referenced to VL and GND. Logic output connected to I1 through isolation barrier. Under the condition of an isolation communication failure this output is in a high impedance state. GND (B2 to B6): Circuit Ground. V CC (B7 to B8): Supply Voltage. Operating voltage is 3V to 3.6V for LTM2883-3 and 4.5V to 5.5V for LTM2883-5. Internally bypassed with 2.2µF. Isolated Side SDO2 (L1): Serial SPI Digital Input, Referenced to VCC2 and GND2. Logic input connected to logic side SDO pin through isolation barrier. Do not float. I2 (L2): Digital Input, Referenced to V CC2 and GND2. Logic input connected to DO2 through isolation barrier. The logic state on I2 translates to the same logic state on DO2. Do not float. SCK2 (L3): Serial SPI Clock Output, Referenced to VCC2 and GND2. Logic output connected to logic side SCK pin through isolation barrier. Under the condition of an isolation communication failure this output defaults to a low state. SDI2 (L4): Serial SPI Data Output, Referenced to VCC2 and GND2. Logic output connected to logic side SDI pin through isolation barrier. Under the condition of an isolation communication failure this output defaults to a low state. CS2 (L5): Serial SPI Chip Select, Referenced to VCC2 and GND2. Logic output connected to logic side CS pin through isolation barrier. Under the condition of an isolation com- munication failure this output defaults to a high state. VCC2 (L6): 5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed with 2.2µF. V– (L7): –12.5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to –12.5V. Internally bypassed with 1µF. V + (L8): 12.5V Nominal Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 12.5V. Internally bypassed with 1µF. I1 (K1): Digital Input, Referenced to V CC2 and GND2. Logic input connected to DO1 through isolation barrier. The logic state on I1 translates to the same logic state on DO1. Do not float. GND2 (K2 to K5): Isolated Ground. AVCC2 (K6): 5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is 600mV Referenced to GND2. AV – (K7): –12.5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is –1.22V Referenced to GND2. AV+ (K8): 12.5V Nominal Isolated Supply Voltage Adjust. The adjust pin voltage is 1.22V Referenced to GND2. (LTM2883-S)

2883fdFor more information www.linear .com/L TM2883 BLOCK DIAGRAM

2883 BDb

2.2µF 2.2µF VCC VCC2 AVCC2 GND2 VL 110k 2.2µF GND ON CS SDOE SDI SDO DO1 DO2 SCK CS2 SDI2 SDO2 SCK2 DC/DC CONVERTER ISOLATED COMMUNI- CATIONS INTERFACE ISOLATED COMMUNI- CATIONS INTERFACE REG 15k 1µF AV+ 150k REG REG 16.2k 16.2k 1µF AV– 150k REG LTM2883-I LTM2883-S

2882 BDa

2.2µF 2.2µF VCC VCC2 AVCC2 GND2 VL 110k 2.2µF GND ON DI1 DO2 DO1 SCL SDA SDA2 SCL2 DC/DC CONVERTER ISOLATED COMMUNI- CATIONS INTERFACE ISOLATED COMMUNI- CATIONS INTERFACE REG 15k 1µF AV+ 150k REG REG 16.2k 16.2k 1µF AV– 150k REG

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Figure 1. Logic Timing Measurements Figure 2. Logic Enable/Disable Time

2883 F02

Figure 3. I2C Timing Measurements

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networks where grounds can take on different voltages. greater than 30kV/μs providing excellent noise isolation. translate signals and power across an isolation barrier. a powerful isolated DC/DC converter in one small package. transformer saturation due to driver duty cycle imbalance. tor (LDO) to provide a regulated 5V output. regulated to ±12.5V respectively by low dropout regulators. regulation of the inverting charge pump. in Figure 4. Simply connect the desired logic supply to VL. is bypassed internally by a 2.2µF capacitor.

2883 F04

Figure 4. VCC and VL Are Independent

Figure 5. Adjustable Voltage Rails and mitigation of this phenomenon. Table 1. Voltage Adjustment Formula not encoded within the same high priority serial packet. clock phase (CPHA) summarized in Table 2. Table 2. SPI Mode from the output voltage pin to the associated adjust pin. to calculate the resistances required to adjust each output. The output voltage adjustment range for VCC2 is 3V to 5.5V.

2883 F05

• CS to SCK (master sample SDO, 1st SDO valid) t0 → t1 ≈50ns, CS to CS2 propagation delay t1 → t1+ Isolated slave device propagation (response time), asserts SDO2 t1 → t3 ≈50ns, SDO2 to SDO propagation delay t3 → t5 Set-up time for master SDO to SCK

Figure 6. SPI Timing, Bidirectional, CPHA = 0 Figure 7. SPI Timing, Bidirectional, CPHA = 1

2883 F06

2883 F07

• SDI to SCK (master data write to slave) t2 → t4 ≈50ns, SDI to SDI2 propagation delay t5 → t6 ≈50ns, SCK to SCK2 propagation delay t2 → t5 ≥50ns, SDI to SCK, separate packet non-zero set-up time t4 → t6 ≥50ns, SDI2 to SCK2, separate packet non-zero set-up time
• SDO to SCK (master sample SDO, subsequent SDO valid) t8 set-up data transition SDI and SCK t8 → t10 ≈50ns, SDI to SDI2 and SCK to SCK2 propagation delay t10 SDO2 data transition in response to SCK2 t10 → t11 ≈50ns, SDO2 to SDO propagation delay t11 → t12 Set-up time for master SDO to SCK

Table 3. Bidirectional SPI Timing Event Description

1 Propagation delay of data and clock, logic side to isolated side

1 Last sample clock transition logic side

1 Propagation delay clock, logic to isolated side

1 Last slave data output and data transition, logic side

Figure 8. SPI Timing, Unidirectional, CPHA = 0 Figure 9. SPI Timing, Unidirectional, CPHA = 1

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2883 F09

• CS is transmitted prior to (asynchronous) or within the same (synchronous) data packet as SDI
• SDI and SCK set-up data transition occur within the same data packet. Referencing Figure 6, SDI can pre- cede SCK by up to 13ns (t7 → t8) or lag SCK by 3ns (t8 → t9) and not violate this requirement. Similarly in Figure 8, SDI can precede SCK by up to 13ns (t4 → t5) or lag SCK by 3ns (t5 → t6). Inter-IC Communication (I2C) Bus The LTM2883-I provides an I2C compatible isolated in- terface, Clock (SCL) is unidirectional, supporting master mode only, and data (SDA) is bidirectional. The maximum

greater than 400pF in STANDARD mode. be greater than 1V/μs for proper operation. Table 4. Unidirectional SPI Timing Event Description

1 Last clock transition

1 Clock propagation delay

Figure 10. I2C Timing Diagram

2883 F10

to the left of the appropriate curve. output driver; do not connect an external pull-up device. filter at the SCL2 pin to reduce noise injection onto SDA2. signed per the data sheet PCB layout recommendations. Specific limits per test are detailed in Table 5.

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2883 F13

Figure 12. Maximum Standard Speed Pull-Up Resistance on SDA Figure 13. Maximum Fast Speed Pull-Up Resistance on SDA Figure 11. Isolated SDA2 Pin Schematic

2883 F11

2883fd For more information www.linear .com/L TM2883 TECHNOLOGY APPLICATIONS INFORMATION PCB Layout The high integration of the LTM2883 makes PCB layout very simple. However, to optimize its electrical isolation characteristics, EMI, and thermal performance, some layout considerations are necessary.

• Under heavily loaded conditions VCC and GND current can exceed 300mA. Sufficient copper must be used on the PCB to insure resistive losses do not cause the supply voltage to drop below the minimum allowed level. Similarly, the VCC2 and GND2 conductors must be sized to support any external load current. These heavy copper traces will also help to reduce thermal stress and improve the thermal conductivity.
• Input and output decoupling is not required, since these components are integrated within the package. An ad- ditional bulk capacitor with a value of 6.8µF to 22µF is recommended. The high ESR of this capacitor reduces board resonances and minimizes voltage spikes caused by hot plugging of the supply voltage. For EMI sensitive applications, an additional low ESL ceramic capacitor of 1µF to 4.7µF, placed as close to the power and ground terminals as possible, is recommended. Alternatively, a number of smaller value parallel capacitors may be used to reduce ESL and achieve the same net capacitance.
• Do not place copper on the PCB between the inner col- umns of pads. This area must remain open to withstand the rated isolation voltage.
• The use of solid ground planes for GND and GND2 is recommended for non-EMI critical applications to optimize signal fidelity, thermal performance, and to minimize RF emissions due to uncoupled PCB trace conduction. The drawback of using ground planes, where EMI is of concern, is the creation of a dipole antenna structure which can radiate differential voltages formed between GND and GND2. If ground planes are used it is recommended to minimize their area, and use contiguous planes as any openings or splits can exacerbate RF emissions.
• For large ground planes a small capacitance (≤330pF) from GND to GND2, either discrete or embedded within the substrate, provides a low impedance current return path for the module parasitic capacitance, minimizing any high frequency differential voltages and substantially reducing radiated emissions. Discrete capacitance will not be as effective due to parasitic ESL. In addition, volt- age rating, leakage, and clearance must be considered for component selection. Embedding the capacitance within the PCB substrate provides a near ideal capacitor and eliminates component selection issues; however, the PCB must be 4 layers. Care must be exercised in applying either technique to insure the voltage rating of the barrier is not compromised. The PCB layout in Figures 14a and 14b shows the low EMI demo board for the LTM2883. The demo board uses a combination of EMI mitigation techniques, including both embedded PCB bridge capacitance and discrete GND to GND2 capacitors. Tw o safety rated type Y2 capacitors are used in series, manufactured by MuRata, part number GA342QR7GF471KW01L. The embedded capacitor ef- fectively suppresses emissions above 400MHz, whereas the discrete capacitors are more effective below 400MHz. EMI performance is shown in Figure 15, measured using a Gigahertz T ransverse Electromagnetic (GTEM) cell and method detailed in IEC 61000-4-20, Testing and Measure- ment Techniques – Emission and Immunity Testing in T ransverse Electromagnetic Waveguides. Figure 14a. LTM2883 Low EMI Demo Board Layout

2883fdFor more information www.linear .com/L TM2883 Top Layer Inner Layer 2 Inner Layer 1 Bottom Layer Figure 14b. LTM2883 Low EMI Demo Board Layout (DC1748A) APPLICATIONS INFORMATION

Figure 15. LTM2883 Low EMI Demo Board Emissions

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2883 F16

Figure 16. Isolated I2C 12-Bit, ±10V Analog Input and Output

Figure 17. Isolated SPI Device Expansion

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Figure 18. Isolated I2C Buffer with Programmable Outputs

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Figure 19. 16-Channel Isolated Temperature to Frequency Converter

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Figure 20. Digitally Switched T riple Power Supply with Undervoltage Monitor

Figure 21. Quad 16-Bit ±10V Output Range DAC

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Figure 22. –48V, 200W Hot Swap Controller with Isolated I2C Interface

2883 F22

24 ADIN

Figure 23. 12-Cell Battery Stack Monitor with Isolated SPI Interface and Low Power Shutdown

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2883 F24

Figure 24. Isolated I2C Voltage, Current and Temperature Power Supply Monitor

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Figure 25. One Complete Isolated Powered Ethernet Port

2883fd For more information www.linear .com/L TM2883 PACKAGE DESCRIPTION Please refer to http://www.linear.com/product/LTM2883#packaging for the most recent package drawings. NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JESD MS-028 AND JEP95 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW BGA 32 0517 REV E L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A PIN 1 0.000 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 6.350 5.080 5.080 0.000 DETAIL A Øb (32 PLACES) F G H L J K E A B C D 2 14 35678 D A DETAIL B PACKAGE SIDE VIEW M X YZddd M Zeee 0.630 ±0.025 Ø 32x E b e e b F G 32-Lead (15mm × 11.25mm × 3.42mm) (Reference LTC DWG # 05-08-1851 Rev E) SEE NOTES SYMBOL A b D E e F G aaa bbb ccc ddd eee MIN 3.22 0.50 2.72 0.60 0.60 0.27 2.45 NOM 3.42 0.60 2.82 0.75 0.63 15.0 11.25 1.27 12.70 8.89 0.32 2.50 MAX 3.62 0.70 2.92 0.90 0.66 0.37 2.55 0.15 0.10 0.20 0.30 0.15 TOTAL NUMBER OF BALLS: 32 DIMENSIONS NOTES BALL HT BALL DIMENSION PAD DIMENSION SUBSTRATE THK MOLD CAP HT Z DETAIL B SUBSTRATE ccc Z Z // bbb Z MOLD CAP 5. PRIMARY DATUM -Z- IS SEATING PLANE

6 PACKAGE ROW AND COLUMN LABELING MAY VARY

AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y

2883fdFor more information www.linear .com/L TM2883 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 11/12 Storage temperature range updated. 2 B 8/13 Added CTI/DTI parameters and Notes 6, 7 to Isolation Characteristics table. 6, 7 C 5/14 Removed H-grade throughout data sheet. Changed Depth of Erosion parameter. Changed overtemperature protection threshold. 1-36 D 11/17 Added H-Grade; removed Obsolete mark from H-Grade. Raised Maximum Internal Operating Temperature, Storage Temperature Range, and package T JMAX. Updated graphs showing performance characteristics vs temperature. 2, 3 8, 9

2883fd For more information www.linear .com/L TM2883 LT 1117 REV D • PRINTED IN USA www.linear.com/LTM2883  ANALOG DEVICES, INC. 2012 RELATED PARTS TYPICAL APPLICATION Precision 4mA to 20mA Sink/Source with Current Monitor 1µF 0.01µF ON CS CS2 L TM2883-3S VL VCC GND SDI SDI2 SDOE SCK 3.3V DO2 SCK2 AV+ AV– AVCC2 VCC2 SDO SDO2 DO1 I1 GND2 3 1 1µF µC CS MISO VCC GND MOSI SCK

2883 TA02

0.1µF OUTIN L T6660-3 GND IN– L TC2452, ADC REF VCC CS SCK IN+ SDO GND VOUT L TC2641, DAC REF GND CS SCK VDD DIN CLR L TC1050 0.1µF SOURCE RETURN 12.5V –5V SINK Si1555DL_N 0.1µF 100k 75k L TC1100 G = 10 15/uni03A9 0.1%3V PART NUMBER DESCRIPTION COMMENTS LTM2881 Isolated RS485/RS422 µModule T ransceiver Plus Power 20Mbps 2500VRMS Isolation with Power in LGA/BGA Package LTM2882 Dual Isolated RS232 µModule T ransceiver Plus Power 20Mbps 2500VRMS Isolation with Power in LGA/BGA Package LTC4310 Hot-Swappable I2C Isolators Bidirectional I2C Communication, Low Voltage Level Shifting LTC6803 Multistack Battery Monitor Individual Battery Cell Monitoring of High Voltage Battery Stacks, Multiple Devices Interconnected via SPI LTC2309/ LTC2305/LTC2301 12-Bit, 8-/2-/1-Channel, 14ksps SAR ADCs with I2C 5V, Internal Reference, Software Compatible Family LTC2631/LTC2630 Single 12-/10-/8-Bit I2C or SPI VOUT DACs with 10ppm/°C Reference 180μA per DAC, 2.7V to 5.5V Supply Range, 10ppm/°C Reference, Rail-to-Rail Output LTC2641/LTC2642 16-/14-/12-Bit VOUT DACs ±1LSB INL/DNL, 0.5nV • s Glitch, 1μs Settling, 3mm × 3mm DFN LTC2452/LTC2453 Ultra-Tiny 16-Bit Differential ±5.5V Δ∑ ADCs, SPI/I2C 2LSB INL, 50nA Sleep Current, Tiny 3mm × 2mm DFN-8 or TSOT Packages LTC1859/ LTC1858/LTC1857 8-Channel 16-/14-/12-Bit, 100ksps, ±10V SoftSpan™ SAR ADCs with SPI 5V Supply, Up to ±10V Configurable Unipolar/Bipolar Input Range, Pin Compatible Family in SSOP-28 package LTC2487/LTC2486 16-Bit 2- or 4-Channel Δ∑ ADCs with Easy Drive™ Inputs and I 2C/SPI Interface 16-Bit and 24-Bit Δ∑ ADC Family, Up to 16 Input Channels and Integrated Temperature Sensor LTC4303/LTC4304 Hot Swappable I2C Bus Buffers 2.7V to 5.5V Supply, Rise Time Acceleration, Stuck Bus Protection, ±15kV ESD LTC1100 Zero-Drift Instrumentation Amplifier Fixed Gain of 10 or 100 LT1991 Precision, Pin Configurable Gain Difference Amplifier Gain Range –13 to +14 LTC2054/LTC2055 Micropower Zero-Drift Op Amps 3V/5V/±5V Supply LTC4151 High Voltage I2C Current and Voltage Monitor Wide Operating Range: 7V to 80V LTC4261 Negative Voltage Hot Swap Controller with ADC and I2C Monitoring Floating Topology Allows Very High Voltage Operation LTC1799 Wide Frequency Range Silicon Oscillator 1kHz to 30MHz LTC6990 TimerBlox™ Voltage Controlled Oscillator 488Hz to 2MHz LTM2892 SPI/Digital or I2C Isolated µModule 3500VRMS Isolation, 6 Channels