LTM2881 - Completed Isolated RS485/RS422 µModule Transceiver + Power
Document overview
- Manufacturer or author: Linear Technology Corporation
- PDF pages: 24
Technical content
2881fiFor more information www.linear .com/L TM2881 Typical applicaTion
DescripTion
RS485/RS422 µModule Transceiver + Power The LT M®2881 is a complete galvanically isolated full-du- plex RS485/RS422 µModule® (micromodule) transceiver. No external components are required. A single supply powers both sides of the interface through an integrated, isolated, low noise, efficient 5V output DC/DC converter. Coupled inductors and an isolation power transformer provide 2500V RMS of isolation between the line transceiver and the logic interface. This device is ideal for systems where the ground loop is broken allowing for large com- mon mode voltage variation. Uninterrupted communica- tion is guaranteed for common mode transients greater than 30kV/μs. Maximum data rates are 20Mbps or 250kbps in slew limited mode. T ransmit data, DI and receive data, RO, are implemented with event driven low jitter processing. The receiver has a one-eighth unit load supporting up to 256 nodes per bus. A logic supply pin allows easy interfacing with different logic levels from 1.62V to 5.5V, independent of the main supply. Enhanced ESD protection allows this part to withstand up to ±15kV (human body model) on the transceiver interface pins to isolated supplies and ±10kV through the isolation barrier to logic supplies without latch-up or damage. L, L T , L TC, L TM, Linear Technology, the Linear logo and µModule are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. Isolated Half-Duplex RS485 μModule Transceiver
FeaTures
applicaTions
n RS485/RS422 T ransceiver: 2500VRMS for 1 Minute n UL-CSA Recognized File #E151738 n CSA Component Acceptance Notice 5A n Isolated DC Power: 5V at Up to 200mA n No External Components Required n 20Mbps or Low EMI 250kbps Data Rate n High ESD: ±15kV HBM on Transceiver Interface n High Common Mode Transient Immunity: 30kV/μs n Integrated Selectable 120Ω Termination n 3.3V (LTM2881-3) or 5.0V (LTM2881-5) Operation n 1.62V to 5.5V Logic Supply Pin for Flexible Digital Interface n Maximum Continuous Working Voltage: 560VPEAK n High Input Impedance Failsafe RS485 Receiver n Current Limited Drivers and Thermal Shutdown n Compatible with TIA/EIA-485-A and PROFIBUS n High Impedance Output During Internal Fault Condition n Low Current Shutdown Mode (< 10µA) n General Purpose CMOS Isolated Channel n 15mm × 11.25mm BGA and LGA Packages n Isolated RS485/RS422 Interface n Industrial Networks n Breaking RS485 Ground Loops n Isolated PROFIBUS-DP Networks LTM2881 Operating Through 35kV/μs CM Transients
2881 TA01
AVAILABLE CURRENT : 150mA (L TM2881-5) 100mA (L TM2881-3)A V CC2 5V RO VL TE RE DE DI GND GND2 VCC 3.3V (L TM2881-3) 5V (L TM2881-5) L TM2881 B Y Z PWR ISOLATION BARRIER
2881 TA01a
2881fi For more information www.linear .com/L TM2881 pin conFiguraTionabsoluTe MaxiMuM raTings Interface Voltages S ignal Voltages ON, RO, DI, DE, Signal Voltages SLO, Operating Temperature Range C to 150°C 5°C (Note 1) BGA PACKAGE 32-PIN (15mm × 11.25mm × 3.42mm) TJMAX = 125°C, θJA = 32.2°C/W , θJCTOP = 27.2°C/W , θJCBOTTOM = 20.9°C/W , θJB = 26.4°C/W , WEIGHT = 1g LGA PACKAGE 32-PIN (15mm × 11.25mm × 2.8mm) TJMAX = 125°C, θJA = 31.1°C/W , θJCTOP = 27.3°C/W , θJCBOTTOM = 19.5°C/W , θJB = 25.1°C/W , WEIGHT = 1g TOP VIEW SLODIN RO V L ONREDE DI TE DOUT A B C D E F G H J K L 2 3 4 5 6 7 8 V CC2Z GND2 GND B AY VCC
2881fiFor more information www.linear .com/L TM2881 orDer inForMaTion PART NUMBER INPUT VOL TAGE PAD OR BALL FINISH PART MARKING PACKAGE TYPE MSL RATING TEMPERATURE RANGEDEVICE FINISH CODE LTM2881CY-3#PBF 3V to 3.6V SAC305 (RoHS) LTM2881Y-3 BGA 0°C to 70°C LTM2881IY-3#PBF –40°C to 85°C LTM2881HY-3#PBF –40°C to 105°C LTM2881HY-3 SnPb (63/37) e0 –40°C to 105°C LTM2881MPY-3#PBF SAC305 (RoHS) e1 –55°C to 105°C LTM2881MPY-3 SnPb (63/37) e0 –55°C to 105°C LTM2881CY-5#PBF 4.5V to 5.5V SAC305 (RoHS) LTM2881Y-5 0°C to 70°C LTM2881IY-5#PBF –40°C to 85°C LTM2881HY-5#PBF –40°C to 105°C LTM2881HY-5 SnPb (63/37) e0 –40°C to 105°C LTM2881MPY-5#PBF SAC305 (RoHS) e1 –55°C to 105°C LTM2881MPY-5 SnPb (63/37) e0 –55°C to 105°C LTM2881CV-3#PBF 3V to 3.6V Au (RoHS) LTM2881V-3 e4 LGA 0°C to 70°C LTM2881IV-3#PBF –40°C to 85°C LTM2881HV-3#PBF –40°C to 105°C LTM2881CV-5#PBF 4.5V to 5.5V LTM2881V-5 0°C to 70°C LTM2881IV-5#PBF –40°C to 85°C LTM2881HV-5#PBF –40°C to 105°C
- Device temperature grade is indicated by a label on the shipping container .
- Pad or ball finish code is per IPC/JEDEC J-STD-609.
- T erminal Finish Part Marking: www.linear .com/leadfree
- This product is not recommended for second side reflow. For more information, go to: www.linear .com/BGA-assy
- Recommended BGA and LGA PCB Assembly and Manufacturing Procedures: www.linear .com/umodule/pcbassembly
- LGA and BGA Package and T ray Drawings: www.linear .com/packaging
- This product is moisture sensitive. For more information, go to: www .linear .com/umodule/pcbassembly http://www.linear .com/product/LTM2881#orderinfo
2881fi For more information www.linear .com/L TM2881
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Power Supply VCC VCC Supply Voltage LTM2881-3 LTM2881-5 l l 3.0 4.5 3.3 5.0 3.6 5.5 V V V L VL Supply Voltage l 1.62 5.5 V ICCPOFF VCC Supply Current in Off Mode ON = 0V l 0 10 µA ICCS VCC Supply Current in On Mode LTM2881-3 DE = 0V, RE = V L, No Load LTM2881-5 DE = 0V, RE = VL, No Load l l mA mA V CC2 Regulated VCC2 Output Voltage, Loaded LTM2881-3 DE = 0V, RE = VL, ILOAD = 100mA LTM2881-5 DE = 0V, RE = VL, ILOAD = 150mA LTM2881-3, H/MP-Grade, ILOAD = 90mA l l l 4.75 4.75 4.75 5.0 5.0 V V V V CC2NOLOAD Regulated VCC2 Output Voltage, No Load DE = 0V, RE = VL, No Load 4.8 5.0 5.35 V Efficiency ICC2 = 100mA, LTM2881-5 (Note 2) 62 % ICC2S VCC2 Short-Circuit Current DE = 0V, RE = V L, VCC2 = 0V 200 mA Driver |VOD| Differential Driver Output Voltage R = ∞ (Figure 1) R = 27Ω (RS485) (Figure 1) R = 50Ω (RS422) (Figure 1) l l l 2.1 2.1 VCC2 VCC2 VCC2 V V V ∆|V OD| Difference in Magnitude of Driver Differential Output Voltage for Complementary Output States R = 27Ω or R = 50Ω (Figure 1) l 0.2 V VOC Driver Common Mode Output Voltage R = 27Ω or R = 50Ω (Figure 1) l 3 V ∆|VOC| Difference in Magnitude of Driver Common Mode Output Voltage for Complementary Output States R = 27Ω or R = 50Ω (Figure 1) l 0.2 V IOZD Driver Three-State (High Impedance) Output Current on Y and Z DE = 0V, (Y or Z) = –7V, +12V DE = 0V, (Y or Z) = – 7V, +12V, H/MP-Grade l l ±10 ±50 µA µA I OSD Maximum Driver Short-Circuit Current – 7V ≤ (Y or Z) ≤ 12V (Figure 2) l – 250 250 mA Receiver RIN Receiver Input Resistance RE = 0V or VL, VIN = –7V, –3V, 3V, 7V, 12V (Figure 3) RE = 0V or VL, VIN = –7V, –3V, 3V, 7V, 12V (Figure 3), H/MP-Grade l l 125 125 kΩ kΩ R TE Receiver Termination Resistance Enabled TE = V L, VAB = 2V, VB = – 7V, 0V, 10V (Figure 8) l 108 120 156 Ω IIN Receiver Input Current (A, B) ON = 0V V CC2 = 0V or 5V, VIN = 12V (Figure 3) ON = 0V VCC2 = 0V or 5V, VIN = 12V (Figure 3), H/MP-Grade l l 125 250 µA ON = 0V VCC2 = 0V or 5V, VIN = –7V (Figure 3) ON = 0V VCC2 = 0V or 5V, VIN = –7V (Figure 3), H/MP-Grade l l –100 –145 µA VTH Receiver Differential Input Threshold Voltage (A-B) –7V ≤ B ≤ 12V l –0.2 0.2 V ∆VTH Receiver Input Failsafe Hysteresis B = 0V 25 mV Receiver Input Failsafe Threshold B = 0V –0.2 –0.05 0 V The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
2881fiFor more information www.linear .com/L TM2881 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Logic VIL Logic Input Low Voltage 1.62V ≤ V L ≤ 5.5V l 0.4 V VIH Logic Input High Voltage D IN SLO DI, TE, DE, ON, RE: VL ≥ 2.35V 1.62V ≤ VL < 2.35V l l l l 0.67•VCC2 0.67•VL 0.75•VL V V V V IINL Logic Input Current l 0 ±1 µA VHYS Logic Input Hysteresis (Note 2) 150 mV VOH Output High Voltage Output High, ILOAD = –4mA (Sourcing), 5.5V ≥ VL ≥ 3V Output High, ILOAD = –1mA (Sourcing), 1.62V ≤ VL < 3V l l VL –0.4 VL –0.4 V V VOL Output Low Voltage Output Low, ILOAD = 4mA (Sinking), 5.5V ≥ VL ≥ 3V Output High, ILOAD = 1mA (Sinking), 1.62V ≤ VL < 3V l l 0.4 0.4 V V IOZR Three-State (High Impedance) Output Current on RO RE = V L, 0V ≤ RO ≤ VL l ±1 µA IOSR Short-Circuit Current 0V ≤ (RO or DOUT) ≤ VL l ±85 mA elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. swiTching characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Driver SLO = VCC2 fMAX Maximum Data Rate (Note 3) 20 Mbps tPLHD tPHLD Driver Input to Output RDIFF = 54Ω, CL = 100pF (Figure 4) l 60 85 ns ∆tPD Driver Input to Output Difference PLHD – tPHLD| RDIFF = 54Ω, CL = 100pF (Figure 4) l 1 8 ns tSKEWD Driver Output Y to Output Z R DIFF = 54Ω, CL = 100pF (Figure 4) l 1 ±8 ns tRD tFD Driver Rise or Fall Time R DIFF = 54Ω, CL = 100pF (Figure 4) l 4 12.5 ns tZLD, tZHD, tLZD, tHZD Driver Output Enable or Disable Time R L = 500Ω, CL = 50pF (Figure 5) l 170 ns Driver SLO = GND2 fMAX Maximum Data Rate (Note 3) 250 kbps tPLHD tPHLD Driver Input to Output RDIFF = 54Ω, CL = 100pF (Figure 4) 1 1.55 µs ∆tPD Driver Input to Output Difference |tPLHD – tPHLD| RDIFF = 54Ω, CL = 100pF (Figure 4) 50 500 ns tSKEWD Driver Output Y to Output Z R DIFF = 54Ω, CL = 100pF (Figure 4) ±200 ±500 ns tRD tFD Driver Rise or Fall Time R DIFF = 54Ω, CL = 100pF (Figure 4) l 0.9 1.5 µs
2881fi For more information www.linear .com/L TM2881 isolaTion characTerisTics TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VISO Rated Dielectric Insulation Voltage 1 Minute (Derived from 1 Second Test) 2500 VRMS
1 Second (Notes 5, 6) ±4400 VDC
Common Mode T ransient Immunity LTM2881-3 V CC = 3.3V, LTM2881-5 VCC = 5V, VL = ON = 3.3V, VCM = 1kV, ∆t = 33ns (Note 2) ±30 kV/µs VIORM Maximum Working Insulation Voltage (Notes 2, 5) 560 400 VPEAK VRMS Partial Discharge VPR = 1050 VPEAK (Note 2) 5 pC CTI Comparative T racking Index IEC 60112 (Note 2) 600 VRMS Depth of Erosion IEC 60112 (Note 2) 0.017 mm DTI Distance Through Insulation (Note 2) 0.06 mm Input to Output Resistance (Notes 2, 5) 109 Ω Input to Output Capacitance (Notes 2, 5) 6 pF Creepage Distance (Notes 2, 5) 9.48 mm Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design and not subject to production test. Note 3: Maximum Data rate is guaranteed by other measured parameters and is not tested directly. Note 4: This µModule transceiver includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above specified maximum operating junction temperature may result in device degradation or failure. Note 5: Device considered a 2-terminal device. Pin group A1 through B8 shorted together and pin group K1 through L8 shorted together . Note 6: The rated dielectric insulation voltage should not be interpreted as a continuous voltage rating. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS tZLD, tZHD, tLZD, tHZD Driver Output Enable or Disable Time RL = 500Ω, CL = 50pF (Figure 5) l 400 ns Receiver tPLHR tPHLR Receiver Input to Output C L = 15pF, VCM = 2.5V, |VAB| = 1.4V, tR and tF < 4ns, (Figure 6) l 100 140 ns tSKEWR Differential Receiver Skew |tPLHR - tPHLR| CL = 15pF (Figure 6) l 1 8 ns tRR tFR Receiver Output Rise or Fall Time C L = 15pF (Figure 6) l 3 12.5 ns tZLR, tZHR, tLZR, tHZR Receiver Output Enable Time R L =1kΩ, CL = 15pF (Figure 7) l 50 ns tRTEN, tRTZ Termination Enable or Disable Time RE = 0V, DE = 0V, V AB = 2V, VB = 0V (Figure 8) l 100 µs Generic Logic Input tPLHL1 tPHLL1 DIN to DOUT Input to Output C L = 15pF, tR and tF < 4ns l 60 100 ns Power Supply Generator VCC2–GND2 Supply Start-Up Time (0V to 4.5V) ON VL, No Load l 325 800 µs swiTching characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V, GND = GND2 = 0V, ON = VL unless otherwise noted.
2881fiFor more information www.linear .com/L TM2881 Receiver Skew vs Temperature Driver Skew vs Temperature Driver Propagation Delay vs Temperature Typical perForMance characTerisTics Receiver Output Voltage vs Output Current (Source and Sink) Receiver Propagation Delay vs Temperature Supply Current vs Data Rate R TERM vs Temperature Driver Output Low/High Voltage vs Output Current Driver Differential Output Voltage vs Temperature OUTPUT CURRENT (mA) OUTPUT VOL TAGE (V) 5.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5
2881 G05
TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V unless otherwise noted. OUTPUT CURRENT (mA) OUTPUT VOL TAGE (V)
2881 G07
DATA RATE (Mbps) SUPPL Y CURRENT (mA) 200 180 140 160 100 120
2881 G09
1010.1 R = 54Ω (L TM2881-3) R = 100Ω (L TM2881-3) R = 54Ω (L TM2881-5) R = 100Ω (L TM2881-5) R = ∞ (L TM2881-3) R = ∞ (L TM2881-5) TEMPERATURE (°C) RECEIVER SKEW (ns) 2.0 0.5 1.5 1.0 –0.5 –1.0
2881 G01
125 100 75 50 25 0 –25 –50 TEMPERATURE (°C) DRIVER SKEW (ns) 2.0 0.5 1.5 1.0 –0.5 –1.0
2881 G02
125 100 75 50 25 0 –25 –50 TEMPERATURE (°C) DRIVER PROP DELAY (ns)
2881 G03
125 100 75 50 25 0 –25 –50 TEMPERATURE (°C) RESISTANCE (/uni03A9) 130 110 112 114 116 118 120 122 124 126 128
2881 G04
125 100 75 50 25 0 –25 –50 TEMPERATURE (°C) OUTPUT VOL TAGE (V)
2881 G06
125 100 75 50 25 0 –25 –50 R = ∞ R = 100/uni03A9 R = 54/uni03A9 TEMPERATURE (°C) RECEIVER PROP DELAY (ns) 120 115 110 105 100
2881 G08
125 100 75 50 25 0 –25 –50
2881fi For more information www.linear .com/L TM2881 Typical perForMance characTerisTics TA = 25°C, LTM2881-3 VCC = 3.3V, LTM2881-5 VCC = 5.0V, VL = 3.3V unless otherwise noted. VCC2 vs Load Current VCC Supply Current vs Temperature at ILOAD = 100mA on VCC2 VCC2 Surplus Current vs Temperature VCC2 LOAD CURRENT (mA) VOL TAGE (V)
2881 G12
180 16010 20 40 60 80 100 120 140 L TM2881-5 L TM2881-3 ICC2 OUTPUT CURRENT (mA) EFFICIENCY (%) 20050 100
2881 G13
100µs/DIV 2881 G14 VCC2 100mV/DIV ILOAD 50mA/DIV 200µs/DIV 2881 G15 10mV/DIV VCC2 Power Efficiency VCC2 Load Step (100mA) VCC2 Noise TEMPERATURE (°C) ICC CURRENT (mA) 350 250 300 200 150 100
2881 G10
125 100 75 50 25–25 0–50 L TM2881-3, VCC = 3.3V L TM2881-5, VCC = 5V TEMPERATURE (°C) SURPLUS CURRENT (mA) 250 200 150 100
2881 G11
125 100 75 50 25–25 0–50 L TM2881-5 (RS485 60mA) L TM2881-3 (RS485 60mA) L TM2881-3 (RS485 90mA) L TM2881-5 (RS485 90mA)
2881fiFor more information www.linear .com/L TM2881 LOGIC SIDE (VCC, VL, GND) DOUT (Pin A1): General Purpose Logic Output. Logic output connected through isolation path to D IN. Under the condition of an isolation communication failure DOUT is in a high impedance state. TE (Pin A2): Terminator Enable. A logic high enables a termination resistor (typically 120Ω) between pins A and B. DI (Pin A3): Driver Input. If the driver outputs are enabled (DE high), then a low on DI forces the driver noninverting output (Y) low and the inverting output (Z) high. A high on DI, with the driver outputs enabled, forces the driver noninverting output (Y) high and inverting output (Z) low. DE (Pin A4): Driver Enable. A logic low disables the driver leaving the outputs Y and Z in a high impedance state. A logic high enables the driver. RE (Pin A5): Receiver Enable. A logic low enables the receiver output. A logic high disables RO to a high imped- ance state. RO (Pin A6): Receiver Output. If the receiver output is ena bled (RE low) and if A – B is > 200mV, RO is a logic high, if A – B is < –200mV RO is a logic low. If the receiver inputs are open, shorted, or terminated without a valid signal, RO will be high. Under the condition of an isolation communication failure RO is in a high impedance state. V L (Pin A7): Logic Supply. Interface supply voltage for pins RO, RE, TE, DI, DE, D OUT, and ON. Recommended operating voltage is 1.62V to 5.5V . Internally bypassed to GND with 2.2µF. ON (Pin A8): Enable. Enables power and data communica- tion through the isolation barrier. If ON is high the part is enabled and power and communications are functional to the isolated side. If ON is low the logic side is held in reset and the isolated side is unpowered. GND (Pins B1-B5): Circuit Ground. VCC (Pins B6-B8): Supply Voltage. Recommended operat- ing voltage is 3V to 3.6V for LTM2881 -3 and 4.5V to 5.5V for LTM2881-5. Internally bypassed to GND with 2.2µF. pin FuncTions ISOLATED SIDE (VCC2, GND2) DIN (Pin L1): General Purpose Isolated Logic Input. Logic input on the isolated side relative to V CC2 and GND2. A logic high on D IN will generate a logic high on D OUT. A logic low on DIN will generate a logic low on DOUT. SLO (Pin L2): Driver Slew Rate Control. A low input, rela- tive to GND2, will force the driver into a reduced slew rate mode for reduced EMI. A high input, relative to G ND2, puts the driver into full speed mode to support maximum data rates. Y (Pin L3): Non Inverting Driver Output. High impedance when the driver is disabled. Z (Pin L4): Inverting Driver Output. High impedance when the driver is disabled. B (Pin L5): Inverting Receiver Input. Impedance is > 96kΩ in receive mode with TE low or unpowered. A (Pin L6): Non Inverting Receiver Input. Impedance is > 96kΩ in receive mode with TE low or unpowered. V CC2 (Pins L7-L8): Isolated Supply Voltage. Internally generated from VCC by an isolated DC/DC converter and regulated to 5V. Internally bypassed to GND2 with 2.2µF. GND2 (Pins K1-K8): Isolated Side Circuit Ground. The pads should be connected to the isolated ground and/or cable shield.
2881 F01
2881 F02
2881 F03
Figure 1. Driver DC Characteristics Figure 2. Driver Output Short-Circuit Current Figure 3. Receiver Input Current and Input Resistance
2881 F06a
2881 F06b
Figure 6. Receiver Propagation Delay Measurements
2881 F05a
2881 F05b
Figure 5. Driver Enable and Disable Timing Measurements
2881 F04a
2881 F04b
Figure 4. Driver Timing Measurement
2881 F07a
2881 F07b
Figure 7. Receiver Enable/Disable Time Measurements
2881 F08
Figure 8. Termination Resistance and Timing Measurements
0 X X X Off RIN Hi-Z Hi-Z Off Off
2881fiFor more information www.linear .com/L TM2881 Overview The LTM2881 µModule transceiver provides a galvanically- isolated robust RS485/RS422 interface, powered by an integrated, regulated DC/DC converter, complete with decoupling capacitors. A switchable termination resistor is integrated at the receiver input to provide proper termi- nation to the RS485 bus. The LTM2881 is ideal for use in networks where grounds can take on different voltages. Isolation in the LTM2881 blocks high voltage differences and eliminates ground loops and is extremely tolerant of common mode transients between ground potentials. Error free operation is maintained through common mode events greater than 30kV/μs providing excellent noise isolation. µModule Technology The LTM2881 utilizes isolator µModule technology to translate signals and power across an isolation barrier . Signals on either side of the barrier are encoded into pulses and translated across the isolation boundary using coreless transformers formed in the µModule substrate. This system, complete with data refresh, error checking, safe shutdown on fail, and extremely high common mode immunity, provides a robust solution for bidirectional signal isolation. The µModule technology provides the means to combine the isolated signaling with our RS485 transceiver and powerful isolated DC/DC converter in one small package. DC/DC Converter The LTM2881 contains a fully integrated isolated DC/DC converter, including the transformer, so that no external components are necessary. The logic side contains a full- bridge driver, running about 2MHz, and is AC-coupled to a single transformer primary. A series DC blocking capacitor prevents transformer saturation due to driver duty cycle imbalance. The transformer scales the primary voltage, and is rectified by a full-wave voltage doubler. This topology eliminates transformer saturation caused by secondary imbalances. The DC/DC converter is connected to a low dropout reg ulator (LDO) to provide a regulated low noise 5V output. The internal power solution is sufficient to support the transceiver inter face at its maximum specified load and data applicaTions inForMaTion rate, and external pins are supplied for extra decoupling (optional) and heat dissipation. The logic supplies, V CC and VL have a 2.2µF decoupling capacitance to GND and the isolated supply VCC2 has a 2.2µF decoupling capacitance to GND2 within the µModule package. VCC2 Output The on-board DC/DC converter provides isolated 5V power to output VCC2. VCC2 is capable of suppling up to 1W of power at 5V in the LTM2881-5 option and up to 600mW of power in the LTM2881-3 option. This surplus current is available to external applications. The amount of surplus current is dependent upon the implementation and current delivered to the RS485 driver and line load. An example of available surplus current is shown in the Typical Per - formance Characteristics graph, V CC2 Surplus Current vs Temperature. Figure 19 demonstrates a method of using the V CC2 output directly and with a switched power path that is controlled with the isolated RS485 data channel. Driver The driver provides full RS485 and RS422 compatibility. When enabled, if DI is high, Y–Z is positive. When the driver is disabled, both outputs are high impedance with less than 10µA of leakage current over the entire common mode range of –7V to 12V, with respect to GND2. Driver Overvoltage and Overcurrent Protection The driver outputs are protected from short circuits to any voltage within the absolute maximum range of (V CC2 –15V) to (GND2 +15V) levels. The maximum V CC2 cur- rent in this condition is 250mA. If the pin voltage exceeds about ±10V, current limit folds back to about half of the peak value to reduce overall power dissipation and avoid damaging the part. The device also features thermal shutdown protection that disables the driver and receiver output in case of excessive power dissipation (See Note 4 in the Electrical Characteristics section). SLO Mode The LTM2881 features a logic-selectable reduced slew rate mode (SLO mode) that softens the driver output edges to
reduce EMI emissions from equipment and data cables. 200mV, the state of RO will reflect the polarity of (A-B).
2881 F09a
2881 F09b
the entire common mode range of –7V to 12V. of less than ±1µA for voltages within the supply range. looking into A and B is shown in Figure 10. Figure 10. Equivalent Input Resistance into A and B
impedance, reflections will distort the signal waveforms. nce when configuring transceiver networks. Figure 13. Termination Magnitude and Phase vs Frequency Figure 12. Termination Resistance vs Common Mode VoltageFigure 11. Curve T race Between A and B with Termination
2881 F11
2881 F13
Figure 14. Supply Current vs Data Rate
2881 F14
phase of the termination impedance versus frequency.
can be used with control from TE. maintain the specified driver output swing.
- Input and Output decoupling is not required, since these components are integrated within the package. An additional bulk capacitor with a value of 6.8µF to 22µF is recommended. The high ESR of this capaci- tor reduces board resonances and minimizes voltage spikes caused by hot plugging of the supply voltage. For EMI sensitive applications, an additional low ESL ceramic capacitor of 1µF to 4.7µF, placed as close to the power and ground terminals as possible, is rec - ommended. Alternatively, a number of smaller value parallel capacitors may be used to reduce ESL and achieve the same net capacitance. Do not place copper on the PCB between the inner columns of pads. This area must remain open to withstand the rated isolation voltage. The use of solid ground planes for GND and GND2 is recommended for non-EMI critical applications to optimize signal fidelity, thermal performance, and to minimize RF emissions due to uncoupled PCB trace conduction. The drawback of using ground planes, where EMI is of concern, is the creation of a dipole antenna structure which can radiate differential volt- ages formed between GND and GND2. If ground planes are used it is recommended to minimize their area, and use contiguous planes as any openings or splits can exacerbate RF emissions. For large ground planes a small capacitance (≤ 330pF) from GND to GND2, either discrete or embedded within the substrate, provides a low impedance current return path for the module parasitic capacitance, minimizing any high frequency differential voltages and substan- tially reducing radiated emissions. Discrete capacitance will not be as effective due to parasitic ESL. In addi - tion, voltage rating, leakage, and clearance must be considered for component selection. Embedding the capacitance within the PCB substrate provides a near ideal capacitor and eliminates component selection issues; however , the PCB must be 4 layers. Care must be exercised in applying either technique to insure the voltage rating of the barrier is not compromised. applicaTions inForMaTion PCB Layout Considerations The high integration of the LTM2881 makes PCB layout very simple. However , to optimize its electrical isolation characteristics, EMI, and thermal performance, some layout considerations are necessary. Under heavily loaded conditions VCC and GND current can exceed 300mA. Sufficient copper must be used on the PCB to insure resistive losses do not cause the supply voltage to drop below the minimum allowed level. Similarly, the V CC2 and GND2 conductors must be sized to support any external load current. These heavy copper traces will also help to reduce thermal stress and improve the thermal conductivity.
Figure 15. PROFIBUS-DP Connections with Termination
2881 F15
Figure 17. Low EMI Demo Board Emissions
2881 F17
Figure 18. Cable Length vs Data Rate the discrete capacitors are more effective below 400MHz. 20Mbps shows the maximum data rate when SLO is high. signed per the data sheet PCB layout recommendations. Specific limits per test are detailed in Table 1.
2881 F18DATA RATE (bps)
Figure 21. Switched 5V Power with Isolated CMOS Logic Connection with Low Voltage Interface Figure 22. 4-Wire Full Duplex Self Biasing for Unshielded CAT5 Connection
2881 F21
2881 F22
Figure 19. Isolated System Fault Detection
2881 F19
Figure 20. Full-Duplex RS485 Connection
2881 F20
2881fiFor more information www.linear .com/L TM2881 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. SOLDER BALL COMPOSITION IS 96.5% Sn/3.0% Ag/0.5% Cu
7 PACKAGE ROW AND COLUMN LABELING MAY VARY
AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS BALL DESIGNATION PER JESD MS-028 AND JEP95 DETAILS OF PIN #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PIN #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE PACKAGE TOP VIEW PIN “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW BGA 32 1112 REV D L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” DETAIL A PIN 1 0.000 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 6.350 5.080 5.080 0.000 DETAIL A Øb (32 PLACES) F G H L J K E A B C D 2 14 35 6 7 8 DETAIL B SUBSTRATE 0.27 – 0.37 2.45 – 2.55 // bbb Z D A ccc Z DETAIL B PACKAGE SIDE VIEW MOLD CAP Z M X Y Z ddd M Z eee 0.630 ±0.025 Ø 32x SYMBOL A b D E e F G aaa bbb ccc ddd eee MIN 3.22 0.50 2.72 0.60 0.60 NOM 3.42 0.60 2.82 0.75 0.63 15.0 11.25 1.27 12.70 8.89 MAX 3.62 0.70 2.92 0.90 0.66 0.15 0.10 0.20 0.30 0.15 NOTES DIMENSIONS TOTAL NUMBER OF BALLS: 32 E b e e b F G 32-Lead (15mm × 11.25mm × 3.42mm) (Reference LTC DWG # 05-08-1851 Rev D) SEE NOTES package DescripTion Please refer to http://www.linear .com/product/LTM2881#packaging for the most recent package drawings.
2881fi For more information www.linear .com/L TM2881 package DescripTion Please refer to http://www.linear .com/product/LTM2881#packaging for the most recent package drawings. NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M-1994 2. ALL DIMENSIONS ARE IN MILLIMETERS LAND DESIGNATION PER JESD MO-222 5. PRIMARY DATUM -Z- IS SEATING PLANE 6. THE TOTAL NUMBER OF PADS: 32 DETAILS OF PAD #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE PAD #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE DETAIL B DETAIL B SUBSTRATE MOLD CAP 0.290 – 0.350 2.400 – 2.600 bbb Z Z PACKAGE TOP VIEW 11.25 BSC 15.00 BSC PAD “A1” CORNER X Y aaa Z aaa Z PACKAGE BOTTOM VIEW PADS SEE NOTES SUGGESTED PCB LAYOUT TOP VIEW LGA 32 0113 REV A L TMXXXXXX µModule TRAY PIN 1 BEVEL PACKAGE IN TRAY LOADING ORIENTATION COMPONENT PIN “A1” 8.89 BSC 1.27 BSC 0.635 0.635 1.905 1.905 3.175 3.175 4.445 4.445 6.350 6.350 5.080 5.080 0.000 SYMBOL aaa bbb eee TOLERANCE 0.10 0.10 0.05 DETAIL A 0.630 ±0.025 Ø 32x S Y X eee DETAIL C 0.630 ±0.025 Ø 32x S Y X eee F G H L J K E A B C D 2 14 35 6 7 2.69 – 2.95 DETAIL A 12.70 BSC DETAIL c 32-Lead (15mm × 11.25mm × 2.82mm) (Reference L TC DWG # 05-08-1773 Rev A) PAD 1 SEE NOTES AMONG µModule PRODUCTS. REVIEW EACH PACKAGE LAYOUT CAREFULL Y
2881fiFor more information www.linear .com/L TM2881 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER A 3/10 Changes to Features, Description and Typical Application Add BGA Package to Pin Configuration, Order Information and Package Description Sections Changes to LGA Package in Pin Configuration Section Changes to Electrical Characteristics Section Changes to Graphs G09, G13, G14 Update to Pin Functions Update to Applications Information Change to X-Axis on Figures 9a and 9b Update to Supply Current Section “PCB Layout Isolation Considerations” Section Replaced RF , Magnetic Field Immunity Section Added Changes to Related Parts 2, 19 6, 7 B 8/10 H-Grade parts added. Reflected throughout the data sheet. 1-22 C 5/11 HV-Grade parts removed. Reflected throughout the data sheet. Updated the PCB Layout section. Updated the Related Parts. 1-24 15, 16, 17 D 1/12 HV and MPY parts added. Reflected throughout the data sheet. 1-24 E 4/12 Added H/MP-Grade condition for I OZD Corrected Figure 15 F 2/13 Storage Temperature Range corrected 2 G 4/14 Added lead finish part numbers Added CTI and DTI parameters H 8/14 I CC2S, VCC2 Short-Circuit Current: Deleted max spec. Added typical spec. Removed temp dot. 4 I 4/16 Added CSA information Changed ICCS limits J 11/16 Corrected LGA Part Marking 3
Figure 23. Multi-Node Network with End Termination