LTC8043

LTC8043 LINER | Alldatasheet

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Technical content

n Improved Direct Replacement for DAC-8043 and MAX543 n SO-8 Package n DNL and INL Over Temperature: ±0.5LSB n Easy, Fast and Flexible Serial Interface n ±1LSB Maximum Gain Error n 4-Quadrant Multiplication n Low Power Consumption n Low Cost The LTC 8043 is a serial-input 12-bit multiplying digital- to-analog converter (DAC). It is a superior pin compatible replacement for the DAC-8043. Improvements include better accuracy, better stability over temperature and supply variations, lower sensitivity to output amplifier offset, tighter timing specifications and lower output ca- pacitance. An easy-to-use 3-wire serial interface is well-suited to remote or isolated applications The LTC8043 is extremely versatile. It can be used for 2-quadrant and 4-quadrant multiplying, programmable gain and single supply applications, such as noninverting voltage output mode. Parts are available in 8-pin SO and PDIP packages and are specified over the extended industrial temperature range, –40 °C to 85°C. FEATURES DESCRIPTIONU n Process Control and Industrial Automation n Remote Microprocessor-Controlled Systems n Digitally Controlled Filters and Power Supplies n Programmable Gain Amplifiers n Automatic Test Equipment APPLICATIONSU , LTC and LT are registered trademarks of Linear Technology Corporation. TYPICAL APPLICATIONU SO-8 Multiplying DAC Has Easy 3-Wire Serial Interface VDD VREF LTC8043 RFB GND VIN CLOCK DATA LOAD CLK SRI LD 1 2 3IOUT 33pF VOUT LTC8043 • TA01 LT®1097 Integral Nonlinearity Over Temperature DIGITAL INPUT CODE –1.0 INTEGRAL NONLINERARITY (LSB) –0.5 1.0 1024 2048 2560 LTC8043 • TPC02 0.5 512 1536 3072 3584 4095 TA = 25°C TA = 85°C TA = –40°C

SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS Resolution l 12 12 Bits INL Integral Nonlinearity (Note 1) l ±0.5 ± 1 LSB DNL Differential Nonlinearity Guaranteed Monotonic, T MIN to TMAX l ±0.5 ± 1 LSB GE Gain Error (Note 2) T A = 25°C ±1 ±2 LSB TMIN to TMAX l ±2 ±2 LSB Gain Temperature Coefficient (Note 3) l 15 15p p m / °C (ΔGain/ΔTemp) ILKG Output Leakage Current (Note 4) T A = 25°C ±5 ±5n A TMIN to TMAX l ±25 ±25 nA Zero-Scale Error T A = 25°C ±0.03 ±0.03 LSB TMIN to TMAX l ±0.15 ±0.15 LSB PSRR Power Supply Rejection Ratio V DD = 5V ±5% l ±0.0001 ±0.002 ±0.0001 ±0.002 %/% ABSOLUTE MAXIMUM RATINGSW WW U PACKAGE/ORDER INFORMATIONW UU LTC8043EN8 LTC8043FN8 LTC8043ES8 LTC8043FS8 ORDER PART NUMBER Consult factory for Military grade parts. ACCURACY CHARACTERISTICS VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified.

ELECTRICAL CHARACTERISTICS

VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified. TJMAX = 150°C, θJA = 130°C/ W (N8) TJMAX = 150°C, θJA = 190°C/ W (S8) TOP VIEW S8 PACKAGE 8-LEAD PLASTIC SO N8 PACKAGE 8-LEAD PDIP V REF RFB IOUT GND VDD CLK SRI LD ALL GRADES SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Reference Input RREF VREF Input Resistance (Note 5) l 71 1 1 5 k Ω AC Performance (Note 3) Output Current Settling Time (Notes 6, 7) l 0.25 1 µs Multiplying Feedthrough Error V REF = ±10V, 10kHz Sinewave l 0.7 1 mV P-P Digital-to-Analog Glitch Energy (Notes 6, 8) l 2 20 nVSEC THD Total Harmonic Distortion (Note 9) l – 108 – 92 dB Output Noise Voltage Density (Note 10) l 17 nV/ √Hz Analog Outputs (Note 3) COUT Output Capacitance DAC Register Loaded to All 1s l 60 90 pF DAC Register Loaded to All 0s l 30 60 pF

VDD = 5V, VREF = 10V, VIOUT = GND = 0V, TA = TMIN to TMAX, unless otherwise specified. Note 7: To 0.01% for a full-scale change, measured from falling edge of LD. Note 8: VREF = 0V. DAC register contents changed from all 0s to all 1s or from all 1s to all 0s. Note 9: VREF = 6VRMS at 1kHz. DAC register loaded with all 1s. Note 10: 10Hz to 100kHz between RFB and IOUT. Calculation from en = √4KTRB where: K = Boltzmann constant (J/K°); R = resistance (Ω ); T = resistor temperature (°K); B = bandwidth (Hz). BLOCK DIAGRAMW The l denotes specifications which apply over the full operating temperature range. Note 1: ±0.5LSB = ±0.012% of full scale. Note 2: Using internal feedback resistor. Note 3: Guaranteed by design, not subject to test. Note 4: IOUT with DAC register loaded with all 0s. Note 5: Typical temperature coefficient is 100ppm/°C. Note 6: IOUT load = 100Ω in parallel with 13pF. 40k 10k40k 20k 40k 20k 40k 20k 40k40k40k DECODER BIT 1 (MSB) BIT 2 BIT 3 BIT 4 BIT 12 (LSB) CLK IN LOAD VDD VREF RFB IOUT SRI6 GND4 8043 BD DAC REGISTER INPUT 12-BIT SHIFT REGISTER LD CLK ALL GRADES SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Digital Inputs VIH Digital Input High Voltage l 2.4 V VIL Digital Input Low Voltage l 0.8 V IIN Digital Input Current V IN = 0V to VDD l 0.001 ± 1 µA CIN Digital Input Capacitance V IN = 0V,(Note 3) l 8p F Timing Characteristics (Note 3) tDS Serial Input to Clock Setup Time l 30 – 5 ns tDH Serial Input to Clock Hold Time l 60 25 ns tSRI Serial Input Data Pulse Width l 80 ns tCH Clock Pulse Width High l 80 ns tCL Clock Pulse Width Low l 80 ns tLD Load Pulse Width l 140 ns tASB LSB Clocked into Input Register l 0n s to Load DAC Register Time Power Supply VDD Supply Voltage l 4.75 5 5.25 V IDD Supply Current Digital Inputs = 0V or V DD l 100 µA Digital Inputs = VIH or VIN l 500 µA Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Table 1. Unipolar Binary Code Table Table 2. Bipolar Offset Binary Code Table