LTC7138

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Rev. EFor more information www.analog.comDocument Feedback V IN = 135V 20ns/DIV V INP 2V/DIV V LOAD 50V/DIV

7000 TA01b

High Side NMOS Static Switch Driver The LTC®7000/LTC7000-1 is a fast high side N-channel MOSFET gate driver that operates from input voltages up to 135V. It contains an internal charge pump that fully enhances an external N-channel MOSFET switch, allowing it to remain on indefinitely. Its powerful driver can easily drive large gate capacitances with very short transition times, making it well suited for both high frequency switching applications or static switch applications that require a fast turn-on and/or turn-off time. When an internal comparator senses that the switch current has exceeded a preset level, a fault flag is asserted and the switch is turned off after a period of time set by an external timing capacitor . After a cooldown period, the LTC7000/LTC7000-1 automatically retries. The LTC7000/ LTC7000-1 is available in the thermally- enhanced 16-lead MSOP packages. LTC7000 LTC7000-1 Package 16-Lead MSOP MSE16 16-Lead MSOP MSE16(12) High Voltage Pin Spacing 0.157mm 0.657mm RUN/OVLO/ISET/IMON Pins Yes No High Side Switch with 100% Duty Cycle and Overcurrent Protection Turn-On T ransient Waveform n Wide Operating VIN: 3.5V to 135V (150V Abs Max) n 1Ω Pull-Down, 2.2Ω Pull-Up for Fast Turn-On and Turn-Off Times with 35ns Propagation Delays n Internal Charge Pump for 100% Duty Cycle n Short-Circuit Protected n Adjustable Current T rip Threshold (LTC7000) n Current Monitor Output (LTC7000) n Automatic Restart Timer n Open-Drain Fault Flag n Adjustable Turn-On Slew Rate n Gate Driver Supply from 3.5V to 15V n Adjustable VIN Undervoltage and Overvoltage Lockouts (LTC7000) n Adjustable Driver Supply VCC Undervoltage Lockout n Low Shutdown Current: 1µA n CMOS Compatible Input n Thermally Enhanced, High Voltage Capable 16-Lead MSOP Packages n AEC-Q100 Qualified for Automotive Applications

APPLICATIONS

n Load and Supply Switch Driver n Electronic Valve Driver n High Frequency High Side Gate Driver 1µF 0.1µF 100k 1nF 0.007/uni03A9 LOAD 3.5V TO 135V 3A CONTINUOUS MAX V IN V CC FAUL T TIMER INP SNS SNS– BST TGUP TGDN TS L TC7000-1 V CCUV VIN 3.5V TO 135V

7000 TA01a

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Rev. E For more information www.analog.com TABLE OF CONTENTS

Electrical Characteristics

Typical Performance Characteristics Pin Functions Block Diagram Timing Diagram Applications Information Package Description

Revision History

Rev. EFor more information www.analog.com PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Supply Voltages BST-TS TS Voltage SNS+ – SNS– INP Voltage Driver Outputs TGUP, TGDN TIMER, FAULT, Voltages (Note 1) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC7000EMSE#PBF LTC7000EMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 125°C LTC7000IMSE#PBF LTC7000IMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 125°C LTC7000JMSE#PBF LTC7000JMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 150°C LTC7000HMSE#PBF LTC7000HMSE#TRPBF 7000 16-Lead Plastic MSOP –40°C to 150°C LTC7000MPMSE#PBF LTC7000MPMSE#TRPBF 7000 16-Lead Plastic MSOP –55°C to 150°C LTC7000EMSE-1#PBF LTC7000EMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 125°C LTC7000JMSE-1#PBF LTC7000JMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 125°C LTC7000HMSE-1#PBF LTC7000HMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 150°C LTC7000IMSE-1#PBF LTC7000IMSE-1#TRPBF 70001 16-Lead Plastic MSOP –40°C to 150°C LTC7000MPMSE-1#PBF LTC7000MPMSE-1#TRPBF 70001 16-Lead Plastic MSOP –55°C to 150°C LTC7000 LTC7000-1 RUN V IN VCC VCCUV FAUL T TIMER INP OVLO GND SNS SNS– BST TS TGUP TGDN I MON ISET TOP VIEW MSE PACKAGE 16-LEAD PLASTIC MSOP (NOTE 6) TJMAX = 150°C, θJA = 45°C/W , θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB TOP VIEW MSE PACKAGE VARIATION: MSE16 (12) 16-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 45°C/W , θJC = 10°C/W EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB VIN VCC VCCUV FAUL T TIMER INP SNS+ SNS– BST TS TGUP TGDN GND RUN Voltage (LTC7000) Operating Junction Temperature Range (Notes 2, 3, 4) LTC 7000E, LTC7000E-1, LTC7000I, LTC 7000J, LTC7000J-1 LTC to 150°C LTC 7000MP, LTC7000MP-1 Storage Temperature Range Lead Temperature (Soldering, 10 sec) M

Rev. E For more information www.analog.com ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE AUTOMOTIVE PRODUCTS** LTC7000EMSE#WPBF LTC7000EMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 125°C LTC7000IMSE#WPBF LTC7000IMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 125°C LTC7000JMSE#WPBF LTC7000JMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 150°C LTC7000HMSE#WPBF LTC7000HMSE#WTRPBF 7000 16-Lead Plastic MSOP −40°C to 150°C LTC7000EMSE-1#WPBF LTC7000EMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 125°C LTC7000IMSE-1#WPBF LTC7000IMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 125°C LTC7000JMSE-1#WPBF LTC7000JMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 150°C LTC7000HMSE-1#WPBF LTC7000HMSE-1#WTRPBF 70001 16-Lead Plastic MSOP −40°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.

Rev. EFor more information www.analog.com SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supplies VIN Input Voltage Operating Range 3.5 150 V TS Operating Voltage Range 0 135 V SNS+/– Input Voltage Range Independent of VIN 3.5 150 V Total Supply Current (Note 8) On or Sleep, Charge Pump Regulating ON Mode, Charge Pump Overdriven Sleep Mode, Charge Pump Overdriven Shutdown Mode CVCC = 1µF, VRUN = 2V, VBST = OPEN, VTS = VSNS = 12V VINP = 4V, VRUN = 2V, VBST-TS = 13V VINP = 0.4V, VRUN = 2V, VBST-TS = 13V VRUN = 0V (LTC7000) l l 250 µA µA μA μA V IN DC Supply Current, Charge Pump Overdriven (Note 5) ON Mode Sleep Mode Shutdown Mode CVCC = 1µF, VBST-TS = 13V, VINP = 4V, VRUN = 2V VINP = 0.4V, VRUN = 2V VRUN = 0V (LTC7000) µA μA μA SNS + Current VINP = 4V, VRUN = 2V VINP = 0.4V, VRUN = 2V VRUN = 0V (LTC7000) µA μA μA SNS – Current VINP = 4V, VRUN = 2V VINP = 0.4V, VRUN = 2V VRUN = 0V (LTC7000) l 2 4 6.5 µA μA μA V CC LDO Output Voltage CVCC = 1µF, VIN = 12V 10 V VCC LDO Dropout Voltage (VIN-VCC) VIN = 6V, IVCC = –1mA 0.2 V VCC UVLO VCC Undervoltage Lockout VCCUV = OPEN, VIN = VCC VCC Rising VCC Falling Hysteresis VCCUV = 0V, VIN = VCC VCC Rising VCC Falling Hysteresis VCCUV = 1.5V, VIN = VCC VCC Rising VCC Falling Hysteresis l l l l 6.5 5.8 3.1 2.8 9.7 9.1 7.0 6.4 600 3.5 3.2 300 10.5 9.9 600 7.5 6.9 3.7 3.4 10.9 10.3 V V mV V V mV V V mV Bootstrapped Supply (BST -TS) VBST-TS VTG Above VTS with INP = 3V (DC) VIN = VCC = VTS = 7V, IBST = 0µA VIN = VCC = VTS = 10V, IBST = 0µA VIN = VTS = 135V, IBST = 0µA l l V V V Charge Pump Output Current V TS = 20V, VBST-TS = 10V l –15 –30 µA BST-TS Floating UVLO BST-TS Rising BST-TS Falling 3.1 2.8 V V Output Gate Driver (TG) TG Pull-Up Resistance VIN = VBST = 12V l 2.2 7 Ω TG Pull-Down Resistance VIN = VBST = 12V l 1 4 Ω tr Output Rise Time 10% to 90%, CL = 1nF 10% to 90%, CL = 10nF ns ns tf Output Fall Time 10% to 90%, CL = 1nF 10% to 90%, CL = 10nF ns ns tPLH tPHL Input to Output Propagation Delay VINP Rising, CL = 1nF VINP Falling, CL = 1nF l l ns ns The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VSNS+ = 10V, VCC = VBST = 10V, VTS = GND = 0V, unless otherwise noted.

Rev. E For more information www.analog.com Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The LTC7000/LTC7000-1 is tested under pulsed load conditions such that T J ≈ TA. The LTC7000E/LTC7000E-1 is guaranteed to meet performance specifications from 0°C to 85°C. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC7000I/LTC7000I-1 is guaranteed over the –40°C to 125°C operating junction temperature range, the LTC7000H/LTC7000H-1 is guaranteed over the –40°C to 150°C operating junction temperature range, the LTC7000J/LTC7000J-1 is guaranteed over the –40°C to 150°C operating junction temperature range, and the LTC7000MP/LTC7000MP-1 is tested and guaranteed over the –55°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environmental factors. Note 3: The junction temperature (T J, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD • θJA), where θJA is 45°C/ W. Note 4: This IC includes over temperature protection that is intended to protect the device during momentary overload conditions. The maximum rated junction temperature will be exceeded when this protection is active. Operation above the specified absolute maximum operating junction temperature may impair device reliability or permanently damage the device. Note 5: Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. See Applications Information. Note 6: For application concerned with pin creepage and clearance distances at high voltages, the MSE16(12) variation package should be used. See Applications Information. Note 7: Do not apply a voltage or current source to these pins. They must be connected to capacitive loads only; otherwise permanent damage may occur . Note 8: Total supply current is the sum of the current into the V IN, SNS+, SNS– and TS pins. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating junction temperature range, otherwise specifications are at TA = 25°C (Note 2). VIN = VSNS+ = 10V, VCC = VBST = 10V, VTS = GND = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Operation VIH VIL Input Threshold Voltages VINP Rising VINP Falling Hysteresis l l 1.7 1.3 1.6 400 2.2 1.8 V V mV Input Pull-Down Resistance VINP = 1V 1 MΩ RUN and OVLO Pin Threshold Voltages Rising Falling Hysteresis 1.16 1.05 1.21 1.10 110 1.26 1.15 V V mV RUN and OVLO Leakage Current V RUN = 1.3V, VOVLO = 1.3V l –100 0 100 nA TIMER Threshold Voltage VTIMER Rising to VFAUL T Going Low 1.25 1.3 1.35 V TIMER Early Warning Voltage VFAUL T Going Low to (TG-TS) Going Low 75 100 125 mV TIMER Pin Fault Pull-Up Current VTIMER = 1.0V, ISET = OPEN l –115 –100 –80 µA TIMER Pin Pull-Down Current VTIMER = 0.6V ISET = OPEN ΔVSNS = 0mV 2.0 2.5 3.0 µA FAUL T Output Low Voltage IFAUL T = 1mA l 0.2 0.5 V FAUL T Leakage Current VFAUL T = 5V l –100 0 100 nA ΔVTH Current Sense Threshold Voltage ΔVSNS = (VSNS+ – VSNS–) ISET = OPEN or LTC7000-1 VISET = 1.2V (LTC7000 Only) VISET = 0V (LTC7000 Only) l 22 mV D Retry Duty Cycle Δ VSNS = 200mV CTIMER = 1nF l 0.06 0.1 % ISET (LTC7000 Only) and VCCUV Pull-Up Current V ISET = 1.0V, VCCUV = 1.0V –11.3 –10 –8.7 µA IMON Output Voltage (LTC7000 Only) ΔVSNS = 60mV, VTIMER = 0V, VINP = 3.5V ΔVSNS = 30mV, VTIMER = 0V, VINP = 3.5V ΔVSNS = 0mV, VTIMER = 0V, VINP = 3.5V l 1.12 0.52 1.2 0.6 1.28 0.68 0.1 V V V Over -Current to TG Low Propagation Delay ΔVSNS Step 10mV to 50mV, ISET = OPEN, VTIMER = VCC, VINP = 3.5V 70 ns

Rev. EFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Total Supply Current vs VIN Voltage Driver On Resistance vs VBST-TS Voltage Charge Pump No-Load Output Voltage vs V TS Charge Pump Load Regulation Charge Pump Output Current vs V TS ∆VTH vs Temperature RUN and OVLO Threshold Voltages vs Temperature V CCUV Lockout vs Temperature Driver On Resistance vs Temperature V SNS+ = V SNS– = V TS V TS (V) 0.5 1.0 1.5 2.0 2.5 3.0 CURRENT (mA)

7000 G01

VIN = 5V VIN = 12V I BST = 0µA V CC = 4V V CC = 5V V CC = 6V V CC = 7V V CC ≥ 8V V TS (V) V BST - V TS (V)

7000 G03

V CCUV = 0V TGUP TGDN V BST-TS (V) R DSON (/uni03A9)

7000 G02

V CC = 4V VTS = 4V VTS = 6V VTS = 8V VTS = 10V VTS = 12V I BST (µA) –20 –40 –60 –80 V BST TS (V)

7000 G04

V CC = 7V V BST-TS = 10V 25°C 150°C V TS (V) 120 150 –45.0 –35.0 –25.0 –15.0 –5.0 5.0 I BST (µA)

7000 G05

ISET = 0V ISET = OPEN ISET = 1.2V ISET = 1.5V TEMPERATURE (°C) –50 100 150 THRESHOLD VOL TAGE (mV) CURRENT SENSE

7000 G06

TEMPERATURE (°C) –50 100 150 1.05 1.10 1.15 1.20 1.25 THRESHOLD VOL TAGE (V)

7000 G07

V CCUV = OPEN RISING FALLING TEMPERATURE (°C) –50 100 150 5.0 5.5 6.0 6.5 7.0 7.5 8.0 V CCUV LOCKOUT (V)

7000 G08

V BST–TS = 12V TGUP TGDN TEMPERATURE (°C) –50 100 150 RESISTANCE (/uni03A9)

7000 G09

TA = 25°C, unless otherwise noted.

Rev. E For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS VIN Supply Current vs Temperature SNS+ Supply Current vs Temperature SNS– Supply Current vs Temperature Input Threshold Voltage vs Temperature SNS+ FAUL T Threshold vs Temperature Overcurrent to TGDN = LOW Delay Time vs Temperature Retry Duty Cycle vs Temperature V BST-TS Floating UVLO Voltage vs Temperature ISET and VCCUV Pull-Up Current vs Temperature TEMPERATURE (°C) –50 100 150

7000 G10

CURRENT (µA) VIN = 10V TEMPERATURE (°C) –50 100 150 –10 CURRENT (µA)

7000 G11

ON VIN = VSNS+ = VSNS– = 10V SHUTDOWN, SLEEP ON TEMPERATURE (°C) –50 100 150 –2.0 2.0 4.0 6.0

7000 G12

CURRENT (µA) VIN = VSNS+ = VSNS– = 10V V IN = 10V RISING FALLING TEMPERATURE (°C) –50 100 150 0.5 1.0 1.5 2.0 2.5 3.0 THRESHOLD VOL TAGE (V)

7000 G13

TEMPERATURE (°C) –50 100 150 3.0 3.1 3.2 3.3 3.4 THRESHOLD VOL TAGE (V)

7000 G15

CTIMER = 1nF TEMPERATURE (°C) –50 100 150 TIME (µs) C TIMER = 1nF TEMPERATURE (°C) –50 100 150 0.060 0.065 0.070 0.075 0.080 DUTY CYCLE (%)

7000 G16

TEMPERATURE (°C) –50 100 150 2.0 2.5 3.0 3.5 4.0 THRESHOLD VOL TAGE (V)

7000 G17

TEMPERATURE (°C) –50 100 150 –11.0 –10.5 –10.0 –9.5 –9.0 PULL–UP CURRENT (µA)

7000 G18

VISET = 1.0V (L TC7000 ONL Y) VVCCUV = 1.0V TA = 25°C, unless otherwise noted.

Rev. EFor more information www.analog.com PIN FUNCTIONS RUN (Pin 1/NA): Run Control Input. A voltage on this pin above 1.21V enables normal operation. Forcing this pin below 0.7V shuts down the LTC7000, reducing quiescent current to approximately 1µA. Optionally connect to the input supply through a resistive divider to set the under- voltage lockout. V IN (Pin 2/Pin 1): Main Supply Pin. A bypass capacitor with a minimum value of 0.1µF should be tied between this pin and GND. VCC (Pin 3/Pin 3): Output of internal LDO and power sup- ply for gate drivers and internal circuitry. Decouple this pin to GND with a minimum 1.0µF low ESR ceramic capacitor . Do not use the V CC pin for any other purpose. V CC can be overdriven from an external high efficiency source for high frequency switching applications that require higher power delivered to the external MOSFET . Do not connect V CC to a voltage greater than VIN. VCCUV (Pin 4/Pin 5): V CC Supply Undervoltage Lockout. A resistor on this pin sets the reference for the Gate Drive undervoltage lockout. The voltage on this pin in the range of 0.4V to 1.5V is multiplied by 7 to be the undervoltage lockout for the Gate Drive (V CC pin). Short to ground to set the minimum gate drive UVLO of 3.5V. Leave open to set gate drive UVLO to 7.0V FAUL T (Pin 5/Pin 6): Open Drain Fault Output. This pin pulls low after the voltage on the TIMER pin has reached the fault threshold of 1.3V. It indicates the pass transistor is about to turn off due to an overcurrent condition. The typical pull-down impedance is 200Ω. The FAUL T pin does not go to a high-impedance state until the overcurrent condition and the TIMER cooldown period expire. If the TIMER pin is pulled above 3.5V, the TIMER function is disabled. In this state this pin pulls low when the VTGUP-TS signal is driven high. TIMER (Pin 6/Pin 7): Fault Timer Input. A timing capaci- tor, CT, from the TIMER pin to GND sets the times for fault w arning, fault turn off and retry periods (see Applications Information). When the TIMER pin is connected to a volt- age higher than 3.5V, an overcurrent condition will immedi- ately pull the TGDN pin to TS. TGUP will not go high again until the fault condition is reset by the INP pin going low and then back high. INP (Pin 7/Pin 8): Input Signal. CMOS compatible input reference to GND that sets the state of TGDN and TGUP pins (see Applications Information). INP has an internal 1MΩ pull-down to GND to keep TGDN pulled to TS during startup transients. OVLO (Pin 8/NA): Overvoltage Lockout Input. Connect to the input supply through a resistor divider to set the overvoltage lockout level. A voltage on this pin above 1.21V causes TGDN to be pulled to TS. Normal operation resumes when the voltage on this pin decreases below 1.11V. T riggering an OVLO causes a fault condition. OVLO should be tied to GND when not used. ISET (Pin 9/NA): Current T rip Threshold Set. A resistor on this pin to GND sets the peak current threshold. The voltage on this pin (internally clamped between 0.4V and 1.5V) is divided by 20 to be the current comparator ref - erence. Short to GND for minimum peak current (20mV ΔVTH). Leave open for an accurate peak current (30mV ΔVTH). IMON (Pin 10/NA): Current Monitor . The voltage on this pin with respect to GND represents the voltage across the sense resistor multiplied by 20. The range on this pin is 0V to 1.5V. TGDN (Pin 11/Pin 9): High Current Gate Driver Pull-Down. This pin pulls down to TS. For the fastest turn-off, tie this pin directly to the gate of the external high side MOSFET . TGUP (Pin 12/Pin 10): High Current Gate Driver Pull-Up. This pin pulls up to BST . Tie this pin to TGDN for maxi - mum gate drive transition speed. A resistor can be con - nected between this pin and the gate of the external MOSFET to control the in-rush current during turn-on. See Applications Information. TS (Pin 13/Pin 11): Top (High Side) source connection or GND if used in ground referenced applications. BST (Pin 14/Pin 12): High Side Bootstrapped Supply. An external capacitor with a minimum value of 0.1µF should be tied between this pin and TS. Voltage swing on this pin is 12V to (VIN + 12V). (LTC7000/LTC7000-1)

Rev. E For more information www.analog.com PIN FUNCTIONS BLOCK DIAGRAM SNS– (Pin 15/Pin 14), SNS+ (Pin 16/Pin 16): Current Sense Comparator Input. Place a sense resistor in series with the drain of the external MOSFET to set the peak current. The SNS – pin should be connected to the sense resistor using a minimum 100Ω resis - tor . Use a Kelvin connection from the SNS+ pin to the sense resistor . The current comparator trip threshold voltage, ΔVTH is the I SET voltage divided by 20. The trip threshold is internally clamped to a minimum of 20mV and a maximum of 75mV. If ISET is open or greater than 2.0V, ΔVTH is set internally to 30mV. GND (Exposed Pad Pin 17): Ground. The exposed pad must be soldered to the PCB for rated electrical and ther- mal performance. 1.0V 20mV TO 75mV 7000 BD LOAD CT 1.21V LOGIC LEVEL SHIFT UP LEVEL SHIFT DOWN CHARGE PUMP 102.5µA/5µA 200/uni03A9 2.3V 2.3V 2.5µA SNS+ SNS+ 3.2V SNS– BST TGUP TS TGDN FAUL T TIMER V CC R RUN VCCUV OVLO INP V IN ISET IMON 3.5V 1.4V 1.3V 0.4V 10µA 2.3V 100k 10µA RSNS CVCC CB PCH NCH /20 3.5V TO 135V 20x VCC (OPTIONAL) RF LT

Rev. EFor more information www.analog.com OPERATION The LTC7000/LTC7000-1 is designed to receive a ground- referenced, low voltage digital input signal, INP and quickly drive and protect a high side N-channel power MOSFET whose drain can be up to 150V above ground. The LTC7000/LTC7000-1 is capable of driving a 1nF load using a 12V bootstrapped supply voltage (VBST–VTS) with 35ns of propagation delay and fast rise/fall times. The high gate drive voltage reduces external power losses associated with external MOSFET on-resistance. The strong drivers not only provide fast turn on and off times but hold the TGUP and TGDN to TS voltages in the desired state in the presence of high slew rate transients which can occur driving inductive loads at high voltages. Overcurrent Protection The LTC7000/LTC7000-1 protects a high side N-channel MOSFET from an overcurrent condition by monitoring the voltage across an external sense resistor placed in series with the drain of an external MOSFET and forcing the external MOSFET to turn off by pulling TGDN to TS when the voltage across the sense resistor, ΔV SNS, exceeds the current comparator threshold voltage, ΔV TH, after a period of time set by the timing capacitor, C T. When an overcurrent condition is detected with I SET open, ΔVTH is internally programmed to a low value of 30mV minimizing the external conduction loss associated with current sensing by allowing the use of lower value sense resistors. A resistor placed between I SET and ground allows ΔVTH to be programmed from 20mV to 75mV. An adjustable fault and overcurrent timer is enabled by placing a capacitor, C T from the TIMER pin to ground and allows the load to continue functioning during brief overcurrent transient events while protecting the MOSFET from long periods of high currents. An external fault flag is available which can warn of an impending MOSFET turn off. A fast turn-off mode where TGDN is immediately pulled to TS due to an overcurrent is available by connecting the TIMER pin to V CC. Current Monitor (LTC7000 Only) The LTC7000 provides an output voltage referenced to ground on the IMON pin that reflects the current flowing through the external sense resistor connected between SNS+ and SNS– while TGUP is high. The voltage on IMON is the voltage difference between the SNS+ and SNS– pins multiplied by 20x and referenced to ground with a range of 0V to 1.5V. The I MON output voltage has an output impedance of 100kΩ and is pulled to ground with a 100kΩ resistor when INP is low. VCC Power Power for the MOSFET driver and internal circuitry is derived from the V CC pin. The V CC pin voltage is gener - ated from an internal P-channel LDO connected to V IN. VCC can also be overdriven from a high efficiency exter - nal source for high frequency switching applications that require higher power delivered to external MOSFET. VCC should never be driven higher than V IN or permanent damage to the LTC7000/LTC7000-1 could occur. (Refer to Block Diagram) TIMING DIAGRAM INPUT (INP) OUTPUT (TG-TS) INPUT RISE/FALL TIME < 10ns t PLH t r t PHL t f 90% 10% V IH V IL 7000 TD

Rev. E For more information www.analog.com OPERATION Internal Charge Pump The LTC7000/ LTC7000-1 contains an internal charge pump that enables the MOSFET gate drive to have 100% duty cycle. The charge pump regulates the BST-TS volt - age to 12V reducing external power losses associated with external MOSFET on-resistance. The charge pump uses the higher voltage of TS or V CC as the source for the charge. Start-Up and Shutdown If the voltage on the RUN pin (LTC7000 only) is less than 0.7V, the LTC7000 enters a shutdown mode in which all internal circuitry is disabled, reducing the DC supply cur- rent to approximately 1µA. When the voltage on the RUN pin exceeds 0.7V, the internal LDO connected to V IN is enabled and regulates V CC to 10V . At V IN voltages less than 10V, the LDO will operate in drop-out and V CC will follow VIN. When the voltage on the RUN pin exceeds 1.21V, the input circuitry is enabled allowing TGUP and TGDN to be driven high with respect to TS. The LTC7000-1 does not include the RUN pin. The internal LDO connected to VIN and the input circuitry for the LTC7000-1 become enabled when VIN is higher than 3.5V. Protection Circuitry When using the LTC7000/LTC7000-1, care must be taken not to exceed any of the ratings specified in the Absolute Maximum Ratings section. As an added safeguard, the LTC7000/LTC7000-1 incorporates an overtemperature shutdown feature. If the junction temperature reaches approximately 180°C, the LTC7000/LTC7000-1 will enter thermal shutdown mode and TGDN will be pulled to TS. After the part has cooled below 160°C , TGDN will be allowed to go back high. The overtemperature level is not production tested. The LTC7000/LTC7000-1 is guar- anteed to start a temperatures below 150°C. The LTC7000/LTC7000-1 additionally implements protec- tion features which prohibit TGUP being pulled to BST when VIN, VCC or (VBST–VTS) are not within proper operat- ing ranges. By using a resistive divider from VIN to ground (LTC7000 only), the RUN and OVLO pins can serve as a precise input supply overvoltage/undervoltage lockouts. TGDN is pulled to TS when either RUN falls below 1.11V or OVLO rises above 1.21V, which can be configured to limit switching to a specific range on input supply volt - ages. Furthermore, if V IN falls below 3.5V , an internal undervoltage detector pulls TGDN to TS. VCC contains an undervoltage lockout feature that will pull TGDN to TS and is configured by the V CCUV pin. If VCCUV is open, TGDN is pulled to TS until V CC is greater than 7.0V. By using a resistor from VCCUV to ground, the rising undervoltage lockout on VCC can be adjusted from 3.5V to 10.5V. An additional internal undervoltage lockout is included that will pull TGDN to TS when the floating voltage from BST to TS is less than 3.1V (typical). (Refer to Block Diagram)

connected to INP to drive standard power MOSFETs. abled and INP becomes high impedance. voltages higher than power supply or lower than ground.

7000 F01

Figure 1. Simplified Output Stage while maintaining a fast turn-off. voltage rises above 3.5V before the Fault Timer expires. See Fault Timer and Fault Flag section.

7000 F03

Figure 2. Sense Pins Filtering

resistors and reduces the external power dissipation.

7000 F02

Figure 3. RISET Selection warning times are shown graphically in Figure 4 .

7000 F04

Figure 4. Fault Timer T rip Points

period (TCOOL_DOWN) before retry (Figure 5). voltage starting from it’s current value. Table 1. Fault Time for Typical Capacitors

7000 F05

Figure 5. Auto Retry Cool-Down Timer Cycle

7000 F06

Figure 6. Auto Retry with INP Cycling Low be the inverse state of the high side pull-up (VTGUP – VTS). gone low before turning on a redundant power MOSFET . The LTC7000 contains a high side current monitor output. to ground which makes variations over process minimal.

7000 F07

Figure 7. IMON Block diagram The RUN pin has two different threshold voltage levels. the RUN pin is greater than 1.21V, the part is enabled.

7000 F08

Figure 8. RUN Pin Interface to Logic Figure 9. Adjustable UV and OV Lockout the OVLO pin is required to be tied directly to ground. external UVLO using the above equations with R5 = 0Ω. using the above equations with R3 = 0Ω. the CB voltage across the gate-source of the MOSFET . is typically specified in the external MOSFET data sheet.

Figure 10. External BST Diode

7000 F10

will be more current than the charge pump can overcome. pin or VCC can be driven from an external power supply. LTC7000/LTC7000-1 (FAUL T, INP or TIMER). internal LDO can only supply 1mA with a 200mV drop-out. damage to the LTC7000/LTC7000-1 could occur .

Where 3.5V < Rising VCC UVLO < 10.5V.

7000 F11

Figure 11. VCCUV Resistor Selection occur when driving inductive loads. MOSFET selected for the application.

7000 F12

Figure 12. Powering Large Capacitive Loads

LTC7000/LTC7000-1. See Figure 13.

7000 F13

Figure 13. Optional Schottky Diode Usage good choice for space saving designs.

7000 F14

Figure 14. Protecting Load from Voltage Drops on VIN immediately turn off the MOSFET . the power loss specification.

0.25W to provide adequate margin. Which meets the design specification of less than 0.5W. age rating of 200V . RG is then calculated to be 17.8k Ω. ≅ 0.33nF. 100nF will be used. has cycled low then back high. The complete circuit is shown in Figure 15. Figure 15. Design Example

7000 F15

7000 F15b

Rev. E For more information www.analog.com APPLICATIONS INFORMATION PC Board Layout Considerations 1. Solder the exposed pad on the backside of the LTC7000/ LTC7000-1 packages directly to the ground plane of the board. 2. Kelvin connect the SNS + pin to the current sense resistor . Limit the resistance of the TS trace, by making it short and wide. CB needs to be close to chip. 5. Always include an option in the PC board layout to place a resistor in series with the gate of any exter - nal MOSFET . High frequency oscillations are design dependent and having the option to add a series damp- ening resistor can save a design iteration of the PC board. Pin Creepage and Clearance In some higher voltage applications, the MSE16 package may not provide sufficient PC board trace clearance between high and low voltage pins. In applications where clearance is required, the LTC7000-1 in the MSE16(12) package can be used. The MSE16(12) package has removed pins between all the adjacent high voltage and low voltage pins, providing 0.657mm clearance, which will be sufficient for most applications. For more information, refer to the printed circuit board design standards described in IPC-2221.

Rev. EFor more information www.analog.com TYPICAL APPLICATIONS Protected Redundant Supply Switchover with Shoot Through Protection LOAD 10µF TS BST NOTE: THE BACKUP PATH WILL LATCH-OFF WITH AN OVERCURRENT FAUL T . TS BST V IN RUN VIN RUN FAUL T VCCUV IMON ISET 0.0015/uni03A9 BSC320N20NS3G0.003/uni03A9 BSC320N20NS3G 1nF 4.99k 10/uni03A9 10/uni03A9 100/uni03A9 100/uni03A9 100/uni03A9 SNS+SNS+ SNS–SNS– TGDNTGDN TGUPTGUP

7000 TA02

0.1µF0.1µF 1nF 1µF1µF 200k 6.98k GND L TC7000GND 10µF 0.1µF 100/uni03A9 10µF 0.1µF 0.1µF VCCUV IMON ISET VCC TIMER OVLO VCC INP TIMER OVLO INP FAUL T VMAIN Falling Through 33V VMAIN Rising Through 36VVLOAD vs Main Power Voltage VBACKUP = 60V MAIN POWER (V) V LOAD (V)

7000 TA02b

R LOAD = 50Ω 40µs/DIV V LOAD 20V/DIV V TG–TS BACKUP 10V/DIV V TG–TS MAIN 10V/DIV

7000 TA02c

R LOAD = 50Ω 10µs/DIV V LOAD 20V/DIV V TG–TS BACKUP 10V/DIV V TG–TS MAIN 10V/DIV

7000 TA02d

Rev. E For more information www.analog.com TYPICAL APPLICATIONS 0.1µF

7000 TA03a

0.005/uni03A9 BSC12DN20NS3G LOAD 3.5V TO 60V 10A CONTINUOUS MAX VIN 3.5V TO 60V (150V TOLERANT) 100k 150k 100/uni03A9 GND OVLO FAUL T V CC TIMER 1µF 1nF 953k 10µF 19.6k SNS+ SNS– TGUP TGDN VIN RUN INP BST TS ISET IMON VCCUVONOFF 0.1µF SNS+ SNS– TGUP TGDN VIN INP

7000 TA04a

0.04/uni03A9 BSC12DN20NS3G LOAD 3.5V TO 135V 0.5A CONTINUOUS VIN 3.5V TO 135V 100k RTIMER 100/uni03A9 GND VCC FAUL T TIMER 1µF 10nF 10µF BST TS VCCUVONOFF 12/uni03A9/100ms LOAD PULSE R TIMER = OPEN 100ms/DIV R LOAD 10k/uni03A9/DIV I LOAD 1A/DIV V LOAD 10V/DIV V TIMER 1A/DIV

7000 TA04b

VIN = 12V VINP = 4V 12/uni03A9/100mS LOAD PULSE R TIMER = 100k 100ms/DIV R LOAD 10k/uni03A9/DIV I LOAD 1A/DIV V LOAD 10V/DIV V TIMER 1V/DIV

7000 TA04c

VIN = 12V VINP = 4V High Side Switch with Input Overvoltage and Overcurrent Protection High Side Switch with Overcurrent Protection and Fault Latchoff

Rev. EFor more information www.analog.com TYPICAL APPLICATIONS Average Current T rip 0.1µF 0.1µF 1 8 5 SNS+ SNS– TGUP TGDN VIN RUN INP

7000 TA05a

0.06/uni03A9 SI7738DP LOAD 3.5V TO 135V <1A AVERAGE VIN 3.5V TO 135V 100k +– 1.2V 1µF RB D Q 500k AMPOUT 400k 150k 3.3V 3.3V VINP 249/uni03A9 GND FAUL T VCC VCCUV TIMER OVLO 1µF BST TS IMON ISET VIN = 12V Response to 1.2A Load Step 250ms/DIV I LOAD 1A/DIV V IMON 1V/DIV V AMPOUT 2V/DIV V LOAD 10V/DIV

7000 TA05b

Rev. E For more information www.analog.com TYPICAL APPLICATIONS 4.7µF 0.47µF LOAD 15mF 7V TO 60V 100nF 1µF 47µF + 1µF SNS+ SNS– TGUP TGDN BST TS IMON ISET RUN VIN VCC VCCUV FAUL T OVLO INP TIMER

7000 TA06

0.003/uni03A9 IRFS4115PBF 7V TO 60V (150V TOLERANT) 12.1k 590k 100k 220k 10/uni03A9 DFLS1150 100/uni03A9 GND ONOFF High Side Switch with Auto-Retry, Inrush Control and OVLO Turn-On Response VIN = 48V 200ms/DIV V INP 4V/DIV V LOAD 20V/DIV I LOAD 1A/DIV

Rev. EFor more information www.analog.com PACKAGE DESCRIPTION MSOP (MSE16) 0213 REV F 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 16151413121110 1 2 3 4 5 6 7 8 1 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) BSC BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.280 ±0.076 (.011 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF 16-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1667 Rev F)

Rev. E For more information www.analog.com MSOP (MSE16(12)) 0213 REV D 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 1.0 (.039) BSC 1.0 (.039) BSC 16 14 121110 1 3 5 6 7 8 1 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) BSC BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.280 ±0.076 (.011 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE 0.35 REF Variation: MSE16 (12) 16-Lead Plastic MSOP with 4 Pins Removed Exposed Die Pad (Reference LTC DWG # 05-08-1871 Rev D) PACKAGE DESCRIPTION

Rev. EFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. REV DATE DESCRIPTION PAGE NUMBER A 07/17 Updated pin descriptions. Modified Block Diagram. Inserted paragraph. Modified equations. Changed from 3.3V to 3.5V in Fast Turn-Off Mode paragraph, updated Table 1 numbers. Changed to Zener from Schottky diode. Schematic clarification. 11, 13 22, 23 B 08/18 Added 100Ω resistor to Typical Application. Changed Absolute Maximum Ratings for SNS +/SNS–. Replaced Typical Performance Curve G01. Modified Block Diagram. Updated schematic and graphs TA02c and TA02d. C 02/19 Removed the temperature dot from the TIMER Pin Pull-Down Current specification. 5 D 11/19 Added AEC-Q100 Qualified for Automotive Applications and orderable part numbers 1, 3, 4 E 03/20 Correct Top Mark from 7000-1 to 70001 3

Rev. E For more information www.analog.com  ANALOG DEVICES, INC. 2018–2020 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LTC7001 Fast 150V High Side NMOS Static Switch Driver 3.5V to 150V Operation, IQ = 35µA, Turn-On (CL = 1nF) = 35ns, Internal Charge Pump LT C4440/LTC4440-5/ LTC4440A-5 High Speed, High Voltage High Side Gate Driver Up to 100V Supply Voltage, 8V ≤ VCC ≤ 15V, 2.4A Peak Pull-Up/1.5Ω Peak Pull-Down LTC7138 High Efficiency, 150V 250mA/400mA Synchronous Step-Down Regulator Integrated Power MOSFET s, 4V ≤ VIN ≤ 150V, 0.8V ≤ VOUT ≤ VIN, IQ = 12µA, MSOP-16 (12) LTC7103 105V, 2.3A Low EMI Synchronous Step-Down Regulator 4.4V ≤ V IN ≤ 105V, 1V ≤ VOUT ≤ VIN, IQ = 2µA Fixed Frequency 200kHz to 2MHz, 5mm x 6mm QFN LTC7801 150V Low IQ, Synchronous Step-Down DC/DC Controller 4V ≤ V IN ≤ 140V, 150V abs max, 0.8V ≤ VOUT ≤ 60V, IQ = 40µA, PLL Fixed Frequency 320kHz to 2.25MHz LT1910 Protected High Side MOSFET Driver 8V to 48V Operation, ΔVSNS = 65mV, IQ = 110µA, Turn-On (CL = 1nF) = 220µs, Internal Charge Pump LTC4367 100V Overvoltage, Undervoltage and Reverse Supply Protection 2.5V ≤ VIN ≤ 60V, VOUT Protection Up to 100V, Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8 LT C4368 100V Overvoltage, Undervoltage and Revernse Protection Controller with Bidirectional Circuit Breaker 2.5V ≤ V IN ≤ 60V, VOUT Protection Up to 100V, Reverse Protection to –40V, MSOP-8, 3mm × 3mm DFN-8 LT C4364 Surge Stopper with Ideal Diode 4V to 80V Operation, ΔVSNS = 50mV, IQ = 425µA, Turn-On (CL = 1nF) = 500µs, Internal Charge Pump LTC7860 High Efficiency Switching Surge Stopper 4V to 60V Operation, ΔVSNS = 95mV, IQ = 370µA, PMOS Driver LTC4231 Micropower Hot Swap Controller 2.7V to 36V Operation, ΔVSNS = 50mV, IQ = 4µA, Turn-On (CL = 1nF) = 1ms, Internal Charge Pump LTC3895 150V Low IQ, Synchronous Step-Down DC/DC Controller PLL Fixed Frequency 50kHz to 900kHz, 4V ≤ V IN ≤ 140V, 0.8V ≤ VOUT ≤ 60V, IQ = 40µA LTC4380 Low Quiescent Current Surge Stopper 4V to 80V Operation, ΔVSNS = 50mV, IQ = 8µA, Turn-On = 5ms, Internal Charge Pump LT C3639 High Efficiency, 150V 100mA Synchronous Step-Down Regulator Integrated Power MOSFETs, 4V ≤ V IN ≤ 150V, 0.8V ≤ VOUT ≤ VIN, IQ = 12µA, MSOP-16(12) 0.1µF 1µF VS-12CWQ10FN 48V , 500W MOTOR BAS116L

7000 TA07

0.004/uni03A9 BSC12DN20NS3G LOAD 40V TO 60V 8A CONTINUOUS MAX VIN 40V TO 60V (150V TOLERANT) 100k M 100/uni03A9 GND OVLO TIMER ISET VCCUV INP IMON 1nF 100k 86.6k 590k 6.04k 12.1k SNS+ SNS– TGUP TGDN VIN RUN TS BST VCC FAUL T PWM –20kHz Protected Motor Driver