Driver IC

LTC7061

Analog Devices

100V Half-Bridge Driver with Floating Grounds and Adjustable Dead-Time 04/20-REV.A

Manufacturer: Analog Devices

Document: 18 Pages / 2Mb

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Rev. AFor more information www.analog.comDocument Feedback TYPICAL APPLICATION FEATURES DESCRIPTION 100V Half-Bridge Driver with Floating Grounds and Adjustable Dead-Time The LTC®7060 drives two N-Channel MOSFETs in a half-bridge configuration with supply voltages up to 100V. Both high-side and low-side drivers can drive the MOSFETs with a different ground reference, providing excellent noise and transient immunity. Its powerful 0.8Ω pull-down and 1.5Ω pull-up MOSFET drivers allows the use of large gate capacitance high volt- age MOSFETs. Additional features include UVLO, Three- State PWM input, adjustable turn-on/-off delays and shoot-through protection. See chart below for a similar driver in this product family. PARAMETER LTC7060 LTC7061 LTC7062 LTC7063 Input Signal Three-State PWM CMOS/ TTL Logic CMOS/ TTL Logic Three-State PWM Shoot-Through Protection Yes Yes No Yes Absolute Max Voltage 115V 115V 115V 155V VCC Falling UVLO 5.3V 4.3V 4.3V 5.3V

APPLICATIONS

n Unique Symmetric Floating Gate Driver Architecture n High Noise Immunity,Tolerates ±10V Ground Difference between Input and Output Grounds n 100V Maximum Input Voltage Independent of IC Supply Voltage VCC n 6V to 14V VCC Operating Voltage n 4V to 14V Gate Driver Voltage n 0.8Ω Pull-Down, 1.5Ω Pull-Up for Fast Turn-On/Off n Adaptive Shoot-Through Protection n Programmable Dead-Time n Three-State PWM Input with Enable Pin n VCC UVLO/OVLO and Floating Supplies UVLO n Drives Dual N-Channel MOSFETs n Open-Drain Fault Indicator n Available in Thermally Enhanced 12-LEAD MSOP n AEC-Q100 Automotive Qualification in Progress n Automotive and Industrial Power Systems n Telecommunication Power Systems n Half-Bridge and Full-Bridge Converters All registered trademarks and trademarks are the property of their respective owners. 51k 51k SW TG BST DT PWM F LT EN Vcc BGVcc BG BGRTN V IN 40V V CC 10V SW1 BGRTN BG BGV CC F LT EN Vcc BST TG SW L TC7060 V IN 40V V CC 10V SW2 PWM L TC7060 40V 40V SGND DT PWM SGND

7060 TA01

Rev. A For more information www.analog.com PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS Driver Output BG Operating Junction Temperature Range Note: All voltages are referred to SGND unless otherwise noted. ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC7060EMSE#PBF LTC7060EMSE#TRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 125°C LTC7060IMSE#PBF LTC7060IMSE#TRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 125°C LTC7060JMSE#PBF LTC7060JMSE#TRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 150°C LTC7060HMSE#PBF LTC7060HMSE#TRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 150°C AUTOMOTIVE PRODUCTS** LTC7060EMSE#WPBF LTC7060EMSE#WTRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 125°C LTC7060IMSE#WPBF LTC7060IMSE#WTRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 125°C LTC7060JMSE#WPBF LTC7060JMSE#WTRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 150°C LTC7060HMSE#WPBF LTC7060HMSE#WTRPBF LTC7060 12-Lead Plastic MSSOP –40°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. PWM EN F LT DT VCC BGVCC BST TG SW NC BG BGRTN TOP VIEW MSE PACKAGE 12-LEAD PLASTIC MSOP TJMAX = 150°C, θJA = 40°C/W EXPOSED PAD (PIN 13) IS SGND, MUST BE SOLDERED TO PCB SGND (Note 1)

Rev. AFor more information www.analog.com

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Input Supply and VCC Supply VIN Input Supply Operating Range 100 V VCC IC Supply Operating Range 6 14 V IVCC VCC Supply Current VEN = VPWM = 0V, RDT = 100kΩ 0.4 mA VUVLO_VCC VCC Undervoltage Lockout Threshold VCC Falling 5 5.3 5.6 V Hysteresis 0.3 V VOVLO_VCC VCC OVLO Threshold VCC Rising 14.6 V Hysteresis 0.8 V BG Gate Driver Supply (BGVCC-BGRTN) VBGVCC-BGRTN BG Driver Supply Voltage Range (With Respect to BGRTN) 4 14 V IBGVCC Total BGVCC Current (Note 4) BG = Low 8 µA BG = High 100 µA VUVLO_BGVCC Undervoltage Lockout Threshold BGVCC Falling, With Respect to BGRTN 3.4 V Hysteresis 0.3 V TG Gate Driver Supply (BST-SW) VBST-SW TG Driver Supply Voltage Range (With Respect to SW) 4 14 V IBST Total BST Current (Note 4) TG = Low 8 µA TG = High 100 µA VUVLO_BST Undervoltage Lockout Threshold BST Falling, With Respect to SW 3.4 V Hysteresis 0.3 V Input Signal (PWM, EN) VIH(TG) TG Turn-On Input Threshold PWM Rising l 2.6 3.1 3.6 V VIL(TG) TG Turn-Off Input Threshold PWM Falling l 2.45 2.95 3.45 V VIH(BG) BG Turn-On Input Threshold PWM Falling l 0.5 1 1.5 V VIL(BG) BG Turn-Off Input Threshold PWM Rising l 0.75 1.25 1.75 V VPWM_TRI PWM Input Three-State Float Voltage 1.9 2.1 2.3 V RUP_PWM PWM Internal Pull-Up Resistor To Internal 4.5V Supply 48 kΩ RDOWN_PWM PWM Internal Pull-Down Resistor 42 kΩ VENR EN Pin Rising Threshold EN Rising l 1.1 1.2 1.3 V VENF EN Pin Falling Threshold EN Falling 1.1 V REN EN Pin Internal Pull-Down Resistor 2 MΩ Dead-Time and FAUL T (DT , F LT) tPLH(BG) / tPLH(TG) BG/TG Low to TG/BG High Propagation Delay (Dead-Time) RDT = 0Ω 32 ns RDT = 24.9kΩ 43 ns RDT = 64.9kΩ 62 ns RDT = 100kΩ 76 ns RDT = Open 250 ns RFL Tb Open Drain Pull-Down Resistance 60 Ω tFL Tb F LT Pin Release Delay Low to High 100 µs The l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBGVCC = VBST =10V, VBGRTN = VSW = 0V, unless otherwise noted.

Rev. A For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the specified operating temperature range, otherwise specifications are at TA = 25°C (Note 2). VCC = VBGVCC = VBST =10V, VBGRTN = VSW = 0V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Low Side Gate Driver Output (BG) VOH(BG) BG High Output Voltage IBG = –100mA, VOH(BG) = VBGVCC – VBG 150 mV VOL(BG) BG Low Output Voltage IBG = 100mA, VOL(BG)=VBG – VBGRTN 80 mV RUP(BG) BG Pull-Up Resistance VBGVCC-BGRTN =10V 1.5 Ω RDOWN(BG) BG Pull-Down Resistance VBGVCC-BGRTN =10V 0.8 Ω High Side Gate Driver Output (TG) VOH(TG) TG High Output Voltage ITG = –100mA, VOH(TG) = VBST – VTG 150 mV VOL(TG) TG Low Output Voltage ITG = 100mA, VOL(TG) = VTG – VSW 80 mV RUP(TG) TG Pull-Up Resistance VBST-SW = 10V 1.5 Ω RDOWN(TG) TG Pull-Down Resistance VBST-SW = 10V 0.8 Ω Switching Time tPHL(BG) PWM High to BG Low Propagation Delay 17 ns tPHL(TG) PWM Low to TG Low Propagation Delay 17 ns tr(BG) BG Output Rise Time CLOAD = 3.3nF (Note 5) 18 ns tf(BG) BG Output Fall Time CLOAD = 3.3nF (Note 5) 13 ns tr(TG) TG Output Rise Time CLOAD = 3.3nF (Note 5) 18 ns tf(TG) TG Output Fall Time CLOAD = 3.3nF (Note 5) 13 ns tPH(EN) EN High to TG/BG High Propagation Delay 30 ns tPL(EN) EN Low to TG/BG Low Propagation Delay 36 ns Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Ratings for extended periods may affect device reliability and lifetime. Note 2: The LTC7060E is guaranteed to meet performance specifications from 0°C to 85°C junction temperature. Specifications over the −40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LTC7060I is guaranteed over the −40°C to 125°C operation junction temperature range. The LTC7060J is guaranteed over the −40°C to 150°C operation junction temperature range. The LTC7060H is guaranteed over the −40°C to 150°C operation junction temperature range. High junction temperature degrades operation lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with board layout, the rated package thermal impedance and other environment factors. Note 3: TJ is calculated from the ambient temperature TA and power dissipation PD according to the following formula TJ = TA + (PD • 51°C/W) for LFCSP package; TJ = TA + (PD • 40°C/W) for MSOP package. Note 4: The total current includes both the current from BGVCC/BST to BGRTN/SW and the current to SGND. Dynamic supply current is higher due to the gate charge being delivered at the switching frequency. Note 5: Rise and fall times are measured using 10% and 90% levels.

Rev. AFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS PWM Pin Thresholds vs Temperature TA = 25°C, unless otherwise noted. EN Pin Thresholds vs Temperature Quiescent Supply Current vs Supply Voltage VCC Undervoltage Lockout Thresholds vs Temperature VCC Overvoltage Lockout Thresholds vs Temperature Supply Current vs Input Frequency I VCC I BGVCC , BG = L I BST , TG = L I BGVCC , BG = H I BST , TG = H V CC , V BGVCC-BGRTN , V BST-SW (V) 100 150 200 250 300 350 400 SUPPL Y CURRENT (uA)

7060 G03

V IH(TG) V IL(TG) V IL(BG) V IH(BG) TEMPERATURE (°C) –45 –20 105 130 155 0.5 1.0 1.5 2.0 2.5 3.0 3.5 PWM PIN THRESHOLDS (V) vs Temperature PWM Pin Thresholds

7060 G01

TEMPERATURE (°C) –45 –20 105 130 155 0.9 1.0 1.1 1.2 1.3 1.4 EN PIN THRESHOLDS (V) vs Temperature EN Pin Thresholds

7060 G02

V CC RISING V CC FALLING TEMPERATURE (°C) –45 –20 105 130 155 5.0 5.2 5.4 5.6 5.8 6.0 V CC UVLO THRESHOLDS (V) Thresholds vs Temperature V CC Undervoltage Lockout

7060 G04

V CC RISING V CC FALLING TEMPERATURE (°C) –45 –20 105 130 155 13.0 13.5 14.0 14.5 15.0 V CC OVLO THRESHOLDS (V) Thresholds vs Temperature V CC Overvoltage Lockout

7060 G05

V CC = BGV CC = BST = 10V C TG = C BG = 3.3nF SW = BGRTN = 0V FREQUENCY (kHz) 200 400 600 800 1000 100 200 300 400 500 600 700 800 BGV CC AND BST CURRENT (mA) V CC SUPPL Y CURRENT (µA)

7060 G06

Switching Supply Current vs Load Capacitance Rise and Fall Time vs Floating Supply Voltage Rise and Fall Time vs Load Capacitance V CC = BGV CC = BST = 10V SW = BGRTN = 0V R DT = 24.9k LOAD CAPACITANCE (nF) 0.1 100 SWITCHING SUPPL Y CURRRENT (mA)

7060 G07

I BGVCC , I BST ; f IN = 100kHz I BGVCC , I BST ; f IN = 500kHz I VCC ; f IN = 500kHz C LOAD = 3.3nF t r(TG) t f(TG) t r(BG) t f(BG) V BGVCC-BGRTN , V BST-SW (V) RISE/FALL TIME (ns)

7060 G08

V CC = BGV CC = BST = 10V SW = BGRTN = 0V R DT = 24.9k t r(TG) t f(TG) t r(BG) t f(BG) LOAD CAPACITANCE (nF) 100 RISE/FALL TIME (ns)

7060 G09

Rev. A For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Propagation Delay vs Floating Supply Voltage Propagation Delay vs Temperature Dead-Time vs RDT Dead-Time vs Floating Supply Voltage Dead-Time vs Temperature TG/BG Pull-Up and Pull-Down Resistance vs Temperature TG/BG Pull-Up and Pull-Down Resistance vs Floating Supply Voltage R DT (kΩ) 100 DEAD-TIME (ns)

7060 G12

t PHL(BG) t PHL(TG) t PH(EN) t PL(EN) V BGVCC-BGRTN , V BST-SW (V) PROPAGATION DELAY (ns)

7060 G10

t PL(EN) t PH(EN) t PHL(TG) t PHL(BG) V CC = BGV CC = BST =10V BGRTN = SW = 0V NO LOAD TEMPERATURE (°C) –45 –20 105 130 155 PROPAGATION DELAY (ns) vs Temperature Propagation Delay

7060 G11

t PLH(BG/TG) , R DT = 24.9kΩ t PLH(BG/TG) , R DT = 0Ω t PLH(BG/TG) , R DT = 64.9kΩ V BGVCC-BGRTN , V BST-SW (V) 100 DEAD-TIME (ns)

7060 G13

t PLH(BG/TG) , R DT = 64.9kΩ t PLH(BG/TG) , R DT = 0Ω t PLH(BG/TG) , R DT = 24.9kΩ BGRTN = SW = 0V BGV CC = BST =10V NO LOAD TEMPERATURE (°C) –45 –20 105 130 155 DEAD-TIME (ns)

7060 G14

= BST =10V BGRTN = SW = 0V R UP(TG) R DOWN(TG) R UP(BG) R DOWN(BG) TEMPERATURE (°C) –45 –20 105 130 155 IMPEDANCE (Ω) Resistance vs Temperature TG/BG Pull–Up and Pull–Down

7060 G15

R DOWN(BG) , R DOWN(TG) R UP(BG) , R UP(TG) V BGVCC-BGRTN , V BST-SW (V) IMPEDANCE (Ω)

7060 G16

TA = 25°C, unless otherwise noted.

Rev. AFor more information www.analog.com PIN FUNCTIONS VCC: VCC Supply. IC bias supply referred to the SGND pin. An internal 4.5V supply is generated from the VCC supply to bias most of the internal circuitry. A bypass capacitor with a minimum value of 0.1uF should be tied between this pin and the SGND pin. BGVCC: Bottom MOSFET Driver Supply. The bottom MOSFET gate driver is biased between this pin and the BGRTN pin. An external capacitor should be tied between this pin and BGRTN and placed close to the IC. BGRTN: Bottom MOSFET Driver Return. The bottom gate driver is biased between BGVCC and BGRTN. Kelvin connect BGRTN to the bottom MOSFET source pin for high noise immunity. The voltage difference between the BGRTN pin and the SGND can be –10V to 100V. BG: Bottom MOSFET Gate Driver Output. This pin drives the gate of the N-channel MOSFET between BGRTN and BGVCC. BST: Top MOSFET Driver Supply. The top MOSFET gate driver is biased between this pin and the SW pin. An exter- nal capacitor should be tied between this pin and the SW pin and placed close to the IC. SW: Top MOSFET Driver Return. The top gate driver is biased between BST and SW . Kelvin connect SW to the top MOSFET source pin for high noise immunity. The voltage difference between the SW pin and SGND can be –10V to 100V. TG: Top MOSFET Gate Driver Output. This pin drives the gate of the N-channel MOSFET between SW and BST . DT: Dead-Time Program Pin Referred to the SGND Pin. A single resistor from this pin to SGND sets the BG/TG low to TG/BG high propagation delay. See the operation section for details. PWM: Three-State Gate Driver Input Signal Referred to the SGND Pin. The TG/BG state is determined by the volt- age at this pin. If this pin is floating, an internal resistor divider triggers the High-Z mode in which both BG and TG are turned off. T race capacitance on this pin should be minimized. EN: Enable Control Input Pin Referred to the SGND Pin. A voltage on this pin above 1.2V enables the gate drivers. The TG and BG pins are both in the low state if this pin is logic low. F LT: Open Drain Fault Output Pin Referred to the SGND Pin. Open-drain output that pulls to SGND during V CC UVLO/OVLO and floating supplies UVLO condition. The typical pull-down resistance is 60Ω. NC: No Internal Connection. Always keep this pin floating. It is intentionally skipped to isolate adjacent high voltage pins. SGND: Chip Ground. The exposed pad must be soldered to the PCB ground for electrical contact and for rated thermal performance. BLOCK DIAGRAM BST TG SW UVLO LEVEL SHIFTER BGV CC BG BGRTN UVLO LEVEL SHIFTER DRIVER LOGIC SHOOT- THROUGH PROTECTION 1.0V 3.1V PWM 1.2V 4.5V 48k 42k EN UVLO V CC OVLO DT F LT DELAY SGND 7060 BD DRIVER DRIVER

7060 F01

Figure 1. Three-State PWM Operation to be inverting or non-inverting of the input logic. VCC is the power supply for the LTC7060’s internal circuitry. are at the same potential. VCC is independent of VIN. increases above the threshold VIL(BG). in high frequency, high voltage applications.

driving the PWM pin goes into a high impedance state. ing the EN default state low if its input is not driven. Mode (DCM) in switching regulator applications. pull-down device is a NMOS with a typical 0.8Ω RDS(ON). with lower driver supply voltage. capability of driving a 3.3nF load with 18ns rise time. parasitic inductances, are recommended. and BG will be pulled to BGRTN; TG will be pulled to SW .

7060 F02

Figure 2. Simplified Output Stage in Half-Bridge Configuration

Table 1. Normal Operation and Undervoltage/Overvoltage Logic during switching transitions. If the DT pin is shorted to SGND, the Dead-Time is 32ns. If the DT Pin is floating, the Dead-Time is around 250ns.

7060 F03

Figure 3. Dead-Time vs RDT b. (BGV CC-BGRTN) is below its UVLO threshold. c. (BST-SW) is below its UVLO threshold. the external resistor after a built-in 100µs delay.

Rev. AFor more information www.analog.com BOOTSTRAPPED SUPPL Y (BGVCC-BGRTN, BST-SW) Either or both of the BGV CC-BGRTN and BST-SW sup - plies can be bootstrapped supplies. An external boost capacitor , CB, connected between BGVCC and BGRTN, or between BST and SW , supplies the gate driver voltage for its respective MOSFET driver . When the external MOSFET is turned on, the driver places the C B voltage across the gate-source of the MOSFET . This enhances the MOSFET and turns it on. The charge to turn on the external MOSFET is referred to gate charge, QG, and is typically specified in the external MOSFET data sheet. The boost capacitor , C B, needs to have at least 10 times the gate capacitance to turn on the external MOSFET fully. Gate charge can range from 5nC to hundreds of nC and is influenced by the gate drive level and type of external MOSFET used. For most applica - tions, a capacitor value of 0.1uF for CB will be sufficient. However , if multiple MOSFETs are paralleled and driven by the LTC7060, C B capacitance needs to be increased correspondingly. An external supply, typically V CC connected through a Schottky diode, is required to keep the C B charged. The LTC7060 does not charge the CB and always discharges the CB. When the BG/TG is high, the total current from BGVCC/BST to BGRTN/SW and SGND is typically 100µA; when the BG/TG is low, the total current from BGVCC/BST is typically 8µA. POWER DISSIPATION To ensure proper operation and long-term reliability, the LTC7060 must not operate beyond its maximum tem - perature rating. Package junction temperature can be calculated by: TJ = TA + (PD)(θJA) where: T J = junction temperature T A = ambient temperature P D = power dissipation θJA = junction-to-ambient thermal resistance APPLICATIONS INFORMATION Power dissipation consists of standby, switching and capacitive load power losses: P D = PDC + PAC + PQG where: P DC = quiescent power loss P AC = internal switching loss at input frequency fIN P QG = loss due to turning on and off external MOSEFT with gate charge QG at frequency fIN The LTC7060 consumes very little quiescent current. The DC power loss at VCC = 10V is only (10V)(0.4mA) = 4mW. At a particular switching frequency, the internal power loss increases due to both AC currents required to charge and discharge internal nodal capacitances and cross-con- duction currents in the internal logic gates. The sum of the quiescent current and internal switching current with no load are shown in the Typical Performance Characteristics plot of Switching Supply Current vs Input Frequency. The gate charge losses are primarily due to the large AC currents required to charge and discharge the capacitance of the external MOSFETs during switching. For identical pure capacitive loads C LOAD on BG and TG at switching frequency fIN, the load losses would be: P CLOAD = (CLOAD)(fIN)[(VBST-SW)2 + (VBGVCC-BGRTN)2] In a typical synchronous buck configuration, the V CC is connected to the power for the bottom MOSFET driver , BGVCC. VBST-SW is equal to VCC -VD, where VD is the for- ward voltage drop of the external Schottky diode between VCC and BST . If this drop is small relative to VCC, the load losses can be approximated as: P CLOAD ≈ 2(CLOAD)(fIN)(VCC)2 Unlike a pure capacitive load, a power MOSFET’ s gate capacitance seen by the driver output varies with its VGS voltage level during switching. A MOSFET’ s capacitive load power dissipation can be calculated using its gate charge, QG. The QG value corresponding to the MOSFET’s VGS value (V CC in this case) can be readily obtained from the manufacturer’s QG vs VGS curves. For identical MOSFETs on BG and TG: P QG ≈ 2(QG)(fIN)(VCC)

Rev. A For more information www.analog.com APPLICATIONS INFORMATION BYPASSING AND GROUNDING The LTC7060 requires proper bypassing on the V CC, VBST-SW, and V BGVCC-BGRTN supplies due to its high speed switching (nanoseconds) and large AC currents (amperes). Careless component placement and PCB trace routing may cause excessive ringing and under/ overshoot. To obtain the optimum performance form the LTC7060:

Mount the bypass capacitors as close as possible between the V CC and SGND pins, the BGV CC and BGRTN pins, and the BST and SW pins. The leads should be shortened as much as possible to reduce lead inductance.
Use a low inductance, low impedance ground plane to reduce any ground drop and stray capacitance. Remember that the LTC7060 switches greater than 5A peak currents and any significant ground drop will degrade signal integrity.
Plan the power/ground routing carefully. Know where the large load switching current is coming from and going to. Maintain separate ground return paths for the input pin and the output power stage.
Kelvin connect the TG pin to the top MOSFET gate and SW pin to the top MOSFET source. Kelvin connect the BG pin to the bottom MOSFET gate and BGRTN to the bottom MOSFET source. Keep the copper trace between the driver output pin and load short and wide.
Be sure to solder the Exposed Pad on the back side of the LTC7060 packages to the board. Failure to make good thermal contact between the exposed back side and the copper board will result in thermal resistances far greater than specified for the packages.

Rev. AFor more information www.analog.com TYPICAL APPLICATIONS 4-Phase 1.2V/120A Converter with the LTC7060 and MOSFETs Using the LTC7851, fSW = 400kHz 0.25µH 3.57k 100µF ×2 330µF ×3 22µF 100pF 2.2nF 6.04k 332/uni03A9 10k 3.3nF 1/uni03A9 1µF 10k 10k 0.22µF 0.22µF 0.22µF 42.2k 100k 31.6k 0.22µF BSC050NE2LS BSC010NE2LS 0.25µH 3.57k 100µF ×2 330µF ×3 0.22µF 1µF 22µF BSC050NE2LS BSC010NE2LS 0.22µF 1µF 0.25µH 3.57k 100µF ×2 330µF ×3 22µF BSC050NE2LS BSC010NE2LS 0.25µH 3.57k 100µF ×2 330µF ×3 0.22µF 22µF BSC050NE2LS BSC010NE2LS 0.22µF 100pF 0.22µF 0.22µF 1µF 0.22µF 1µF 0.22µF COMP1 VSNSP1 VSNSN1 VSNSOUT1 SGND VSNSOUT2 VSNSN2 VSNSP2 COMP2 FB2 Vcc FB3 COMP3 VSNSP3 VSNSN3 VSNSOUT3 VSNSOUT4 VSNSN4 COMP4 FB4 TRACK/SS4 RUN4 PWM4 PGOOD4 PWM3 RUN3 PGOOD3 I AVG1 ISNS1P ISNS1N ISNS2N ISNS2P I AVG2 I LIM2 TRACK/SS2 VINSNS PGOOD2 TRACK/SS3 I LIM3 I AVG3 ISNS3P ISNS3N ISNS4N ISNS4P I AVG4 I LIM1 VSNSP4 I LIM4 FB1 TRACK/SS1 FREQ CLKIN CLKOUT RUN1 PWM1 RUN2 PWM2 PGOOD1 L TC7851 6.3V COUT2 2.5V COUT1 V OUT 1.2V/120A VIN V CC V OUT VIN V CC COUT1,3,5,7: MURATA GMR31CR60J107M (100µF , 6.3V , X5R, 1206) COUT2,4,6,8: PANASONIC EEFSX0E331ER (330µF , 2.5V , 9m/uni03A9) L1-4: WURTH 744301025 (0.25µH, DCR = 0.325m/uni03A9 ±7%) 6.3V 2.5V COUT3 VIN 7V to 12V VIN BGV CC PWM V CC BGRTN BG SW TG BST VIN COUT4 6.3V COUT6 2.5V COUT5 VIN 6.3V 2.5V COUT7 VIN COUT8 V CC RUN RUN RUN SGND DT EN F LT L TC7060 BGV CC PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 BGV CC PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 VIN BGV CC PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 VIN RUN RUN RUN RUN

7060 TA02

Rev. A For more information www.analog.com TYPICAL APPLICATIONS High Efficiency 6-Phase, 12V, 180A Supply 24.9k BOOSTBUCK BOOSTBUCK M11 M12 M10 VHIGH

7871 TA02

0.1µF 1.69k 1m/uni03A9 16.9k0.1µF 1.5k 6.8µH SNSA6+ SNSD6+ SNS6– VHIGHVHIGH ITHHIGH 22µF 110k 100µF VHIGH 30V TO 75V 2.2µF ×1233µF ×12 90.9k 10k 10k 0.1µF 1µF 1µF 100pF 4.53k10nF 47pF 3.01k 499k 12.7k 243k 10k 649k 10k BUCK SPI INTERFACE L TC7871 2.2/uni03A9 37.4k L TC7060L TC7060 0.22µF PWMEN 0.22µF 1µF1µF 0.22µF0.22µF D6 0.22µFD5 0.22µFD4 30.9k 10/uni03A9 L1–L6: SAGAMI CVE2622H06R8M (6.8µH, DCR = 1.8m/uni03A9) D1–D6: DIODES DFLS1100 M1, M3, M5, M7, M9, M11: BSC117N08NS5 M2, M4, M6, M8, M10, M12: BSC052N08NS5 D7 = DIODES ZHCS400 DRVCCDRVCC BST TG SW BG BGRTN BGVCC VCC EN F LT PWM DT SGND PWM5 PWMEN 0.1µF 1.69k 1m/uni03A9 16.9k 0.1µF1.5k 6.8µH SNSA5+ SNSD5+ SNS5– VHIGH L TC7060 0.22µF 1µF 30.9k 10/uni03A9DRVCC BST TG SW BG BGRTN BGVCC VCC EN F LT PWM DT SGND PWM4 PWMEN 0.1µF 1.69k 1m/uni03A9 16.9k 0.1µF1.5k 6.8µH SNSA4+ SNSD4+ SNS4– VHIGH L TC7060 0.22µF 1µF 30.9k 10/uni03A9DRVCC SCLK SDI SDO CSB PWMEN PWMEN DRVSET PWM1 SNSA1+ SNSD1+ SNS1– PWM2 SNSA2+ SNSD2+ SNS2– PWM3 SNSA3+ SNSD3+ SNS3– SETCUR SYNC MODERUN 10k V5 DRVCC SS IMON51k 10k V5 4.7µF30.1k 100pF 10nF 4.7µF 1m/uni03A9 16.9k 1.5k 0.1µF 1.69k 6.8µH 30.9k 10/uni03A9 BST TG SW BG BGRTN BGVCC VCC EN F LT PWM DT SGND 0.1µF VHIGH L TC7060 PWMEN 0.22µF 1µF 0.22µF DRVCC 1m/uni03A9 16.9k 1.5k 0.1µF 1.69k 6.8µH 30.9k 10/uni03A9 BST TG SW BG BGRTN BGVCC VCC EN F LT PWM DT SGND 0.1µF VHIGH L TC7060 PWMEN 0.22µF 1µF 0.22µF DRVCC 1m/uni03A9 16.9k 1.5k 0.1µF 1.69k 6.8µH 30.9k 10/uni03A9 VLOW DRVCC 0.1µF

Rev. AFor more information www.analog.com TYPICAL APPLICATIONS Up to 100A High Efficiency 4 to 1 Switched Capacitor Converter BSZ0501NSI BSC010N04LS6 1µF 590k 4.7µF ×4 100µF ×2 11.5k 2.2/uni03A9 0.1µF 0.1µF 1µF 100k 60.4k 590k 18.7k 80.6k 0.68µH 2.2µF ×2 BSC021N08NS5 BSC072N08NS5 0.1µF 1µF DFLS1100 4.7µF 4.7nF 10k 100pF 154k 0.1µF 20k 20k 0.1µF 2.2/uni03A9 0.1µF 2m/uni03A9 4.7µF 10k 10k SBR02U100LP 1µF 100k 71.5k 0.47µF 549/uni03A9 0.1µF 90.9k 10k 10k 0.1µF 2.2µF SBR02U100LP 1µF 64.9k 2.2µF ×10 47µF ×6 BSC010N04LS6 BSC010NE2LS5 1µF 2.2µF SBR02U100LP 1µF 64.9k BSC010NE2LS5 BSC010NE2LS5 4.7µF 4.7µF SBR02U100LP 1µF 64.9k BSC010NE2LS5 BSC010NE2LS5 2.2µF 4.7µF SBR02U100LP 1µF 64.9k BSC010NE2LS5 BSC010NE2LS5 2.2µF 4.7µF SBR02U100LP 1µF 64.9k SBR02U100LP SBR02U100LP 10µF ×20 10µF ×20 10µF ×20 22µF ×36 150µF ×3 4.7µF ×20 10pF 0.47µF PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 L TC7801 OVLO 100V 63V 40V to 60V PV IN V IN EXTV CC INTV CC 8V EXTERNAL SUPPL Y MODE CPUMP_EN PGOOD FREQ DRVSET RUN L TC7820 XAL8080-681ME 100V V INB TG BG SW SENSE+ SENSE– BST DRV CC NDRV PLLIN ITH FB DRVUV GND SS VHIGH_SENSE V INY V CC INTV CC EXTV CC FAUL T PGOOD RUN HYS_PRGM FREQ TIMER BOOST1 PWM3A SW1 BOOST2 V LOW BOOST3 SW3 PWM1A PWM2A I SENSE+ I SENSE– UV V OUT VLOW_SENSE BGV CC PWM3A 100V 80V PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 BGV CC PWM3A PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 BGV CC PWM1A PWM V CC BGRTN BG SW TG BST SGND DT EN F LT L TC7060 BGV CC PWM2A PWM V CC BGRTN

7060 TA04

V OUT UP TO 100A

Rev. A For more information www.analog.com PACKAGE DESCRIPTION MSOP (MSE12) 0213 REV G 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.22 –/uni00A00.38 (.009 – .015) TYP 0.86 (.034) REF 0.650 (.0256) BSC 12 11 10 9 8 7 DETAIL “B” 1 6 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE RECOMMENDED SOLDER PAD LAYOUT BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 1 2 3 4 5 6 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.406 ±0.076 (.016 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) 0.42 ±0.038 (.0165 ±.0015) TYP 0.65 (.0256) BSC 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev G)

Rev. AFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 04/20 Updated Order Information. RDT changed from 64.9kΩ to 100kΩ in IVCC row.

Rev. A  ANALOG DEVICES, INC. 2020 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LTC4449 High Speed Synchronous N-Channel MOSFET Driver Up to 38V Supply Voltage, 4V ≤ VCC ≤ 6.5V, 3.2A Peak Pull-Up/4.5A Peak Pull-Down LTC4442/ LTC4442-1 High Speed Synchronous N-Channel MOSFET Driver Up to 38V Supply Voltage, 6V ≤ VCC ≤ 9.5V, 2.4A Peak Pull-Up/5A Peak Pull-Down LTC4446 High Voltage Synchronous N-Channel MOSFET Driver without Shoot-Through Protection Up to 100V Supply Voltage, 7.2V ≤ VCC ≤ 13.5V, 2.5A Peak Pull-Up/3A Peak Pull-Down LTC4444/ LTC4444-5 High Voltage Synchronous N-Channel MOSFET Driver with Shoot-Through Protection Up to 100V Supply Voltage, 4.5V/7.2V ≤ VCC ≤ 13.5V, 2.5A Peak Pull-Up/3A Peak Pull-Down LTC3774 Dual, Mulitphase Curent Mode Synchronous Step-Down DC/DC Controller for Sub-Milliohm DCR Sensing Operates with DrMOS, Power Blocks or External Drivers/MOSFETs, 4.5V≤ VIN ≤ 38V, 0.6V ≤ VOUT ≤ 3.5V LTC3861 Dual, Multiphase Step-Down Voltage Mode DC/DC Controller with Accurate Current Sharing Operates with Power Blocks, DrMOS or External MOSFETs, 3V≤ VIN ≤ 24V LTC7851 Quad Output, Multiphase Step-Down Voltage Mode DC/DC Controller with Accurate Current Sharing Operates with DrMOS, Power Blocks or External Drivers/MOSFETs, VIN Range Depends on External Components, 3V≤ VCC ≤ 5.5V, 0.6V ≤ VOUT ≤ VCC −0.5V LTC7820 Fixed Ratio High Power Inductorless (Charge Pump) DC/DC Controller 6V ≤ VIN ≤ 72V, 2:1 Voltage Divider , 1:2 Voltage Doubler , 1:1 Voltage Inverter , Low Noise Soft Switching, 4mm × 5mm QFN-28 LTC7821 Hybrid Step-Down Synchronous Controller 10V ≤ VIN ≤ 72V, 0.9V ≤ VOUT ≤ 20V, Low Noise Soft Switching, 5mm × 5mm QFN-32 LTC7871 Six-Phase, Synchronous Bidirectional Buck or Boost Controller VHIGH up to 100V, VLOW up to 60V, SPI Interface, 64-Lead LQFP LTC7801 150V Low IQ, Synchronous Step-Down DC/DC Controller , 100% Duty Cycle Capability, Adjustable 5V to 10V Gate Drive 4V ≤ VIN ≤ 140V, 150VPK, 0.8V ≤ VOUT ≤ 60V, IQ = 40µA, PLL Fixed Frequency 50kHz to 900kHz 51k 36.5k SW TG BST DT PWM F LT EN V CC BGV CC BG BGRTN V IN 0.22µF 80V V CC 10V 0.22µF 10Ω 1µF PWM L TC7060 (FROM CONTROLLER IC) V OUT SGND

7060 TA05

High Input Voltage Buck Converter

Product Information

LTC7061 specifications and overview.

Summary

100V Half-Bridge Driver with Floating Grounds and Adjustable Dead-Time 04/20-REV.A

Description

100V Half-Bridge Driver with Floating Grounds and Adjustable Dead-Time 04/20-REV.A

Source title LTC7061 Datasheet(PDF) - Analog Devices

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