LTC6087

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Technical content

Features

applications

Description

Dual/Quad 14MHz, Rail-to-Rail CMOS Amplifiers The LT C®6087/LTC6088 are dual/quad, low noise, low offset, rail-to-rail input/output, unity-gain stable CMOS operational amplifiers that feature 1pA of input bias current. A 14MHz gain bandwidth and 7.2V/µs slew rate, combined with low noise (10nV/√Hz) and a low 0.75mV offset, make the LTC6087/LTC6088 useful in a variety of applications. The 1.05mA supply current and the shutdown mode are ideal for signal processing applications which demand performance with minimal power. The LTC6087/LTC6088 has an output stage which swings within 30mV of either supply rail to maximize signal dy- namic range in low supply applications. The input common mode range includes the entire supply voltage. These op amps are specified on power supply voltages of 3V and 5V from –40°C to 125°C. The dual amplifier LTC6087 is available in 8-lead MSOP and 10-lead DFN packages. The quad amplifier LTC6088 is available in 16-lead SSOP and DFN packages. Single Supply Shock/Vibration Sensor Amplifier n Low Offset Voltage: 750µV Maximum n Low Offset Drift: 5µV/°C Maximum n Input Bias Current: pA (Typical at 25°C) pA (Typical at 85°C) n Rail-to-Rail Inputs and Outputs n Gain Bandwidth Product: 14MHz n CMRR: 70dB Minimum n PSRR: 93dB Minimum n Input Noise Voltage Density: 12nV/√Hz n Supply Current: 1.05mA per Amp n Shutdown Current: 2.3µA per Amp n 2.7V to 5.5V Operation Voltage n Available in 8-Lead MSOP and 10-Lead DFN n Portable Test Equipment n Medical Equipment n Audio n Data Acquisition n High Impedance T ransducer Amplifier LTC6087 Input Bias Current vs Temperature L, LT, LT C and LT M are registered trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. typical application 1/2 L TC6087 MURATA SHOCK SENSOR PKGS-00MX1 520pF , 0.57pC/g www.murata.com 1/2 L TC6087 VS 100k

60878 TA01a

VS = 2.7V TO 5.5V VS 0.1µF100k 100k 100M 100pF TEMPERATURE (°C) 25 40 INPUT BIAS CURRENT (pA) 100

1000 VS = 5V

VCM = 2.5V 55 70 85 100 115 130

60878 TA01b

S Operating Temperature Range (Note 3) LTC6 40°C to 85°C LTC6 40°C to 125°C (Note 1) OUTA –INA +INA V OUTB –INB +INB TOP VIEW MS8 PACKAGE 8-LEAD PLASTIC MSOP A B TJMAX = 150°C, θJA = 200°C/W TOP VIEW DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN 1 V+ OUTB –INB +INB SHDNB OUTA –INA +INA SHDNA A B TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS V–, MUST BE SOLDERED TO PCB GN PACKAGE 16-LEAD PLASTIC SSOP NARROW TOP VIEW OUTA –INA +INA V +INB –INB OUTB NC OUTD –IND +IND V +INC –INC OUTC NC A B C D TJMAX = 150°C, θJA = 110°C/W OUTD –IND +IND V +INC –INC OUTC NC OUTA –INA +INA V +INB –INB OUTB NC TOP VIEW DHC PACKAGE 16-LEAD (5mm × 3mm) PLASTIC DFN A B C D TJMAX = 150°C, θJA = 43°C/W EXPOSED PAD (PIN 17) IS V–, MUST BE SOLDERED TO PCB Specified Temperature Range (Note 4) LTC6 °C to 70°C LTC6 40°C to 125°C 0°C 65°C to 150°C Lead Temperature (Soldering, 10 sec) MS8, pin conFiguration

The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS C SUFFIX H SUFFIX UNITSMIN TYP MAX MIN TYP MAX VOS Offset Voltage (Note 5) LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC l l ±330 ±330 ±750 ±1100 ±900 ±1350 ±330 ±330 ±750 ±1100 ±1100 ±1600 µV µV µV µV ΔV OS/ΔT Input Offset Voltage Drift (Note 6) LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC l l µV/°C µV/°C I B Input Bias Current (Notes 5, 7) Guaranteed by 5V Test l 500 pA pA I OS Input Offset Current (Notes 5, 7) Guaranteed by 5V Test l 0.5 0.5 150 pA pA e n Input Noise Voltage Density f = 1kHz f = 10kHz nV/√Hz nV/√Hz Input Noise Voltage 0.1Hz to 10Hz 2.5 2.5 µV P-P in Input Noise Current Density (Note 8) f = 1Hz 0.56 0.56 fA/√Hz Input Common Mode Range l V– V+ V– V+ V CIN Input Capacitance Differential Mode Common Mode f = 100kHz 2.7 4.2 2.7 4.2 pF pF CMRR Common Mode Rejection Ratio 0V ≤ V CM ≤ 3V l 80 64 80 dB dB PSRR Power Supply Rejection Ratio V S = 2.7V to 5.5V l 115 93 115 dB dB V OUT Output Voltage, High (Referred to V+) No Load ISOURCE = 1mA ISOURCE = 5mA l l l 120 210 120 230 mV mV mV Output Voltage, Low (Referred to V –) No Load ISINK = 1mA ISINK = 5mA l l l 120 210 120 240 mV mV mV LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC6087CDD#PBF LTC6087HDD#PBF LTC6087CMS8#PBF LTC6087HMS8#PBF LTC6088CDHC#PBF LTC6088HDHC#PBF LTC6088CGN#PBF LTC6088HGN#PBF LTC6087CDD#TRPBF LTC6087HDD#TRPBF LTC6087CMS8#TRPBF LTC6087HMS8#TRPBF LTC6088CDHC#TRPBF LTC6088HDHC#TRPBF LTC6088CGN#TRPBF LTC6088HGN#TRPBF LCTX LCTX L TCTY L TCTY 6088 6088 6088 6088H 10-Lead (3mm × 3mm) Plastic DFN 10-Lead (3mm × 3mm) Plastic DFN 8-Lead Plastic MSOP 8-Lead Plastic MSOP 16-Lead (5mm × 3mm) Plastic DFN 16-Lead (5mm × 3mm) Plastic DFN 16-Lead Plastic SSOP 16-Lead Plastic SSOP –40°C to 85°C –40°C to 125°C –40°C to 85°C –40°C to 125°C –40°C to 85°C –40°C to 125°C –40°C to 85°C –40°C to 125°C Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. Consult LT C Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/

electrical characteristics

electrical characteristics The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 3V, V– = 0V, VCM = 0.5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS C SUFFIX H SUFFIX UNITSMIN TYP MAX MIN TYP MAX AVOL Large-Signal Voltage Gain RLOAD = 10k, 0.5V ≤ VOUT ≤ 2.5V l 500 300 3000 500

3000 V/mV

I SC Output Short-Circuit Current Source and Sink l 35 25 35 mA mA SR Slew Rate A V = 1 7.2 7.2 V/µs GBW Gain Bandwidth Product (f TEST = 20kHz) R LOAD = 50k, VCM = 1.5V l 14 10

14 MHz

F

0 Phase Margin RL = 10k, CL = 45pF, AV = 1 45 45 Deg

tS Settling Time 0.1% VSTEP = 2V, AV = –1, RL = 1k 1 1 µs IS Supply Current (per Amplifier) No Load l 1.05 1.05 1.20 1.25 1.05 1.05 1.20 1.35 mA mA Shutdown Current (per Amplifier) Shutdown, V SHDNx ≤ 0.8V l 0.2 1 0.2 1 µA VS Supply Voltage Range Guaranteed by the PSRR Test l 2.7 5.5 2.7 5.5 V Channel Separation fS = 10kHz –120 –120 dB Shutdown Logic SHDNx High SHDNx Low l l 0.8 0.8 V V tON Turn-On Time VSHDNx = 0.8V to 2V 6 6 µs tOFF Turn-Off Time VSHDNx = 2V to 0.8V 2 2 µs Leakage of SHDN Pin VSHDNx = 0V l 0.1 0.5 0.1 0.5 µA The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS C SUFFIX H SUFFIX UNITSMIN TYP MAX MIN TYP MAX VOS Offset Voltage (Note 5) LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC l l ±330 ±330 ±750 ±1100 ±900 ±1350 ±330 ±330 ±750 ±1100 ±1100 ±1600 µV µV µV µV ΔV OS/ΔT Input Offset Voltage Drift (Note 6) LTC6087MS8, LTC6088GN LTC6087DD, LTC6088DHC l l µV/°C µV/°C I B Input Bias Current (Notes 5, 7) l 500 pA pA I OS Input Offset Current (Notes 5, 7) l 0.5 0.5 150 pA pA e n Input Noise Voltage Density f = 1kHz f = 10kHz nV/√Hz nV/√Hz Input Noise Voltage 0.1Hz to 10Hz 2.5 2.5 µV P-P in Input Noise Current Density (Note 8) f = 1Hz 0.56 0.56 fA/√Hz Input Common Mode Range l V– V+ V– V+ V CIN Input Capacitance Differential Mode Common Mode f = 100kHz 2.7 4.2 2.7 4.2 pF pF

electrical characteristics The l denotes the specifications which apply over the full specified temperature range, otherwise specifications are at TA = 25°C. Test conditions are V+ = 5V, V– = 0V, VCM = 0.5V unless otherwise noted. SYMBOL PARAMETER CONDITIONS C SUFFIX H SUFFIX UNITSMIN TYP MAX MIN TYP MAX CMRR Common Mode Rejection Ratio 0V ≤ V CM ≤ 5V l 84 70 84 dB dB PSRR Power Supply Rejection Ratio V S = 2.7V to 5.5V l 115 93 115 dB dB V OUT Output Voltage, High (Referred to V+) No Load ISOURCE = 1mA ISOURCE = 5mA l l l 110 190 110 210 mV mV mV Output Voltage, Low (Referred to V –) No Load ISINK = 1mA ISINK = 5mA l l l 110 200 110 220 mV mV mV A VOL Large-Signal Voltage Gain RLOAD = 10k, 0.5V ≤ VOUT ≤ 4.5V l 1000 500 6000 1000

6000 V/mV

I SC Output Short-Circuit Current Source and Sink l 45 28 45 mA mA SR Slew Rate A V = 1 7.2 7.2 V/µs GBW Gain Bandwidth Product (f TEST = 20kHz) R LOAD = 50k, VCM = 2.5V l 14 10 F

0 Phase Margin RL = 10k, CL = 45pF, AV = 1 47 47 Deg

tS Settling Time 0.1% VSTEP = 2V, AV = –1, RL = 1k 0.8 0.8 µs IS Supply Current (per Amplifier) No Load l 1.05 1.05 1.25 1.30 1.05 1.05 1.25 1.40 mA mA Shutdown Current (per Amplifier) Shutdown, V SHDNx ≤ 1.2V l 2.3 5 2.3 5 µA VS Supply Voltage Range Guaranteed by the PSRR Test l 2.7 5.5 2.7 5.5 V Channel Separation fS = 10kHz –120 –120 dB Shutdown Logic SHDNx High SHDNx Low l l 3.5 1.2 3.5 1.2 V V tON Turn-On Time VSHDNx = 1.2V to 3.5V 6 6 µs tOFF Turn-Off Time VSHDNx = 3.5V to 1.2V 2 2 µs Leakage of SHDN Pin VSHDNx = 0V l 0.4 1 0.4 1 µA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and the total output current. Note 3: The LTC6087C/LTC6088C are guaranteed functional over the operating temperature range of –40°C to 85°C. The LTC6087H/LTC6088H are guaranteed functional over the operating temperature range of –40°C to 125°C. Note 4: The LTC6087C/LTC6088C are guaranteed to meet specified performance from 0°C to 70°C. The LTC6087C/LTC6088C are designed, characterized and expected to meet specified performance from –40°C to 125ºC but are not tested or QA sampled at these temperatures. The LTC6087H/LTC6088H are guaranteed to meet specified performance from –40°C to 125°C. Note 5: ESD (electrostatic discharge) sensitive device. ESD protection devices are used extensively internal to the LTC6087/LTC6088; however, high electrostatic discharge can damage or degrade the device. Use proper ESD handling precautions. Note 6: This parameter is not 100% tested. Note 7: This specification is limited by high speed automated test capability. See Typical Performance Characteristic curves for actual performance. Note 8: Current noise is calculated from: in = √2qIB, where q = 1.6 • 10–19 coulombs.

typical perForMance characteristics VOS Distribution VOS vs VCM VOS Drift Distribution Input Bias Current vs Common Mode Voltage Input Noise Voltage vs Frequency 0.1Hz to 10Hz Output Voltage Noise Output Voltage Swing vs Load Current Supply Current vs Supply VoltageInput Noise Current vs Frequency VOS (mV) PERCENTAGE OF UNITS (%)

60878 G01

0.8 L TC6087MS8 VS = 5V VCM = 0.5V TA = 25°C VCM (V) VOS (mV) 0.2 0.6 1.0

60878 G02

–0.2 –0.6 0.4 0.8 –0.4 –0.8 –1.0 VS = 5V TA = 25°C REPRESENTATIVE PARTS DISTRIBUTION (µV/°C) PERCENT OF UNITS (%) 1.2

60878 G03

–1.2 –0.4 0.4 2.0 2.8 L TC6087MS8 VS = 5V VCM = 2.5V TA = –40°C TO 125°C COMMON MODE VOL TAGE (V) 0 0.5 INPUT BIAS CURRENT (pA) 0.1 100 1.5 2.5 3.51 2 3 4 4.5 5

60878 G05

0.01 1000 10000 VS = 5V TA = 125°C TA = 85°C TA = 25°C FREQUENCY (Hz) 100 10 1k 10k 100k

60878 G06

INPUT NOISE VOL TAGE (nV/√Hz) VS = 5V VCM = 2.5V TA = 25°C TIME (1s/DIV) INPUT NOISE VOL TAGE (1µV/DIV)

60878 G07

VS = 5V VCM = 2.5V FREQUENCY (Hz) 100NOISE CURRENT (fA/√Hz) 200 300 400 500 1 100 1000 100000

60878 G04

LOAD CURRENT (mA) 0.1 2.0 OUTPUT VOL TAGE SWING (V) 2.5 3.0 3.5 4.0 1 10 100

60878 G08

1.5 1.0 0.5 4.5 5.0 VS = 5V VCM = 2.5V TA = 125°C TA = 25°C TA = –55°C SOURCE SINK SUPPLY VOLTAGE (V) SUPPLY CURRENT (mA) 0.4 0.8 1.2 0.2 0.6 1.0 1 2 3 4

69878 G09

VCM = 0.5V TA = 25°C

typical perForMance characteristics Supply Current vs Temperature Open-Loop Gain vs Frequency CMRR vs Frequency PSRR vs Frequency Output Impedance vs Frequency Small-Signal Response Small-Signal Response Large-Signal Response Large-Signal Response TEMPERATURE (°C) –25 SUPPLY CURRENT (mA) 1.1 1.3 1.5

60878 G10

0.9 0.7 1.0 1.2 1.4 0.8 0.6 0.5 5 35 65–10 –40 11020 50 80 125 PER AMPLIFIER VCM = 0.5V VS = 5V VS = 3V FREQUENCY (Hz) GAIN (dB) PHASE (DEG) –10 10k 1M 10M 100M

60878 G11

–20 –20 100 120 –40 –60 –80 100k VS = 5V VS = 3V CL = 5pF RL = 1k VCM = VS/2 TA = 25°CPHASE GAIN FREQUENCY (Hz) CMRR (dB) 100 10k 1M 10M 100M

60878 G12

–10 100k 110 VS = 5V VCM = 2.5V RL = 1k TA = 25°C FREQUENCY (Hz) PSRR (dB) 10k 100k 1M 10M 100M

60878 G13

–10 100 POSITIVE SUPPLY VS = 5V VCM = 2.5V TA = 25°C NEGATIVE SUPPLY FREQUENCY (Hz) 10k 100k

0.001 OUTPUT IMPEDANCE (/uni03A9)

60878 G14

0.1 0.01 100 VS = 5V VCM = 2.5V TA = 25°C AV = 10 AV = 1 AV = 2 200ns/DIVVS = 5V AV = 1 RL = ∞

60878 G15

200ns/DIVVS = 5V AV = 1 RL = ∞ CL = 33pF 100mV/DIV

60878 G16

2µs/DIVVS = 5V AV = 1 RL = ∞ 1V/DIV

60878 G17

1µs/DIVVS = 5V AV = –1 RL = 1k 1V/DIV

60878 G18

typical perForMance characteristics Overshoot vs Capacitive Load Channel Separation vs Frequency Total Harmonic Distortion + Noise vs Load Resistance Total Harmonic Distortion + Noise vs Frequency Total Harmonic Distortion + Noise vs Output Voltage Disabled Output Impedance vs Frequency Overshoot vs Capacitive Load Total Harmonic Distortion + Noise vs Frequency FREQUENCY (Hz) OUTPUT IMPEDANCE (k/uni03A9) 100 1000 100000 1000000 100 10k 100k 10M

60878 G20

0.1 VS = 5V VCM = 1V AV = 1 TA = 25°C CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000

60878 G21

VS = 5V VCM = 2.5V AV = 1 – RS CL RS = 10/uni03A9 RS = 50/uni03A9 CAPACITIVE LOAD (pF) OVERSHOOT (%) 100 1000

60878 G22

VS = 5V VCM = 2.5V AV = –1 RS = 10/uni03A9 RS = 50/uni03A9 RS 30pF CL FREQUENCY (MHz) –120CHANNEL SEPARATON (dB) –110 –105 –95 –90 0.01 1 10 100

60878 G23

–130 0.1 –100 –115 –125 VS = 5V VCM = 2.5V TA = 25°C FREQUENCY (kHz) 0.01THD + NOISE (%) 0.1 0.01 1 10 100

60878 G24

0.001 0.1 AV = 1, VIN = 1VP-P AV = –2, VIN = 1VP-P AV = 1, VIN = 2VP-P AV = 2, VIN = 1VP-P VS = 3V VCM = 1.5V RL = 10k FREQUENCY (kHz) 0.01

0.001 THD + NOISE (%)

0.01 0.1 10.1 10 100

60878 G25

AV = 1, VIN = 1VP-P AV = –2, VIN = 1VP-P AV = 1, VIN = 2VP-P AV = 2, VIN = 1VP-P VS = 5V VCM = 2.5V RL = 10k OUTPUT VOL TAGE (VP-P) 0 0.5 1 2 2.5 3 4 4.5

0.0001 THD + NOISE (%)

0.01 0.1 1.5 3.5 5

60878 G26

0.001 VS = 3V AT 20kHz VS = 5V AT 20kHz VS = 5V AT 1kHz VS = 3V AT 1kHz RL = 10k VCM = VS/2 AV = 1 LOAD RESISTANCE TO GROUND (k/uni03A9) 0.1 0.0001 THD + NOISE (%)0.001 0.01 0.1 1 10 100

60878 G27

VS = 3V , VIN = 1VP-P AV = 1 VCM = VS/2 AT 1kHz VS = 5V , VIN = 2VP-P

pulls the pin to V+ when floating. pulls the pin to V+ when floating. mode voltage to both positive and negative supply voltages. At high input common mode range, the NMOS pair is on. 1.3V and 0.9V below the positive supply. provide a guard ring around the inputs. from V–. Figure 2 shows the inverting gain configuration. Figure 1. Sample Layout. Unity-Gain Configuration. Using Guard Figure 2. Sample Layout. Inverting Gain Configuration. Using

60878 F01

60878 F02

loads, in other words when no DC load current is present. output applications as shown in Figure 3. or less, no damage to the device will occur. shown in the Typical Performance Characteristics. impedance, the noise voltage is dominated by the resistor. expression in = √2qIB, where q = 1.6 • 10 –19 coulombs. the source resistance. Noise current rises with frequency. Performance Characteristics section. Figure 3. Inverting Amplifier with Muxed Output

60878 F03

– + OUT 60878 SS – + OUTPUT CONTROL VBIAS M1 M2 –IN +IN M11M10 1µA SHDN BIAS GENERATION NOTE: SHDN IS ONL Y AVAILABLE IN THE DFN10 PACKAGE package Description Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSOP (MS8) 0307 REV F 0.53 ±0.152 (.021 ±.006) SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.18 (.007) 0.254 (.010) 1.10 (.043) MAX 0.22 – 0.38 (.009 – .015) TYP 0.1016 ±0.0508 (.004 ±.002) 0.86 (.034) REF 0.65 (.0256) BSC 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 1 2 3 4 4.90 ±0.152 (.193 ±.006) 8 7 6 5 3.00 ±0.102 (.118 ±.004) (NOTE 3) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.52 (.0205) REF 5.23 (.206) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.42 ± 0.038 (.0165 ±.0015) TYP 0.65 (.0256) BSC 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev F)

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.125 TYP 2.38 ±0.10 (2 SIDES) 106 PIN 1 TOP MARK (SEE NOTE 6)

0.200 REF

0.00 – 0.05 (DD) DFN REV C 0310 0.25 ±0.05 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.15 ±0.05 0.50 BSC 0.70 ±0.05 3.55 ±0.05 PACKAGE OUTLINE 0.25 ±0.05

0.50 BSC

10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. GN16 REV B 0212 1 2 3 4 5 6 7 8 .229 – .244 (5.817 – 6.198) .150 – .157** (3.810 – 3.988) 16 15 14 13 .189 – .196* (4.801 – 4.978) 12 11 10 9 .016 – .050 (0.406 – 1.270) .015 ±.004 (0.38 ±0.10) × 45° (0.178 – 0.249) .0532 – .0688 (1.35 – 1.75) .008 – .012 (0.203 – 0.305) TYP .004 – .0098 (0.102 – 0.249) .0250 (0.635) BSC .009 (0.229) REF .254 MIN RECOMMENDED SOLDER PAD LAYOUT .150 – .165 .0250 BSC.0165 ±.0015 .045 ±.005 * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE INCHES (MILLIMETERS) NOTE: 1. CONTROLLING DIMENSION: INCHES 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 16-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B)

Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 ±0.10 (2 SIDES) 5.00 ±0.10 (2 SIDES) NOTE: 1. DRAWING PROPOSED TO BE MADE VARIATION OF VERSION (WJED-1) IN JEDEC PACKAGE OUTLINE MO-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.115 TYP R = 0.20 TYP 4.40 ±0.10 (2 SIDES) 169 PIN 1 TOP MARK (SEE NOTE 6) 0.00 – 0.05 (DHC16) DFN 1103 0.25 ±0.05 PIN 1 NOTCH 4.40 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.20 ±0.05 0.65 ±0.05 3.50 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05 16-Lead Plastic DFN (5mm × 3mm) (Reference LTC DWG # 05-08-1706 Rev Ø)

Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

revision history

REV DATE DESCRIPTION PAGE NUMBER C 7/12 Corrected Supply Current value. Provided VCM condition for GBW specification. 4, 5 (Revision history begins at Rev C)

Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com  LINEAR TECHNOLOGY CORPORATION 2007 LT 0712 REV C • PRINTED IN USA PART NUMBER DESCRIPTION COMMENTS LTC2051/LTC2052 Dual/Quad Zero-Drift Op Amps 3µV VOS(MAX), 30nV/°C VOS Drift (MAX) LTC6078/LTC6079 Dual/Quad Micropower Precision Rail-to-Rail Op Amps 25µV V OS(MAX), 0.7µV/°C VOS Drift (MAX), 1pA IBIAS(MAX) LTC6240 Single Low Noise Rail-to-Rail Output Op Amp 7nV/√Hz Noise, 1pA I BIAS(MAX), 10V/µs Slew Rate LTC6241/LTC6242 Dual/Quad Low Noise Rail-to-Rail Output Op Amps 7nV/√Hz Noise, 0.2pA I BIAS, 18MHz Gain Bandwidth LTC6244 Dual 50MHz Rail-to-Rail Op Amps 100mV VOS(MAX), 1pA IBIAS, 40V/µs Slew Rate typical applications Negative-Going and Positive-Going Photodiode TIAs on ±5V Supplies Almost Rail-to-Rail (0.3V to VCC) Gain-of-30 Current Sense Amplifier 1/2 L TC6087 1.5k –5V IPD VOUT 0V – IPD • RF RF 100k RF 100k 1N4148 CF 2pF CF 2pF PHOTODIODE ~3pF PHOTODIODE ~3pF 1/2 L TC6087 –5V 1.5k –5V

60878 TA02

0V + IPD • RF 1N4148 NOTE: DIFFERENT DEVICES. NOT THE SAME L TC6087 1/2 L TC6087 1/2 L TC6087 GAIN OF 15 STAGE GAIN OF 2 STAGE 140k 10k OUT200Ω

60878 TA03

FULL-SCALE VSENSE = 100mV (3V OUT). FOR SMALL SIGNALS, INPUT OPERATION IS RAIL-TO-RAIL (V S = 5mV to VCC). FOR FULL SCALE, INPUT OPERATION IS 0.3V TO RAIL. WORST-CASE INPUT OFFSET VOL TAGE = 1.8mV . 2N7002 C COMP 1nF RCOMP 10k VCC VS + –LOAD VSENSE ISENSE RSENSE 100Ω relateD parts