LTC3103

LTC4419CDD LINEAR | Alldatasheet

Document overview

• Manufacturer or author: Provided By ALLDATASHEET.COM(FREE DATASHEET DOWNLOAD SITE)
• PDF pages: 20

Technical content

For more information www.linear .com/L TC4419 Typical applicaTion FeaTures DescripTion 18V Dual Input Micropower PowerPath Prioritizer The LT C®4419 is a dual input monolithic PowerPath™ prioritizer with low operating current, that provides backup switchover for keeping critical circuitry alive during brown out and power loss conditions. Unlike diode-OR products, little current is drawn from the inactive supply even if its voltage is greater than the active supply. Internal 2Ω, current limited PMOS switches provide power path selection from a primary input (V1) or a backup input (V2) to the output. An adjustable voltage monitor set via an external resistive divider provides flexibility in setting the V1 to V2 switchover threshold. When primary input V1 drops, the ADJ monitor input causes OUT to be switched to V2. Fast non-overlap switchover circuitry prevents both reverse and cross conduction while minimizing output droop. The LTC4419 has two auxiliary comparators with open- drain outputs that provide flexible voltage monitoring. The V2ON output indicates if V2 is powering OUT. Freshness seal mode prevents V2 battery discharge during storage or shipment.

applicaTions

n Selects Highest Priority Valid Supply from T wo Inputs n Wide 1.8V to 18V Operating Range n Internal Dual 2Ω, 0.5A Switches n Low 3.6µA Operating Current n Low 320nA V2 Current When V1 Connected to OUT n Blocks Reverse and Cross Conduction Currents n Reverse Supply Protection to –15V n V2 Freshness Seal/Ship Mode n ±1.5% Accurate Adjustable Switchover Threshold n T wo Auxiliary ±2.3% Accurate Voltage Comparators n Overcurrent and Thermal Protection n Thermally Enhanced 10-Pin 3mm × 3mm DFN and 12-Lead Exposed Pad MSOP Packages n Low Power Battery Backup n Portable Equipment n Point-of-Sale (POS) Equipment L, LT, LT C, LT M, Linear Technology and the Linear logo are registered trademarks and PowerPath and ThinSOT are trademarks of Linear Technology Corporation. All other trademarks are the property of their respective owners. 1M 1M V2ON WALL ADAPTER 237k 10µF 121k 4.02M7.4V Li-Ion 280k V1 OUT OUT V1UV V2UV CMPOUT1 CMPOUT2 V2ON ADJ CMP1 CMP2

4419 TA01a

THRESHOLD: V1 < 4V (V1 FALLING) GND L TC4419 V2UV THRESHOLD: V2 < 6V (V2 FALLING) V1UV THRESHOLD: V1 < 4.4V (V1 FALLING) Typical Switchover Waveforms SWITCHOVER THRESHOLD COUT = 10µF ILOAD = 100mA OUT 50µs/DIV 2V/DIV 2V/DIV

4419 TA01b

For more information www.linear .com/L TC4419 absoluTe MaxiMuM raTings Input Supply Voltage V1, 24V 24V OUT 24V to 39V OUT –24V to 39V Input Voltages AD 0.3V to 24V Output Voltages CM POUT1, CMPOUT2, V2ON (Note 3) .. – 0.3V to 24V (Notes 1, 2) orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LTC4419CDD#PBF LTC4419CDD#TRPBF LGMS 10-Lead (3mm × 3mm) Plastic DFN 0°C to 70°C LTC4419IDD#PBF LTC4419IDD#TRPBF LGMS 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LTC4419CMSE#PBF LTC4419CMSE#TRPBF 4419 12-Lead Plastic Exposed Pad MSOP 0°C to 70°C LTC4419IMSE#PBF LTC4419IMSE#TRPBF 4419 12-Lead Plastic Exposed Pad MSOP –40°C to 85°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. TOP VIEW GND DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN 1 V2 CMP2 OUT V2ON CMPOUT2 CMP1 ADJ GND CMPOUT1 TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB NC CMP1 ADJ GND CMPOUT1 NC CMP2 OUT V2ON CMPOUT2 TOP VIEW GND MSE PACKAGE 12-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 40°C/W EXPOSED PAD (PIN 13) IS GND, MUST BE SOLDERED TO PCB pin conFiguraTion Pin Currents (Note 2) AD J, CMP1, CMP2, CMPOUT1, CMPOUT2, A Operating Ambient Temperature Range LTC4 °C to 70°C LTC4 C to 85°C C C to 150°C Lead Temperature (Soldering, 10 sec) MS 0°C (http://www.linear.com/product/LTC4419#orderinfo)

For more information www.linear .com/L TC4419 elecTrical characTerisTics The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. V1 = 3.6V, V2 = 3.6V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Supply Voltage and Currents V1, V2 Operating Voltage Range l 1.8 18 V IV1 V1 Current, V1 Powering OUT V1 Current, V2 Powering OUT IOUT = 0, V1 = 8.4V, V2 = 3.6V V1 = 8.4V, V2 = 3.6V l l 3.6 500 6.3 800 µA nA IV2 V2 Current, V2 Powering OUT V2 Current, V1 Powering OUT V2 Current in Freshness Seal Mode I OUT = 0, V1 = 3.6V, V2 = 8.4V V1 = 3.6V, V2 = 8.4V V1 = GND, V2 = 5V l l l 3.3 320 120 650 220 µA nA nA R ON Switch Resistance V1 = V2 = 5V, IOUT = –100mA l 1 2 5 Ω tVALID(V1) Input Qualification Time V1 Rising, ADJ Rising l 34 64 94 ms Input Comparators VTHA ADJ Threshold ADJ Falling l 1.032 1.047 1.062 V VHYSTA ADJ Comparator Hysteresis ADJ Rising l 30 50 70 mV VTHC CMP1, CMP2 Threshold CMP1, CMP2 Falling l 0.378 0.387 0.396 V VHYSTC CMP1, CMP2 Hysteresis CMP1, CMP2 Rising l 7.5 10 12.5 mV tPDA ADJ Comparator Falling Response Time 10% Overdrive l 4 7.3 12 µs tPDC CMP1, CMP2 Comparator Response Times 20% Overdrive l 30 65 µs Power Path Function I LIM Output Current Limit V1, V2 = 8.4V l 0.5 1.1 1.6 A VREV Reverse Comparator Threshold (V1, V2) – VOUT for Power Path Turn-On l 25 50 75 mV tSWITCH Break-Before-Make Switchover Time V1 = V2 = 5V, IOUT < –10mA l 1 2.5 5 µs I/O Specifications VOL Output Voltage Low, CMPOUT1, CMPOUT2 and V2ON I = 100µA I = 1mA l l 120 250 mV mV VOH V2ON Output High Voltage I = –1µA, V2 = 5V l 1.05 1.65 2.3 V IOH CMPOUT1, CMPOUT2 and V2ON, Output High Leakage CMPOUT1, CMPOUT2, V2ON = 18V l ±50 ±150 nA IPU(V2ON) V2ON Pull-Up Current V2 = 5V, ADJ = 0V, V2ON = 0V l –2.7 –5 –8 µA ILEAK ADJ, CMP1, CMP2 Leakage Current ADJ, CMP1, CMP2 = 0V, 1.5V l ±1 ±5 nA Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: All currents into pins are positive; all voltages are referenced to GND unless otherwise noted. Note 3: These pins can be tied to voltages down to –5V through a resistor that limits the current to less than –1mA. Note 4: The LTC4419 includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed 125°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability. Note 5: The LTC4419 is tested under pulsed load conditions such that T J ≈ TA. The junction temperature (TJ in °C) is calculated from the ambient temperature (TA in °C) and power dissipation (PD in Watts) according to the formula: TJ = TA + (PD • θJA)

For more information www.linear .com/L TC4419 Typical perForMance characTerisTics V1 Current, V2 Powers OUT Normalized Falling ADJ Threshold vs Temperature Normalized CMP1 and CMP2 Falling Thresholds vs Temperature ADJ Hysteresis vs Temperature V1 Current, V1 Powers OUT OUT = 0) V2 Current, V2 Powers OUT OUT = 0) V2 Current, V1 Powers OUT Open-Drain (CMPOUT1, CMPOUT2, V2ON) V OL vs Pull-Down Current ADJ Leakage vs Temperature V1 = 1.8V V1 = 3.6V V1 ≥ 6V TEMPERATURE (°C) –50 –25 100 125 2.5 3.0 3.5 4.0 4.5

4419 G01

V1 CURRENT (µA) V2 = 1.8V V2 = 3.6V V2 ≥ 6V TEMPERATURE (°C) –50 –25 100 125 2.5 3.0 3.5 4.0

4419 G02

V2 CURRENT (µA) V1 = V2 –40°C 25°C 85°C V2 VOL TAGE (V) 150 200 250 300 350 400 450 V2 CURRENT (nA)

4419 G03

V1 = V2 –40°C 25°C 85°C V2 VOL TAGE (V) 300 350 400 450 500 550

4419 G04

V1 CURRENT (nA) TEMPERATURE (°C) –50 –25 100 125 0.990 0.995 1.000 1.005 1.010 NORMALIZED V THA

4419 G07

TEMPERATURE (°C) –50 –25 100 125 0.990 0.995 1.000 1.005 1.010 NORMALIZED V THC

4419 G06

TEMPERATURE (°C) –50 –25 100 125 ADJ HYSTERESIS (mV)

4419 G08

PULL-DOWN CURRENT (mA) 0.0 0.5 1.0 1.5 100 150 200 250 V OL (mV)

4419 G05

V ADJ = 0V , 1.5V TEMPERATURE (°C) –50 –25 100 125 0.5 1.0 1.5 2.0 2.5 3.0 ADJ LEAKAGE (nA)

4419 G09

(TA = 25°C, V1 = V2 = 3.6V unless otherwise indicated).

For more information www.linear .com/L TC4419 Output Voltage and Current Waveforms During Switchover Output Current IOUT Response for Different Shorting Impedances Typical perForMance characTerisTics Output Current Limit vs Temperature I OUT vs VOUT for Different Input Supply Voltages V1 Reverse Voltage Blocking with V2 Powering OUT Switchover from a Higher to a Lower Voltage Switch R ON vs Temperature OUT 10V 10µs/DIV I OUT 0.5A/DIV 2V/DIV

4419 G16

COUT = 10µF C1 = C2 = 10µF ILOAD = 50mA 3.6V TEMPERATURE (°C) –50 –25 100 125 R ON (Ω)

4419 G13

TEMPERATURE (°C) –50 –25 100 125 0.80 0.90 1.00 1.10 1.20 1.30 1.40 CURRENT LIMIT (A)

4419 G10

I LOAD = 50mA –10V 10V 20ms/DIV 5V/DIV 10V/DIV I OUT 0.5A/DIV

4419 G17

V IN = 1.8V V IN = 3.6V V IN = 5V V OUT (V) 0.2 0.4 0.6 0.8 1.0 1.2 I OUT (A)

4419 G12

C OUT = 10µF I OUT = 200mA DISCONNECT FROM V1 CONNECT TO V2 3ms/DIV OUT 2V/DIV

4419 G15

1.2Ω 2.2Ω 3.3Ω 3.9Ω 5.0Ω µ s/DIV 0.5 1.0 1.5 2.0 2.5 3.0 IOUT (A)

4419 G11

(TA = 25°C, V1 = V2 = 3.6V unless otherwise indicated). Freshness Seal Current vs V2 Voltage and Temperature V1 = 0V 1.8V 3.6V ≥6V TEMPERATURE (°C) –50 –25 100 100 150 200 250

4419 G14

V2 CURRENT (nA)

For more information www.linear .com/L TC4419 pin FuncTions ADJ: Adjustable V1 Switchover Threshold Input. ADJ is the noninverting input to the switchover threshold comparator. If V1 ≥ 1.55V and ADJ ≥ 1.097V for at least 64ms, OUT is switched internally to the primary V1 input. When the ADJ input voltage is lower than 1.047V, OUT is switched internally to V2, if V2 ≥ 1.55V. Otherwise, OUT stays unpowered. Tie ADJ via a resistive divider to V1 to set the V1 to V2 switchover voltage. Do not leave open. CMP1: Auxiliary Comparator 1 Monitor Input. CMP1 is the noninverting input to an auxiliary comparator. The invert- ing input is internally connected to a 0.387V reference. Connect CMP1 to GND when it is not used. CMP2: Auxiliary Comparator 2 Monitor Input. CMP2 is the noninverting input to a second auxiliary comparator. The inverting input is internally connected to a 0.387V reference. Connect CMP2 to GND when it is not used. CMPOUT1: Auxiliary Comparator 1 Output. This open-drain comparator output is pulled low when CMP1 is below 0.387V and during power-up, otherwise it is released. Once released, connecting a resistor between CMPOUT1 and a desired supply voltage up to 18V causes this pin to be pulled high. Leave open if unused. CMPOUT2: Auxiliary Comparator 2 Output. This open-drain comparator output is pulled low when CMP2 is below 0.387V and during power-up, otherwise it is released. Once released, connecting a resistor between CMPOUT1 and a desired supply voltage up to 18V causes this pin to be pulled high. Leave open if unused. Exposed Pad: For best thermal performance, solder ex - posed pad to a large PCB area. GND: Device Ground. NC: No Connection. Not internally connected. OUT: Output Voltage Supply. OUT is a prioritized voltage output that is either connected to V1, V2 or is unpowered as indicated in Table 1 of the Applications Information section. Additionally, OUT must be at least 50mV below the input supply for a connection to that supply to be activated. Bypass with a capacitor of 1µF or greater. See Applications Information section for bypass capacitor recommendations. V1: Primary Power Supply. OUT is internally switched to V1 if V1 ≥ 1.55V and ADJ ≥ 1.097V. When in freshness seal mode, applying V1 ≥ 1.55V and ADJ ≥ 1.097V for 32ms disables freshness seal. Bypass with 1µF or greater. Tie to GND if unused. V2: Backup Power Supply. V2 is valid if its voltage is ≥1.55V. OUT is internally switched to V2 if ADJ < 1.047V or V1 < 1.55V, provided V2 is valid. Refer to Table 1 of the Applications Information section. Bypass with 1µF or greater. Tie to GND if unused. V2ON: V2 Connected Status. V2ON is an output that is driven high with a 5µA pull-up when the V2 to OUT power path is active. Otherwise it is driven low. Connect a resis- tor between OUT or V2 and this pin to provide additional pull-up. As this pin is used to enable freshness seal, do not force low or connect a pull-down resistor to this pin. Leave open if unused.

For more information www.linear .com/L TC4419 FuncTional DiagraM –1.097V/ 1.047V CADJ ADJ 1.55V/ 1.52V CUV2 1.55V/ 1.52V CUV1 CREV2 64ms 7.3µs 0.397V/ 0.387V CP2 CMP2 FRESHNESS SEAL 50mV OUT +– + – CREV1 EN1 EN2 2.5V 5µA 50mV OUT OUT CMPOUT2 0.397V/ 0.387V CP1 CMP1 CMPOUT1 V2ON CONTROL LOGIC GND 4419 FD

For more information www.linear .com/L TC4419 operaTion The Functional Diagram shows the major blocks of the LTC4419. The LTC4419 is a PowerPath prioritizer that switches output OUT between primary (V1) and backup (V2) sources depending on their validity and priority with V1 having the highest priority. If neither supply is valid, OUT stays unpowered. A resistive divider between V1, ADJ and GND and comparators CUV1 and CADJ are used to monitor V1’s voltage to establish validity. V1 is valid if V1 ≥ 1.55V and ADJ ≥ 1.097V for 64ms after V1 rises above 1.55V. Otherwise V1 is invalid. V2 is valid if its voltage as monitored by comparator CUV2 is ≥1.55V. Otherwise, it is invalid. Switchover threshold is independent of relative V1 and V2 voltages, permitting V1 to be lower or higher than V2 when V1 powers OUT and vice versa. Power connection to the output is made by enhancing back- to-back internal P-channel MOSFETs. Current passed by the MOSFETs is limited to typically 1.1A if OUT is greater than 1V. Otherwise it is limited to 250mA. When switching from V1 to V2, the V1 to OUT power path is first disabled and comparator CREV2 is enabled. After the OUT voltage drops 50mV below V2, as detected by CREV2, OUT is then connected to V2. V2ON pulls high after switchover. This break-before-make strategy prevents OUT from backfeeding V2. Switchover back to V1 occurs in a similar manner once V1 has been revalidated. V2ON pulls low if the V2 power path is disabled and during initial power-up when V1 or V2 is first applied. The LTC4419 blocks reverse voltages up to –15V when a reverse condition occurs on an inactive channel. The LTC4419 also disables a channel if the corresponding input supply falls below 1.52V. A small ~3µA current is drawn from either the prioritized input supply or the highest input supply if both input supplies are below 1.55V. Very little current (~320nA) is drawn from the unused supply. The LTC4419 provides two additional comparators, CP1 and CP2, whose open-drain outputs pull low when CMP1 and CMP2 pin voltages fall below 0.387V and during initial power-up. These comparators can be used to monitor supplies to provide early power failure warning and other useful information. The LTC4419 can be put into a V2 freshness seal mode to prevent battery discharge during storage or shipment. The Applications Information section lists the steps to engage and disengage V2 freshness seal.

OUT from a prioritized valid input supply. Table 1. OUT and LTC4419 ICC Power Table *VMAX = Higher of V1 and V2. †For 64ms. A typical battery backup application is shown in Figure 1. Li-ion battery on V1, switchover threshold is set to ~5.6V.

4419 F01

be taken into account when calculating resistor values. use VTHA(MIN), (R2 + R1)(MAX), and R3(MIN) in equation 1. power-up or when switching to a higher supply.

higher output droop than estimated by equation 8. nounced when the total resistance of the input tank is low. not exceed the absolute maximum ratings of the LTC4419. unwanted switchover between sources.

4419 F02

Figure 2. ADJ Comparator Propagation Delay

0.5Ω. Place this network close to the supply pin. are solved only by input bypassing. ringing if the OUT pin rings below –0.3V. istics table and are typically 10mV and 0.387V respectively . rising and falling thresholds of monitored input VMON.

4419 F03

Figure 3. Recommended Inductive T ransient Suppression Circuitry

4419 F04

Figure 4. Increasing CMP1 Hysteresis

V2 if built-in V1 (ADJ) hysteresis is insufficient. V1 droop is higher during the initial charging of C OUT. becomes invalid, switchover to the backup supply occurs.

4419 F06

Figure 6. Voltage Waveforms During a Brown-Out on V1 that Does Not Result in a Switchover to V2.

4419 F07

Figure 7. Voltage Waveforms When a Brown-Out

4419 F05

voltage is 50mV less than V2. from accidentally being engaged.

4419 F08

Figure 8. Freshness Seal Engage Procedure

4419 F09

Figure 9. Design Example

For more information www.linear .com/L TC4419 applicaTions inForMaTion Using (R1 + R2 + R3) = 500kΩ from equation 14, results in: R1+R2( ) = 1.047V •500kΩ 4V = 130.9kΩ (16) R3 ~ (500kΩ – 130.9kΩ) = 369.1kΩ ( 17) Using the nearest 1% resistor value yields R3 = 365kΩ. Rearranging equation 2 results in R1= VTHC • R2+R2+R3( ) VPFV1 (18) R1= 0.387V 4.5V • 500kΩ( ) (19) Solving equations 16 and 19 results in R1 = 43.3kΩ and R2 = 87.6kΩ. Using the nearest 1% resistors results in R2 = 88.7kΩ. Recalculating equation 1 using calculated R2 and R3 values and using standard 1% resistor values close to 43.3kΩ for R1 results in R1 = 44.2kΩ. A similar procedure is used to calculate R4 and R5 using equation 3 and total divider current. The design equations are shown below: R4+R5= 7.4V 5µA = 1.48MΩ (20) as desired current in the divider is 5µA. Rewriting equation 3 neglecting pin leakage and assuming R5 >> R4 results in: R4 = VTHC • R4+ R5( ) VV2UV (21) R4= 0.387V •1.48MΩ (22) Solving 20 and 22 results in R4 = 96.2kΩ and R5 = 1.38MΩ. Choosing the nearest 1% resistor results in R4 = 95.3kΩ and R5 = 1.37MΩ. C OUT affects both OUT droop during switchover as deter- mined by equation 4 and OUT rising slew rate as determined by equation 9. Calculate minimum COUT required to meet desired output droop and slew rate specifications using equations 8 and 9 and size C OUT to be the larger of the two values. COUT required to limit OUT droop to < 100mV is given by equation 8: COUT ≥ tPDA + tSWITCH( ) •ILOAD 100mV (23) COUT ≥ 7.3µs+ 2.5µs( ) •0.1A 100mV = 9.8µF (24) COUT required to limit OUT slew rate to < 0.1V/µs is given by equation 9: COUT ≥ ILIM 0.1V/µs= 11µF (25) Choose a COUT capacitor whose minimum value is 11µF accounting for voltage and temperature coefficients. Do this for other capacitors as well. Assuming correct PCB layout, choose C1 to be 2.2µF, which is ~ 1/5th of C OUT to suppress inductive transients. Also snub C1 with a 0.5Ω resistor to prevent ringing. Layout Consideration Make power and ground traces as wide as possible. Place bypass capacitors, snubbers and TVS devices as close to the pin as possible to reduce power path resistance and parasitic inductance. These result in smaller overvoltage transients and improved overvoltage protection. Place resistive dividers close to the pins to improve noise im - munity. Use a 4-layer board if possible with layer 2 as dedicated GND and solder the exposed pad to a large PCB GND trace for better heat dissipation. A partial layout for a 2-Layer PCB is shown in Figure 10.

Figure 10. Recommended 12-Lead MSE Layout for a 2-Layer PCB

4419 F10

4419 F11

Figure 11. Maximum Allowed COUT vs Input Voltage for Different TA to improve heat dissipation.

For more information www.linear .com/L TC4419 Typical applicaTions Battery Backup with Interface to Low Voltage Logic SuperCap Backup with SuperCap Charging 365k 5V TO 18V WALL ADAPTER 3.6V TO 18V BACKUP COUT 10µF 88.7k 44.2k 150k V1 OUT CMPOUT1 CMPOUT2 V2ON

4419 TA02

10µF 10µF 10µF IN OUT L TC1763-3.3V SHDN GND V2ON V1UV V2UV 3.3V SYSTEM SWITCHOVER THRESHOLD: V1 < 4V (V1 FALLING) V1UV THRESHOLD: V1 < 4.5V (V1 FALLING) V2UV THRESHOLD: V2 < 3V (V2 FALLING) RSN1 0.5/uni03A9 RSN2 0.5/uni03A9 C OUT 10µF SWITCHOVER THRESHOLD: V1 < 4V (V1 FALLING) V1UV THRESHOLD: V1 < 4.4V (V1 FALLING) V2UV THRESHOLD: V2 < 3.5V (V2 FALLING) 237k 121k 2N4351 R4B 237k R13 127k C2: MURATA DMF3Z5R5H474M3DTA0 R12 12.1k 1.7V TO 5.5V INPUT R4A 61.9k 1.87M OUT OUT V1UV V2UV CMPOUT1 L1 3.3µH 4.2V CMPOUT2 ADJ CMP1 V2ON

4419 TA03

10µF 120pF SW2SW1 L TC3128 GND VOUTRSENP RSENS MID IN PROG MAXV FB RUN

For more information www.linear .com/L TC4419 Typical applicaTions T riple Supply Monitor with Primary Battery Pack Protection Early Power Failure Warning with Low Battery Indication SWITCHOVER THRESHOLD: V1 < 12V (V1 FALLING) V2UV THRESHOLD: V2 < 7V (V2 FALLING) OUTUV THRESHOLD: OUT < 7.5V (OUT FALLING) C OUT 10µF 10µF 191k 10µF R11 5.36M R10 316k ALKALINE 113k 4-CELL 14.8V Li-Ion V1 OUT OUT V2UV OUTUV CMP2 CMPOUT1 CMPOUT2 V2ON V2ON ADJ CMP1

4419 TA04

C OUT 10µF 75k 41.2k 5.23M 174k 4-CELL 14.8V Li-Ion V1 OUT OUT PFV1 V2UV CMPOUT1 CMPOUT2 V2ON V2ON ADJ CMP1 CMP2

4419 TA05

22µF 10µF L1, 10µH SW2SW1 BST2BST1 VOUTVIN COMP FBRUN VCCSNSGND PWM L TC3111 1µF 0.1µF 12V TO OTHER CIRCUITS 0.1µFR13 R14 137k 10µF 5V TO 15V INPUT 39pF 1nF R12 44.2k R10 2.21M R11 158k PFV1: V1 POWER FAILURE THRESHOLD: V1 < 10.6V (V1 FALLING) SWITCHOVER THRESHOLD: V1 < 10V (V1 FALLING) V2UV THRESHOLD: V2 < 12V (V2 FALLING) 20k 18pF

For more information www.linear .com/L TC4419 package DescripTion Please refer to http://www.linear.com/product/LTC4419#packaging for the most recent package drawings. 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ± 0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ± 0.10 (2 SIDES) 0.75 ±0.05 R = 0.125 TYP 2.38 ±0.10 (2 SIDES) 106 PIN 1 TOP MARK (SEE NOTE 6)

0.200 REF

0.00 – 0.05 (DD) DFN REV C 0310 0.25 ± 0.05 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.15 ±0.05 0.50 BSC 0.70 ±0.05 3.55 ±0.05 PACKAGE OUTLINE 0.25 ± 0.05

0.50 BSC

10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER

For more information www.linear .com/L TC4419 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. package DescripTion Please refer to http://www.linear.com/product/LTC4419#packaging for the most recent package drawings. MSOP (MSE12) 0213 REV G 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.22 –/uni00A00.38 (.009 – .015) TYP 0.86 (.034) REF 0.650 (.0256) BSC 12 11 10 9 8 7 DETAIL “B” 1 6 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE RECOMMENDED SOLDER PAD LAYOUT BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 1 2 3 4 5 6 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.406 ±0.076 (.016 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) 0.42 ±0.038 (.0165 ±.0015) TYP 0.65 (.0256) BSC 12-Lead Plastic MSOP, Exposed Die Pad (Reference LTC DWG # 05-08-1666 Rev G)

For more information www.linear .com/L TC4419  LINEAR TECHNOLOGY CORPORATION 2015 LT 0816 • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com/L TC4419 relaTeD parTs Typical applicaTion High Efficiency Backup COUT 10µF SWITCHOVER THRESHOLD: V1< 4V (V1 FALLING) V1UV THRESHOLD: V1 < 4.4V (V1 FALLING) V2UV THRESHOLD: V2 < 6V (V2 FALLING) 2.2µF 237k 121k 4.02M 280k WALL ADAPTER 2-CELL 7.4V Li-Ion R13 1.1M R12 1.05M V1 OUT V1UV V2UV CMPOUT1 CMPOUT2 V2ON V2_ON RUN ADJ CMP1 CMP2

4419 TA06

10µF 10µF 10µF RUN MPPC VS2 VS1 V CC BST1 BST2SW1 PWM GND PGND L TC3129-1 VS3 SW2 22nF 22nFL1 3.3µH VIN OUT SYSTEM RSN1 0.5/uni03A9 PART NUMBER DESCRIPTION COMMENTS LT1763 500mA, Low Noise Micropower LDO Regulators V IN: 1.8V to 20V, 12-DFN, SO-8 Packages LTC2952 Pushbutton PowerPath Controller with Supervisor V IN: 2.7V to 28V, On/Off Timers, ±8kV HBM ESD, TSSOP-20 and QFN-20 Packages LTC3103 15V, 300mA Synchronous Step-Down DC/DC Converter VIN: 2.5V-15V, DFN-10 and MSE-10 Packages LTC3129/LTC3129-1 15V, 200mA Synchronous Buck-Boost DC/DC Converter with 1.3µA Quiescent Current V IN: 1.92V to 15V, QFN-16 and MSE-16 Packages LTC3388-1/LTC3388-3 20V, 50mA High Efficiency Nanopower Step-Down Regulator V IN: 2.7V to 20V, DFN-10 and MSE-10 Packages LTC4411 2.6A Low Loss Ideal Diode in ThinSOT™ Internal 2.6A P-channel, 2.6V to 5.5V, IQ = 40μA, SOT-23 Package LTC4412 36V Low Loss PowerPath Controller in ThinSOT 2.5V to 36V, P-channel, I Q = 11μA, SOT-23 Package LTC4415 Dual 4A Ideal Diodes with Adjustable Current Limit Dual Internal P-channel, 1.7V to 5.5V, MSOP-16 and DFN-16 Packages LTC4416 36V Low Loss Dual PowerPath Controller for Large PFETs 3.6V to 36V, 35μA per I Q Supply, MSOP-10 Package LTC4417 3-Channel Prioritized PowerPath Controller T riple P-Channel Controller, 2.5V to 36V, SSOP-24 and QFN-24 Packages LTC4355 Positive High Voltage Ideal Diode-OR with Supply and Fuse Monitors Dual N-channel, 9V to 80V, SO-16, MSOP-16 and DFN-14 Packages LTC4359 Ideal Diode Controller with Reverse Input Protection N-channel, 4V to 80V, MSOP-8 and DFN-6 Packages