LT8641A AD | Alldatasheet
Document overview
- PDF pages: 35
Technical content
analog.com Rev 0 2 of 35
REVISION HISTORY
Nature of Change Page Number 5/23 – REV 0
analog.com Rev 0 3 of 35 TABLE OF CONTENTS
Table 1. Electrical Characteristics
TA = 25°C unless otherwise specified. Table 2. Absolute Maximum Ratings (1) 1 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
analog.com Rev 0 6 of 35 indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. 2 The LT8641AR is specified over the –40°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes; operating lifetime is derated for junction temperatures greater than 125°C. Note that the maximum ambient temperature consistent with these specifications is determined by specific operating conditions in conjunction with the board layout, rated package thermal impedance, and other environmental factors. The junction temperature (TJ, in °C) is calculated from the ambient temperature (TA, in °C) and power dissipation (PD, in Watts) according to the formula: TJ = TA + (PD × θJA) where θJA (in °C/W) is the package thermal impedance. 3 θ values determined per JEDEC 51-7, 51-12. See the Applications Information section for information on improving the thermal resistance and for actual temperature measurements of a demo board in typical operating conditions. 4 This IC includes overtemperature protection intended to protect the device during overload conditions. Junction temperature exceeds 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature reduces lifetime.
Figure 3. Pin Diagram Table 3. Pin Descriptions
1 BIAS
supply is available, tie to GND.
2 INTVCC
1μF low ESR ceramic capacitor placed close to the IC.
3 BST This pin is used to provide a drive voltage, higher than the input voltage, to the topside
power switch. Place a 0.1μF boost capacitor as close as possible to the IC.
4 VIN1
analog.com Rev 0 8 of 35 to VIN1 and VIN2, and the negative terminal connected to ground. See the Applications Information section for sample layout. 6, 7 GND1 Power Switch Ground. These pins are the return path of the internal bottom side power switch and must be tied together. Place the negative terminal of the input capacitor as close to the GND1 pins as possible. Also be sure to tie GND1 to the ground plane. See the Applications Information section for sample layout. 8, 9 SW The SW pins are the outputs of the internal power switches. Tie these pins together and connect them to the inductor and boost capacitor. This node should be kept small on the PCB for good performance and low EMI. 10, 11 GND2 Power Switch Ground. These pins are the return path of the internal bottom side power switch and must be tied together. Place the negative terminal of the input capacitor as close to the GND2 pins as possible. Also be sure to tie GND2 to the ground plane. See the Applications Information section for sample layout.
13 VIN2
The LT8641A requires two 0.1μF small input bypass capacitors. Place one 0.1μF capacitor between VIN1 and GND1. Place a second 0.1μF capacitor between VIN2 and GND2. Place these capacitors as close as possible to the LT8641A. Place a third larger capacitor of 2.2μF or more close to the LT8641A with the positive terminal connected to VIN1 and VIN2, and the negative terminal connected to ground. See the Applications Information section for sample layout.
14 EN/UV
The LT8641A is shut down when this pin is low and active when this pin is high. The hysteretic threshold voltage is 1.01V going up and 0.965V going down. Tie to VIN if the shutdown feature is not used. An external resistor divider from VIN can be used to program a VIN threshold, below which the LT8641A enters shutdown. 15 RT Tie a resistor between RT and ground to set the switching frequency.
16 TR/SS
Output Tracking and Soft-Start Pin. This pin allows user control of output voltage ramp rate during start-up. A TR/SS voltage below 0.81V forces the LT8641A to regulate the FB pin to equal the TR/SS pin voltage. When TR/SS is above 0.81V, the tracking function is disabled and the internal reference resumes control of the error amplifier. An internal 2μA pull-up current from INTVCC on this pin allows a capacitor to program output voltage slew rate. This pin is pulled to ground with an internal 200Ω MOSFET during shutdown and fault conditions; use a series resistor if driving from a low impedance output. This pin may be left floating if the tracking function is not needed.
17 SYNC/MODE
This pin programs four different operating modes: 1) Burst Mode. Tie this pin to ground for Burst Mode operation at low output loads. This results in ultralow quiescent current. 2) Pulse-skipping mode. Float this pin for pulse-skipping mode. This mode offers full frequency operation down to low output loads before pulse skipping occurs. When floating, pin leakage currents should be <1μA. See the Block Diagram for internal pull-up and pull-down resistance. 3) Spread spectrum mode. Tie this pin high to INTVCC (~3.4V) or an external supply of 3V to 4V for pulse-skipping mode with spread spectrum modulation. 4) Synchronization mode. Drive this pin with a clock source to synchronize to an external frequency. During synchronization, the part operates in pulse-skipping mode. 18 GND LT8641A Ground Pin. Connect this pin to system ground and to the ground plane.
analog.com Rev 0 9 of 35 19 PG The PG pin is the open-drain output of an internal comparator. PG remains low until the FB pin is within ±8% of the final regulation voltage, and there are no fault conditions. PG is valid when VIN is above 3V, regardless of EN/UV pin state. 20 FB The LT8641A regulates the FB pin to 0.81V. Connect the feedback resistor divider tap to this pin. Also, connect a phase lead capacitor between FB and VOUT. Typically, this capacitor is 4.7pF to 22pF. Exposed Pad Pin SW Connect and solder the exposed pads to the SW trace for good thermal performance. If necessary, due to manufacturing limitations, pins 21 and 22 may be left disconnected. However, thermal performance is degraded. Corner Pins These pins are for mechanical support only and can be tied anywhere on the PCB, typically ground.
analog.com Rev 0 17 of 35 BLOCK DIAGRAM THEORY OF OPERATION The LT8641A is a monolithic, constant frequency, current mode step -down DC/DC converter. An oscillator, with frequency set using a resistor on the RT pin, turns on the internal top power switch at the beginning of each clock cycle. Current in the inductor then increases until the top switch current comparator trips and turns off the top power switch. The peak inductor current at which the top switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by com paring the voltage on the VFB pin with an internal 0.81V reference. When the load current increases, it causes a reduction in the feedback voltage relative to the reference leading the error amplifier to raise the VC voltage until the average inductor curr ent matches the new load current. When the top power switch turns off, the synchronous power switch turns on until the next clock cycle begins or inductor current falls to zero. If overload conditions result in more than 5.8A flowing through the bottom switch, the next clock cycle is delayed until switch current returns to a safe level. If the EN/UV pin is low, the LT8641A is shut down and draws 0.75μA from the input. When the EN/UV pin is above 1.01V, the switching regulator becomes active. To optimize efficiency at light loads, the LT8641A operates in Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the input supply current to 1.7μA. In a typical application, 2.5μA is consumed from the input supply when regulating with no load. The SYNC/MODE pin is tied low to use Burst Mode operation and can be floated to use pulse-skipping mode. If a clock is applied to the SYNC/MODE pin, the part synchronizes to an external clock frequency and operates in pulse-skipping mode. While in pulse-skipping mode, the oscillator operates continuously, and positive SW transitions are aligned to the clock. During light loads, switch pulses are skipped to regulate the output and the qui escent current becomes SLOPE COMP INTERNAL 0.8V REF OSCILLATOR 200kHz TO 3MHz BURST DETECT 3.4V REG 60kΩ 600kΩ CBST COUT VOUT SW L BST 8, 9, 21, 22 SWITCH LOGIC AND ANTI- SHOOT THROUGH ERROR AMP SHDN ±8% VC INTVCC SHDN THERMAL SHDN INTVCC UVLO VIN UVLO SHDN THERMAL SHDN VIN UVLO EN/UV 1V + –14 GND INTVCC BIAS VIN2 GND1 6, 7 GND2 10, 11 PG FB R1C1 OPT OPT RT CSS OPT VOUT TR/SS 1.9µA RT SYNC/MODE VIN1 VIN CIN1CIN3 CVCC CIN2 047
analog.com Rev 0 18 of 35 several hundred μA. The SYNC/MODE pin may be tied high for pulse -skipping mode with spread spectrum modulation. To improve EMI, the LT8641A can operate in spread spec trum mode. This feature varies the clock with a triangu lar frequency modulation of approximately +20%. For example, if the LT8641A’s frequency is programmed to switch at 2MHz, spread spectrum mode modulates the oscillator between 2MHz and 2.4MHz. To improve efficiency across all loads, source the supply current to internal circuitry from the BIAS pin when biased at 3.1V or above. Else, the internal circuitry draws current from VIN. Connect the BIAS pin to VOUT if the LT8641A output is programmed at 3.3V to 25V. Comparators monitoring the FB pin voltage pull the PG pin low if the output voltage varies more than ±8% (typical) from the set point, or if a fault condition is present. The oscillator reduces the LT8641A’s operating frequency when the voltage at the FB pin is low. This frequency foldback helps to control the inductor current when the output voltage is lower than the programmed value that occurs during start-up or overcurrent conditions. When a clock is applied to the SYNC/MODE pin, the SYNC/MODE pin is floated, or held DC high, the frequency foldback is disabled, and the switching frequency slows down only during overcurrent conditions.
high frequencies. For optimal performance, the LT8641A requires the use of multiple VIN bypass capacitors. capacitor to VIN2/ GND2. Place a third capacitor with a larger value, 2.2μF or higher, near VIN1 or VIN2. Figure 46. Recommended PCB Layout for the LT8641A
analog.com Rev 0 20 of 35 to the surface layer. The SW and BOOST nodes should be as small as possible. Finally, keep the FB and RT nodes small so that the ground traces shield them from the SW and BOOST nodes. Solder the expose d pad on the bottom of the package to SW to reduce thermal resistance to ambient. To keep thermal resistance low, extend the ground plane from GND1 and GND2 as much as possible, and add thermal vias to additional ground planes within the circuit board and on the bottom side. Achieving Ultralow Quiescent Current To enhance efficiency at light loads, the LT8641A oper ates in low ripple Burst Mode operation, which keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and minimizing output voltage ripple. In Burst Mode operation, the LT8641A delivers single small pulses of current to the out put capacitor followed by sleep periods where the output power is supplied by the output capacitor. While in sleep mode, the LT8641A consumes 1.7μA. As the output load decreases, the frequency of single current pulses decreases (see Figure 47 ) and the percentage of time the LT8641A is in sleep mode increases, resulting in much higher light load efficiency than for typical converters. By maximizing the time between pulses, the converter quiescent current approaches 2.5μA for a typical application when there is no output load. Therefore, to optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. To achieve higher light load efficiency, more energy m ust be delivered to the output during the single small pulses in Burst Mode operation such that the LT8641A can stay in sleep mode longer between each pulse. This can be achieved using a larger value inductor (i.e., 4.7μH), and should be considered indepen dent of switching frequency when choosing an inductor. For example, while a lower inductor value is typically used for a high switching frequency application, if high light load efficiency is desired, choose a higher inductor value. See the curve in Typical Performance Characteristics. While in Burst Mode operation, the current limit of the top switch is approximately 950mA (see Figure 48), resulting in low output voltage ripple. Increasing the output capacitance decreases output ripple proportionally. As load ramps upward from zero, the switching frequency increases, but only up to the switching frequency programmed by the resistor at the RT pin, as shown in Figure 47. The output load at which the LT8641A reach es the programmed frequency varies based on input voltage, output voltage, and inductor choice. (47a) FRONT PAGE APPLICATION VIN = 12V VOUT = 5V LOAD CURRENT (mA) 0 200 400 600 800 200 400 600 800 1000 1200SWITCHING FREQUENCY (kHz) 049
For low input quiescent current and good light -load efficiency, use large resistor values for the FB resistor divider. which is approximately given by Equation 2. function of VIN; this is plotted in the section. When using large FB resistors, connect a 4.7pF to 22pF phase-lead capacitor from VOUT to FB. where RT is in kΩ and fSW is the desired switching frequency in MHz. Table 4. SW Frequency vs RT Value
analog.com Rev 0 23 of 35 Operating Frequency Selection and Trade -Offs Selection of the operating frequency is a trade-off between efficiency, component size, and input voltage range. The advantage of high frequency operation is that smaller induc tor and capacitor values may be used. The disadvantages are lower efficiency and a smaller input voltage range. Calculate the highest switching frequency (fSW(MAX)) for a given application as follows: fSW(MAX) = VOUT + VSW(BOT) tON(MIN) (VIN − VSW(TOP) + VSW(BOT) (4) where VIN is the typical input voltage, V OUT is the output voltage, V SW(TOP) and VSW(BOT) are the internal switch drops (~0.4V, ~0.2V, respectively at maximum load), and tON(MIN) is the minimum top switch on-time (see the Specifications). This equation shows that a slower switching frequency is necessary to accommodate a high VIN/VOUT ratio. For transient operation, VIN may go as high as the absolute maximum rating of 65V regardless of the RT value, however the LT8641A reduces switching frequency as necessary to maintain control of inductor current to as sure safe operation. The LT8641A is capable of a maximum duty cycle of approximately 99%, and the VIN-to-VOUT dropout is limited by the RDS(ON) of the top switch. In this mode, the LT8641A skips switch cycles, resulting in a lower switching frequency than programmed by RT. For applications that cannot allow deviation from the pro grammed switching frequency at low V IN/VOUT ratios, use the following formula to set switching frequency: VIN(MIN) = VOUT + VSW(BOT) 1− fSW × tOFF(MIN) − VSW(BOT) + VSW(TOP) (5) where VIN(MIN) is the minimum input voltage without skipped cycles, VOUT is the output voltage, VSW(TOP) and VSW(BOT) are the internal switch drops (~0.4V, ~0.2V, respectively at maximum load), fSW is the switching frequency (set by RT), and tOFF(MIN) is the minimum switch off-time. Note that higher switching frequency increases the minimum input voltage, below which cycles are dropped to achieve higher duty cycle. Inductor Selection and Maximum Output Current The LT8641A is designed to minimize solution size by allowing the inductor to be chosen based on the output load requirements of the application. During overload or short-circuit conditions, the LT8641A safely tolerates operation with a saturated inductor due to the use of a high-speed peak-current mode architecture. A good first choice for the inductor value is: L = VOUT + VSW(BOT) fSW (6) where fSW is the switching frequency in MHz, V OUT is the output voltage, V SW(BOT) is the bottom switch drop (~0.15V), and L is the inductor value in μH. To avoid overheating and poor efficiency, choose an inductor with an RMS current rating greater than the maximum expected output load of the application. In addition, the saturation current (typically labeled I SAT) rating of the inductor must be higher than the load current plus 1/2 of the inductor ripple current: IL(PEAK) = ILOAD(MAX) + 2 ΔIL (7)
analog.com Rev 0 24 of 35 where ΔIL is the inductor ripple current as calculated in Equation 9 and I LOAD(MAX) is the maximum output load for a given application. As a quick example, an application requiring 2A output should use an inductor with an RMS rating of greater than 2A and an I SAT of greater than 3A. During long duration overload or short -circuit conditions, the inductor RMS rating requirement is greater to avoid overheating of the inductor. To keep the efficiency high, the series resistance (DCR) should be less than 0.04Ω, and the core material should be intended for high frequency applications. The LT8641A limits the peak switch current to p rotect the switches and the system from overload faults. The top switch current limit (ILIM) is 8.2A at low duty cycles and decreases linearly to 6.4A at DC = 0.8. The inductor value must then be sufficient to supply the desired maximum output current (IOUT(MAX)), which is a function of the switch current limit (ILIM) and the ripple current. IOUT(MAX) = ILIM − △IL 2 (8) Calculate the peak-to-peak ripple current in the inductor as follows: △ IL = VOUT L × fSW × (1 − VOUT VIN(MAX) ) (9) where f SW is the switching frequency of the LT8641A, and L is the value of the inductor. Therefore, the maximum output current that the LT8641A delivers depends on the switch current limit, inductor value, and input and output voltages. The inductor val ue may have to be increased if the inductor ripple current does not allow sufficient maximum output current (IOUT(MAX)), given the switching frequency, and maximum input voltage used in the desired application. To achieve higher light load efficiency, mor e energy must be delivered to the output during the single small pulses in Burst Mode operation such that the LT8641A can stay in sleep mode longer between each pulse. This can be achieved using a larger value inductor (i.e., 4.7μH), and should be consider ed independent of switching frequency when choosing an inductor. For example, while a lower inductor value is typically used for a high switching frequency application, if high light load efficiency is desired, choose a higher inductor value. See the curv e in Typical Performance Characteristics. The optimum inductor for a given application may differ from the one indicated by this design guide. A larger value inductor provides a higher maximum load current and reduces the output voltage ripple. For applications requiring smaller load currents, the value of the inductor may be lower and the LT8641A may operate with higher ripple current. This allows use of a ph ysically smaller inductor, or one with a lower DCR, resulting in higher efficiency. Be aware that low inductance may result in discontinuous mode operation, which further reduces maximum load current. For more information about maximum output current and discontinuous operation, see Application Note 44. For duty cycles greater than 50% (VOUT/VIN > 0.5), a minimum inductance is required to avoid subharmonic oscillation (see Equation 10). See Application Note 19 for more details. LMIN = VIN × (2 × DC– 1) 2.5 × fSW (10) where DC is the duty cycle ratio (VOUT/VIN) and fSW is the switching frequency.
analog.com Rev 0 25 of 35 Input Capacitors The VIN of the LT8641A should be bypassed with at least three ceramic capacitors for best performance. Place two small ceramic capacitors of 0.1μF close to the part; one at the VIN1/GND1 pins and a second at VIN2/GND2 pins. These capacitors should be 0402 or 0603 in size. For automotive applications requiring two series input capaci tors, place two small 0402 or 0603 at each side of the LT8641A near the VIN1/GND1 and VIN2/GND2 pins. Place a third, larger ceramic capacitor of 2.2μF or larger close to V IN1 or VIN2. See the Low EMI PCB Layout section for more details. X7R or X5R capacitors are rec ommended for best performance across temperature and input voltage variations. Note that larger input capacitance is required when a l ower switching frequency is used. If the input power source has high impedance, or there is significant inductance due to long wires or cables, additional bulk capacitance may be necessary. This can be provided with a low performance electrolytic capacitor. A ceramic input capacitor combined with trace or cable inductance forms a high quality (under damped) tank circuit. If the LT8641A circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8641A’s voltage rating. This situation is easily avoided (see Application Note 88). Output Capacitor and Output Ripple The output capacitor has two essential functions. Along with the inductor, it filters the square wave generated by the LT8641A to produce the DC output. In this role, it determines the output ripple, thus low impedance at the switching frequency is important. The second function is to store energy to satisfy transient loads and stabilize the LT8641A’s control loop. Ceramic capacitors have very low equivalent series resistance (ESR) and provide the best ripple performance. For good starting values, see the Typical Applications Circuits section. Use X5R or X7R types for low output ripple and good transient response. Transient performance can be improved with a higher value output capacitor and the addition o f a feedforward capacitor placed between V OUT and FB. Increasing the output capacitance also decreases the output voltage ripple. A lower value of output capacitor can be used to save space and cost, but transient performance suffers and may cause loop ins tability. See the Typical Applications Circuits section for suggested capacitor values. When choosing a capacitor, pay special attention to the data sheet to calculate the effective capacitance under the relevant operating conditions of voltage bias and temperature. A physically larger capacitor or one with a higher voltage rating may be required. Ceramic Capacitors Ceramic capacitors are small, robust, and have very low ESR. However, ceramic capacitors can cause problems when used with the LT8641A due to their piezoelectric nature. When in Burst Mode operation, the LT8641A’s switching frequency depends on the load current, and at very light loads, the LT8641A can excite the ceramic capacitor at audio frequencies, generating audible noise. Since the LT8641A operates at a lower current limit during Burst Mode op - eration, the noise is typically very quiet to a casual ear. If this is unacceptable, use a high performance t antalum or electrolytic capacitor at the output. Low noise ceramic capacitors are also available. A final precaution regarding ceramic capacitors concerns the maximum input voltage rating of the LT8641A. As previously mentioned, a ceramic input capacitor combined with trace or cable inductance forms a high quality (un- derdamped) tank circuit. If the LT8641A circuit is plugged into a live supply, the input voltage can ring to twice its nominal value, possibly exceeding the LT8641A’s rating. This situation is easily avoided (see Application Note 88).
analog.com Rev 0 26 of 35 Enable Pin The LT8641A is in shutdown when the EN pin is low and active when the pin is high. The rising threshold of the EN comparator is 1.01V, with 45mV of hysteresis. The EN pin can be tied to VIN if the shutdown feature is not used, or tied to a logic level if shutdown control is required. Adding a resistor divider from VIN to EN programs the LT8641A to regulate the output only when VIN is above a desired voltage (see the Block Diagram). Typically, this threshold, VIN(EN), is used in situations where the input supply is current limited, or has a relatively high source resistance. A switching regulator draws constant power from the source. So, source current increases as source voltage drops. This looks like a negative resistance load to the source and can cause the source to current limit or latch low under low source voltage conditions. The VIN(EN) threshold prevents the regulator from operating at source voltages where the problems might occur. Adjust this threshold by setting the values R3 and R4 such that they satisfy the following equation: VIN(EN) = ( where the LT8641A remains off until VIN is above VIN(EN). Due to the comparator’s hysteresis, switching does not stop until the input falls slightly below VIN(EN). When operating in Burst Mode operation for light load currents, the current through the V IN(EN) resistor network can easily be greater than the supply current consumed by the LT8641A. Therefore, the VIN(EN) resistors should be large to minimize their effect on efficiency at low loads. INTVCC Regulator An internal low dropout (LDO) regulator produces the 3.4V supply from V IN that powers the drivers and the internal bias circuitry. The INTVCC can supply enough current for the LT8641A’s circuitry and must be bypassed to ground with a minimum of 1μF ceramic capacitor. Good bypassing is necessary to supply the high transient currents required by the power MOSFET gate drivers. To improve efficienc y, the internal LDO can also draw current from the BIAS pin when the BIAS pin is at 3.1V or higher. Typically, the BIAS pin can be tied to the output of the LT8641A or to an external supply of 3.3V or above. If BIAS is connected to a supply other than V OUT, be sure to bypass with a local ceramic capacitor. If the BIAS pin is below 3.0V, the internal LDO consumes current from V IN. Applications with high input voltage and high switching frequency, where the internal LDO pulls current from V IN, increase die te mperature because of the higher power dissipation across the LDO. Do not connect an external load to the INTVCC pin. Output Voltage Tracking and Soft-Start The LT8641A allows the user to program its output voltage ramp rate with the TR/SS pin. An internal 2μA pulls up the TR/SS pin to INTVCC. Putting an external capacitor on TR/SS enables soft starting the output to prevent current surge on the input supply. During the soft-start ramp, the output voltage proportionally tracks the TR/SS pin voltage. For output tracking applications, TR/SS can be externally driven by another voltage source. From 0V to 0.81V, the TR/SS voltage overrides the internal 0.81V reference input to the error amplifier, thus regulating the FB pin voltage to that of the TR/SS pin. When TR/SS is above 0.81V, tracking is disabled, and the feedback voltage regulates to the internal reference voltage. The TR/SS pin may be left floating if the function is not needed. An active pull-down circuit is connected to the TR/SS pin, which discha rges the external soft -start capacitor in the case of fault conditions and restarts the ramp when the faults are cleared. Fault conditions that clear the soft -start capacitor are the EN/UV pin transitioning low, VIN voltage falling too low, or thermal shutdown.
analog.com Rev 0 27 of 35 Output Power Good When the LT8641A’s output voltage is within the ±8% window of the regulation point, the output voltage is considered good and the open -drain PG pin goes high impedance and is typically pulled high with an external resistor. Otherwise, the internal pull-down device pulls the PG pin low. To prevent glitching both the upper and lower thresholds, include 0.4% of hysteresis. The PG pin is also actively pulled low during several fault conditions: EN/UV pin is below 1V, INTVCC has fallen too low, VIN is too low, or thermal shutdown. Synchronization and Spread Spectrum To select low ripple Burst Mode operation, tie the SYNC pin below 0.4V (this can be ground or a logic low output). To synchronize the LT8641A oscillator to an external frequency, connect a square wave (with 20% to 80% duty cycle) to the SYNC pin. The square wave amplitude should have valleys below 0.4V and peaks above 1.5V (up to 6V). The LT8641A does not enter Burst Mode operation at low output loads while synchronized to an external clock, but instead pulse skips to maintain regulation. The LT8641A may be synchronized over a 200kHz to 3MHz range. Choose the R T resistor to set the LT8641A switching frequency equal to or below the lowest synchronization input. For example, if the synchronization signal is 500kHz and higher, select the RT for 500kHz. The slope compensation is set by the RT value, while the minimum slope compensation required to avoid subharmonic oscillations is established by the inductor size, input volt age, and output voltage. Since the synchronization frequency does not change the slopes of the inductor current waveform, if the inductor is large enough to avoid subharmonic oscillations at the frequency set by RT, then the slope compensation is sufficient for all synchronization frequencies. For some applications, it is desirable for the LT8641A to operate in pulse -skipping mode, offering two major differences from Burst Mode operation. First is the clock stays awake at all times and all switching cycles are aligned to the clock. Second is that full switching frequency is reached at lower output load than in Burst Mode operation. These two differences come at the expense of increased quiescent current. To enable pulse-skipping mode, the SYNC pin is floated. Leakage current on this pin should be <1μA. See the Block Diagram for internal pull-up and pull-down resistance. The LT8641A features spread spectrum operation to further reduce EMI emissions. To enable spread spectrum operation, tie the SYNC/MODE pin high either to INTV CC (~3.4V) or an external supply of 3V to 4V. In this mode, triangular frequency modulation is used to vary the switching frequency between the valu e programmed by RT to approximately 20% higher than that value. The modulation frequency is approximately 3kHz. For example, when the LT8641A is programmed to 2MHz, the frequency varies from 2MHz to 2.4MHz at a 3kHz rate. When spread spectrum operation is selected, Burst Mode operation is disabled, and the part runs in pulse-skipping mode. The LT8641A does not operate in forced continuous mode regardless of SYNC signal. Shorted and Reversed Input Protection The LT8641A tolerates a shorted output. Severa l features are used for protection during output short -circuit and brownout conditions. The first is the switching frequency is folded back while the output is lower than the set point to maintain inductor current control. Second, the bottom switch current is monitored such that if inductor current is beyond safe levels, switching of the top switch is delayed until such time as the inductor current falls to safe levels. Frequency foldback behavior depends on the state of the SYNC pin: if the SYNC pin is lo w the switching frequency slows while the output voltage is lower than the pro grammed level. If the SYNC pin is connected to a clock source, floated, or tied high, the LT8641A stays at the programmed frequency without foldback and only slow switching if the inductor current exceeds safe levels.
can be managed by reducing VIN, switching frequency, or load. temperature rise changes with the duty cycle of a 1kHz pulsed 5A load. Figure 51. Case Temperature Rise vs 5A Pulsed Load
Figure 58. 2MHz 1.8V, 3.5A Step-Down Converter
Figure 59. Package Drawing
- DRAWING IS NOT A JEDEC PACKAGE OUTLINE
- ALL DIMENSIONS ARE IN MILLIMETERS
- DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
- SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
0.05 REF
0.50 BSC
0.200 REF
0.203 REF
0.10 REF
2.43 REF
1.50 REF
0.375 BSC
Table 5. Ordering Guide by a label on the shipping container. for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. Table 6. Related Parts
ALL INFORMATION CONTAINED HEREIN IS PROVIDED “AS IS” WITHOUT REPRESENTATION OR WARRANTY. NO RESPONSIBILITY IS ASSUMED BY ANALOG DEVICES FOR ITS USE, NOR FOR ANY INFRINGEMENTS OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES THAT MAY RESULT FROM ITS USE. SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. NO LICENCE, EITHER EXPRESSED OR IMPLIED, IS GRANTED UNDER ANY ADI PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR ANY OTHER ADI INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS WHICH ADI PRODUCTS OR SERVICES ARE USED. TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. analog.com Rev 0 35 of 35