LT8580

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Rev. CFor more information www.analog.com Document Feedback TYPICAL APPLICATION FEATURES DESCRIPTION Low IQ Boost/SEPIC/Flyback/Inverting Converter with 0.5A, 140V Switch The LT®8331 is a current mode DC/DC converter with a 140V, 0.5A switch operating from a 4.5V to 100V input. With a unique single feedback pin architecture, it is capa- ble of boost, SEPIC, flyback or inverting configurations. Burst Mode operation consumes as low as 6μA quiescent current to maintain high efficiency at very low output cur- rents, while keeping typical output ripple below 20mV. The internally-compensated current mode architecture results in stable operation over a wide range of input and output voltages and programmable switching frequencies between 100kHz to 500kHz. A SYNC/MODE pin allows synchronization to an external clock. It can also be used to select between burst or pulse-skipping modes of opera- tion. For increased efficiency, a BIAS pin can accept a second input to supply the INTV CC regulator . Additional features include frequency foldback and programmable soft-start for controlling inductor current during start-up. The LT8331 is available in a thermally-enhanced MSOP package with four pins removed for high voltage spacings. 48V Output SEPIC Converter

APPLICATIONS

n Wide Input Voltage Range: 4.5V to 100V n Ultralow Quiescent Current and Low Ripple Burst Mode® Operation: IQ = 6µA n 0.5A, 140V Power Switch n Positive or Negative Output Voltage Programming with a Single Feedback Pin n Programmable Frequency (100kHz to 500kHz) n Synchronizable to an External Clock n BIAS Pin for Higher Efficiency n Programmable Undervoltage Lockout (UVLO) n Thermally-Enhanced High Voltage MSOP Package n AEC-Q100 Qualified for Automotive Applications n Industrial and Automotive n Telecom n Medical Diagnostic Equipment n Portable Electronics Efficiency and Power Loss

8331 TA01a

34.8k 2.2µF 59k 0.1µF 63.4k 1µF VOUT = 48V IN SW1-2 EN/UVLO L T8331 VIN 36V TO 72V 220/uni03BCH 220/uni03BCH 150mA AT VIN = 36V 165mA AT VIN = 48V 190mA AT VIN = 72V SYNC/MODE GND FBX BIAS SS V OUT 450kHz 4.7µF 1µF V RT INTVCC EFFICIENCY POWER LOSS V IN = 36V V IN = 48V V IN = 72V LOAD CURRENT (mA) 100 150 200 100 0.5 1.0 1.5 2.0 EFFICIENCY (%) POWER LOSS (W)

8331 TA01b

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Rev. C For more information www.analog.com Operating Junction Temperature (Note 3) ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8331EMSE#PBF LT8331EMSE#TRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8331IMSE#PBF LT8331IMSE#TRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C AUTOMOTIVE PRODUCTS** LT8331EMSE#WPBF LT8331EMSE#WTRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8331IMSE#WPBF LT8331IMSE#WTRPBF 8331 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. EN/UVLO VIN INTVCC NC BIAS NC SW1 SW2 SYNC/MODE SS RT FBX TOP VIEW PGND, GND MSE PACKAGE VARIATION: MSE16 (12) 16-LEAD PLASTIC MSOP θJA = 45°C/W , θJC = 10°C/W EXPOSED PAD (PIN 17) IS PGND AND GND, MUST BE SOLDERED TO PCB PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS (Note 1) PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Operating Voltage Range l 4.5 100 V VIN Quiescent Current at Shutdown VEN/UVLO = 0.2V l μA μA VEN/UVLO = 1.5V l 2.0 3.6 9.5 μA μA VIN Quiescent Current Sleep Mode (Not Switching) SYNC = 0V l 5.5 8.5 μA μA Active Mode (Not Switching) SYNC = 0V, BIAS = 0V l 780 840 1420 1720 µA µA SYNC = 0V, BIAS = 5V l µA µA SYNC = INTVCC, BIAS = 0V l 700 800 1080 1170 µA µA SYNC = INTVCC, BIAS = 5V l µA µA ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.

Rev. CFor more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: INTVCC cannot be externally driven. No external loading is allowed on this pin. Note 3: The LT8331E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8331I is guaranteed over the full –40°C to 125°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: The IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. PARAMETER CONDITIONS MIN TYP MAX UNITS BIAS Threshold Rising, BIAS Can Supply INTVCC Falling, BIAS Cannot Supply INTVCC l l 4.10 3.725 4.4 4.65 4.275 V V VIN Falling Threshold to Supply INTVCC BIAS = 12V BIAS – 1.6V V BIAS Falling Threshold to Supply INTVCC VIN = 12V VIN – 0.4V V FBX Regulation FBX Regulation Voltage FBX > 0V FBX < 0V l l 1.568 –0.820 1.6 –0.80 1.632 –0.780 V V FBX Line Regulation FBX > 0V, 4.5V < VIN < 100V FBX < 0V, 4.5V < VIN < 100V 0.005 0.005 0.015 0.015 %/V %/V FBX Pin Current FBX = 1.6V, –0.8V l –10 10 nA Oscillator Switching Frequency (fOSC) RT = 301k RT = 100k RT = 56.2k l l l 279 465 100 300 500 107 321 535 kHz kHz kHz Minimum On-Time SYNC = 0V SYNC = INTVCC 165 160 290 290 ns ns Minimum Off-Time 146 230 ns SYNC/Mode, Mode Thresholds Rising to Select Pulse Skipping Mode Falling to Select Burst Mode Operation l l 0.6 2.4 V V SYNC/Mode, Clock Thresholds Rising Falling 0.6 2.0 1.1 2.4 V V fSYNC/fOSC Allowed Ratio RT = 100k 0.95 1 1.25 kHz SYNC Pin Current SYNC = 2V –40 40 nA Switch Maximum Switch Current Limit Threshold l 0.5 0.6 0.7 A Switch Overcurrent Threshold Discharges SS Pin 1.15 A Switch RDS(ON) ISW = 0.25A 1.7 Ω Switch Leakage Current VSW = 140V 0.1 1 µA EN/UVLO Logic EN/UVLO Pin Threshold (Rising) Start Switching l 1.576 1.74 1.90 V EN/UVLO Pin Threshold (Falling) Stop Switching l 1.556 1.6 1.644 V EN/UVLO Pin Current VEN/UVLO = 1.6V l –40 40 nA Soft-Start Soft-Start Charge Current SS = 1V 2 µA Soft-Start Pull-Down Resistance Fault Condition, SS = 0.1V 250 Ω

Rev. C For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Frequency vs Temperature Switching Frequency vs VIN Normalized Switching Frequency vs FBX Voltage Switch Current Limit vs Duty Cycle Switch Minimum On-Time vs Temperature Switch Minimum Off-Time vs Temperature FBX Positive Regulation Voltage vs Temperature FBX Negative Regulation Voltage vs Temperature EN/UVLO Pin Thresholds vs Temperature V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.570 1.580 1.590 1.600 1.610 1.620 1.630 FBX VOL TAGE (V)

8331 G01

V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 –0.815 –0.810 –0.805 –0.800 –0.795 –0.790 –0.785 FBX VOL TAGE (V)

8331 G02

V IN = 12V EN/UVLO RISING (TURN-ON) EN/UVLO FALLING (TURN-OFF) JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.54 1.57 1.60 1.63 1.66 1.69 1.72 1.75 1.78 1.81 1.84 EN/UVLO PIN VOL TAGE (V)

8331 G03

V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 475 480 485 490 495 500 505 510 515 520 525 SWITCHING FREQUENCY (kHz)

8331 G04

V IN (V) 100 475 480 485 490 495 500 505 510 515 520 525 SWITCHING FREQUENCY (kHz)

8331 G05

V IN = 12V FBX VOL TAGE (V) –0.8 –0.4 0.0 0.4 0.8 1.2 1.6 100 125 NORMALIZED SWITCHING FREQUENCY (%)

8331 G06

V IN = 12V DUTY CYCLE (%) 100 0.50 0.55 0.60 0.65 0.70 SWITCH CURRENT LIMIT (A)

8331 G07

SYNC = 0V SYNC = INTV CC JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 130 140 150 160 170 180 190 200 MINIMUM ON–TIME (ns)

8331 G08

JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 110 120 130 140 150 160 170 180 MINIMUM OFF–TIME (ns)

8331 G09

Rev. CFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Waveforms (in CCM) Switching Waveforms (in DCM/Light Burst Mode) Switching Waveforms (in Deep Burst Mode) Burst Frequency vs Load Current VIN Pin Current (Sleep Mode, Not Switching) vs Temperature VIN Pin Current (Active Mode, Not Switching) vs Temperature VIN Pin Current (Active Mode, Not Switching) vs Temperature V IN = 12V VSYNC/MODE = 0V VBIAS = 0V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.25 2.50 3.75 5.00 6.25 7.50 8.75 10.00 V IN PIN CURRENT (/uni03BCA)

8331 G10

JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 600 650 700 750 800 850 900 950 1000 V IN PIN CURRENT (/uni03BCA)

8331 G11

V IN = 12V V SYNC/MODE = 0V V BIAS = 0V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 V IN PIN CURRENT (/uni03BCA)

8331 G12

V IN = 12V V SYNC/MODE = 0V V BIAS = 5V VOUT T ransient Response: Load Current T ransients from 82.5mA to 165mA to 82.5mA VOUT T ransient Response: Load Current T ransients from 5mA to 165mA to 5mA 2µs/DIV V SW 50V/DIV I 200mA/DIV

8331 G13

V IN = 48V , V OUT = 48V , ILOAD = 165mA 2µs/DIV V SW 50V/DIV I 200mA/DIV

8331 G14

V IN = 48V , V OUT = 48V , ILOAD = 15mA 5µs/DIV V SW 50V/DIV I 200mA/DIV

8331 G15

V IN = 48V , V OUT = 48V , ILOAD = 3mA FRONT PAGE APPLICATION V IN = 48V , V OUT = 48V LOAD CURRENT (mA) 100 150 300 450 600 SWITCHING FREQUENCY (kHz)

8331 G16

V IN = 48V , V OUT = 48V 200µs/DIV V OUT 500mV/DIV I LOAD 100mA/DIV

8331 G17

V IN = 48V , V OUT = 48V 500µs/DIV V OUT 1V/DIV I LOAD 100mA/DIV

8331 G18

Rev. C For more information www.analog.com PIN FUNCTIONS EN/UVLO (Pin 1): Shutdown and Undervoltage Detect Pin. The LT8331 is shut down when this pin is low and active when this pin is high. Below an accurate 1.6V threshold, the part enters undervoltage lockout and stops switching. This allows an undervoltage lockout (UVLO) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin. A 140mV pin hysteresis ensures part switching resumes when the pin exceeds 1.74V. EN/UVLO pin voltage below 0.2V reduces V IN current below 1µA. If shutdown and UVLO features are not required, the pin can be tied directly to system input. VIN (Pin 3): Input Supply. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the V IN pin, and the negative terminal as close as possible to the exposed pad PGND copper (near Pin 1). INTVCC (Pin 5): Regulated 3.2V Supply for Internal Loads. The INTVCC pin must be bypassed with a minimum 1µF low ESR ceramic capacitor to GND. No additional com - ponents or loading is allowed on this pin. INTV CC draws power from the BIAS pin if 4.4V ≤ BIAS ≤ VIN – 0.4V, otherwise INTVCC is powered by the VIN pin. NC (Pins 6, 8): No Internal Connection. Leave these pins open. BIAS (Pin 7): Second Input Supply for Powering INTVCC. Removes the majority of INTVCC current from the VIN pin to improve efficiency when 4.4V ≤ BIAS ≤ V IN – 0.4V. If unused, tie the pin to GND copper . FBX (Pin 9): Voltage Regulation Feedback Pin for Positive or Negative Outputs. Connect this pin to a resistor divider between the output and the exposed pad GND copper (near Pin 9). FBX reduces the switching frequency during start-up and fault conditions when FBX is close to 0V. RT (Pin 10): A resistor from this pin to the exposed pad GND copper (near Pin 9) programs switching frequency. SS (Pin 11): Soft-Start Pin. Connect a capacitor from this pin to GND copper (near Pin 9) to control the ramp rate of inductor current during converter start-up. SS pin charg- ing current is 2μA. An internal 250Ω MOSFET discharges this pin during shutdown or fault conditions. SYNC/MODE (Pin 12): This pin allows three selectable modes for optimization of performance. 1. GND: For Burst Mode operation (low IQ and low output voltage ripple at light loads). 2. External Clock : For synchronized switching frequency. 3. INTVCC: For pulse-skipping mode (at light load or low duty cycle). SW1, SW2 (Pins 14, 16): Outputs of the Internal Power Switch. Minimize the metal trace area connected to these pins to reduce EMI. PGND,GND (Pin 17): Power Ground and Signal Ground for the IC. The package has an exposed pad (Pin 17) underneath the IC which is the best path for heat out of the package. Pin 17 should be soldered to a continuous copper ground plane under the device to reduce die tem- perature and increase the power capability of the LT8331. Connect power ground components to the exposed pad copper exiting near Pins 1, 14 and 16. Connect signal ground components to the exposed pad copper exiting near Pins 8 and 9.

Rev. CFor more information www.analog.com BLOCK DIAGRAM 8331 BD VC OPT VBIAS + 0.4V(+) VBIAS – 1.6V(–) 4.4V(+) 4.0V(–) 3.2V REGULATOR SW1 OSCILLATOR ERROR AMP SELECT FREQUENCY FOLDBACK INTVCC UVLO SWITCH LOGIC BURST DETECT SLOPE DRIVER INTVCC TJ > 170°C 1.74V(+) 1.6V(–) INTERNAL REFERENCE UVLO CIN SW2 BIAS OPT VIN COUT CVCC D1L1 VOUT UVLO RT SYNC/MODE OVER- CURRENT OVERCURRENT PGND/GND ERROR AMP ERROR AMP SLOPE 1.6VFBX VOUT –0.8V MAX ILIMIT 1.9× MAX ILIMIT RSENSE PWM COMPARATOR ISS 2/uni03BCA SS CSS EN/UVLO VIN UVLO

Rev. C For more information www.analog.com OPERATION The LT8331 uses a fixed frequency, current mode con - trol scheme to provide excellent line and load regula - tion. Operation can be best understood by referring to the Block Diagram. An oscillator (with frequency pro - grammed by a resistor at the RT pin) turns on the inter - nal power switch at the beginning of each clock cycle. Current in the inductor then increases until the current comparator trips and turns off the power switch. The peak inductor current at which the switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the FBX pin with an internal reference voltage (1.60V or – 0.80V, depending on the chosen topology). When the load current increases it causes a reduction in the FBX pin voltage relative to the internal reference. This causes the error amplifier to increase the VC voltage until the new load current is satisfied. In this manner , the error amplifier sets the correct peak switch current level to keep the output in regulation. The LT8331 is capable of generating either a positive or negative output voltage with a single FBX pin. It can be configured as a boost, SEPIC or flyback converter to gen- erate a positive output voltage, or as an inverting converter to generate a negative output voltage. When configured as a SEPIC converter , as shown in the Block Diagram, the FBX pin is pulled up to the internal bias voltage of 1.60V by a voltage divider (R1 and R2) connected from V OUT to GND. Amplifier A2 becomes inactive and amplifier A1 performs (inverting) amplification from FBX to VC. When the LT8331 is in an inverting configuration, the FBX pin is pulled down to –0.80V by a voltage divider from VOUT to GND. Amplifier A1 becomes inactive and amplifier A2 performs (non-inverting) amplification from FBX to VC. If the EN/UVLO pin voltage is below 1.6V, the LT8331 enters undervoltage lockout (UVLO), and stops switch - ing. When the EN/UVLO pin voltage is above 1.74V (typi- cal), the LT8331 resumes switching. If the EN/UVLO pin voltage is below 0.2V, the LT8331 draws less than 1µA from VIN. For the SYNC/MODE pin tied to ground, the LT8331 pro- vides low output ripple Burst Mode operation with ultra low quiescent current at light loads. For the SYNC/MODE pin tied to INTVCC, the LT8331 uses pulse-skipping mode, at the expense of hundreds of microamps, to maintain output voltage regulation at light loads by skipping switch pulses. For the SYNC/MODE pin driven by an external clock, the converter switching frequency is synchronized to that clock and pulse-skipping mode is also enabled. The LT8331 includes a BIAS pin to improve efficiency across all loads. The INTV CC supply current can be drawn from the BIAS pin instead of the V IN pin for 4.4V ≤ BIAS ≤ VIN. Protection features ensure the immediate disable of switching and reset of the SS pin for any of the following faults: internal reference UVLO, INTVCC UVLO, switch cur- rent > 1.9× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C.

Figure 1. Burst Frequency vs Load Current sleep mode, the LT8331 consumes only 6µA. be minimized as they all add to the equivalent output load. Selection in the Applications Information section). capacitance will decrease the output ripple proportionally. defined by the resistor at the RT pin as shown in Figure 1. Figure 2. Burst Mode Operation operation. A logic input can also control the EN/UVLO pin. minimize their effect on efficiency at light loads. rents required by the internal power MOSFET gate driver .

8331 F01

8331 F02

(to stop switching and reset soft-start) is typically 2.5V. bypass the pin with a local ceramic capacitor . Table 1. SW Frequency vs RT Value 500kHz and higher , the RT should be selected for 500kHz. pin above 2.4V (this can be INTVCC or a logic high output). in the Electrical Characteristics table).

rent, lower available output power and reduced efficiency. input quiescent current and highest light-load efficiency. cause inductor saturation or power switch failure. its final value while limiting the start-up peak currents. the output voltage and supply current come up gradually. Figure 3. Soft-Start Waveforms

8331 F03

Rev. C For more information www.analog.com APPLICATIONS INFORMATION frequency foldback provides a larger switch-off time, allowing inductor current to fall enough each cycle (see Normalized Switching Frequency vs FBX Voltage in the Typical Performance Characteristics section). THERMAL LOCKOUT If the LT8331 die temperature reaches 170° C (typical), the part will stop switching and go into thermal lockout. When the die temperature has dropped by 5°C (nominal), the part will resume switching with a soft-started inductor peak current. COMPENSATION The LT8331 is internally compensated. The decision to use either low ESR (ceramic) capacitors or the higher ESR (tantalum or OS-CON) capacitors, for the output capacitor , can affect the stability of the overall system. The ESR of any capacitor , along with the capacitance itself, contrib- utes a zero to the system. For the tantalum and OS-CON capacitors, this zero is located at a lower frequency due to the higher value of the ESR, while the zero of a ceramic capacitor is at a much higher frequency and can generally be ignored. A phase lead zero can be intentionally introduced by plac- ing a capacitor in parallel with the resistor between VOUT and FBX. By choosing the appropriate values for the resis- tor and capacitor , the zero frequency can be designed to improve the phase margin of the overall converter . The typical target value for the zero frequency is between 5kHz to 20kHz. A practical approach to compensation is to start with one of the circuits in this data sheet that is similar to your application. Optimize performance by adjusting the output capacitor and/or the feed forward capacitor (connected across the feedback resistor from output to FBX pin). THERMAL CONSIDERATIONS Care should be taken in the layout of the PCB to ensure good heat sinking of the LT8331. The package has an exposed pad (Pin 17) underneath the IC which is the best path for heat out of the package. Pin 17 should be sol - dered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8331. The ground plane should be connected to large copper layers to spread heat dissi - pated by the LT8331. Power dissipation within the LT8331 (PDISS_LT8331) can be estimated by subtracting the induc- tor and Schottky diode power losses from the total power losses calculated in an efficiency measurement. The junc- tion temperature of LT8331 can then be estimated by: TJ(LT8331) = TA + θJA • PDISS_LT8331 APPLICATION CIRCUITS The LT8331 can be configured for different topologies. The first topology to be analyzed will be the boost converter , followed by the flyback, SEPIC and inverting converters. Boost Converter: Switch Duty Cycle The LT8331 can be configured as a boost converter for the applications where the converter output voltage is higher than the input voltage. Remember that boost con- verters are not short-circuit protected. Under a shorted output condition, the inductor current is limited only by the input supply capability. For applications requiring a step-up converter that is short-circuit protected, please refer to the Applications Information section covering SEPIC converters. The conversion ratio as a function of duty cycle is: VOUT VIN = 1 1 − D in continuous conduction mode (CCM). For a boost converter operating in CCM, the duty cycle of the main switch can be calculated based on the output voltage (VOUT) and the input voltage (VIN). The maximum duty cycle (D MAX) occurs when the converter has the minimum input voltage: DMAX = VOUT − VIN(MIN) VOUT

1 η where η (< 1.0) is the converter efficiency. Due to the current limit of its internal power switch, the LT8331 should be used in a boost converter whose maxi- mum output current (IO(MAX)) is: I O(MAX) ≤ VIN(MIN) VOUT Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. The inductor ripple current ∆ISW has a direct effect on the choice of the inductor value and the converter’s maximum output current capability. Choosing smaller values of ∆ISW increases output current capability, but requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆ISW provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses, and reduces output current capability. It is recommended to choose a ∆ISW of approximately 0.2A to 0.3A. Given an operating input voltage range, and having cho- sen the operating frequency and ripple current in the inductor , the inductor value of the boost converter can be determined using the following equation: L = VIN(MIN) ΔISW • fOSC
DMAX The peak inductor current is the switch current limit (max- imum 0.7A), and the RMS inductor current is approxi - mately equal to IL(MAX)(AVE). Choose an inductor that can handle at least 0.7A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I 2R power losses. Note that in some applications, the current handling requirements of the inductor can be lower , such as in the SEPIC topology where each inductor only carries one- half of the total switch current. For better efficiency, use similar valued inductors with a larger volume. Many dif - ferent sizes and shapes are available from various manu- facturers (see Table 2). Choose a core material that has low losses at the programmed switching frequency, such as a ferrite core. The final value chosen for the inductor should not allow peak inductor currents to exceed 0.5A in steady state at maximum load. Due to tolerances, be sure to account for minimum possible inductance value, switching frequency and converter efficiency.

Table 2. Inductor Manufacturers be provided with a low performance electrolytic capacitor . cerns the maximum input voltage rating of the LT8331.

easily avoided (see Application Note 88). high frequency switching noise on the converter output. capacitor at audio frequencies, generating audible noise. Figure 4. The Output Ripple Waveform of a Boost Converter

8331 F04

ceramic capacitors are also available. Table 3. Ceramic Capacitor Manufacturers A Schottky diode is recommended for use with the LT8331. reverse voltage ratings for the target applications. Table 4. Recommended Schottky Diodes Figure 5. Suggested Boost Converter Layout ground plane for better thermal performance. shows a simplified flyback converter .

8331 F05

Figure 7. Waveforms of the Flyback Converter

8331 F07

current and lower efficiency.

D 1 − D where NS/NP is the second to primary turns ratio. D is duty cycle. Figure 7 shows the waveforms of the flyback converter in discontinuous mode operation. During each switching period TS, three subintervals occur: DTS, D2TS, D3TS. During DT S, M is on, and D is reverse-biased. During D2TS, M is off, and LS is conducting current. Both LP and LS currents are zero during D3TS. The flyback converter conversion ratio in the discontinu- ous mode operation is: VOUT VIN = NS NP
D According to Figure 6, the peak SW voltage is: VSW(PEAK) = VIN(MAX) + VSN where VSN is the snubber capacitor voltage. A smaller VSN results in a larger snubber loss. A reasonable V SN is 1.5 to 2 times of the reflected output voltage: VSN = k • VOUT • NP NS k = 1.5 ~ 2 According to the Absolute Maximum Ratings table, the SW voltage Absolute Maximum value is 140V. Therefore, the maximum primary to secondary turns ratio (for both the continuous and the discontinuous operation) should be: NP NS 140V − VIN(MAX) k • VOUT According to the preceding equations, the user has rela- tive freedom in selecting the switch duty cycle or turns ratio to suit a given application. The selections of the duty cycle and the turns ratio are somewhat iterative pro- cesses, due to the number of variables involved. The user can choose either a duty cycle or a turns ratio as the start point. The following trade-offs should be considered when selecting the switch duty cycle or turns ratio, to optimize

Figure 6. A Simplified Flyback Converter

8331 F06

Rev. CFor more information www.analog.com APPLICATIONS INFORMATION the converter performance. A higher duty cycle affects the flyback converter in the following aspects: n Lower switch RMS current ISW(RMS), but higher switch VSW peak voltage n Lower diode peak reverse voltage, but higher diode RMS current ID(RMS) n Higher transformer turns ratio (NP/NS) It is recommended to choose a duty cycle between 20% and 80%. Flyback Converter: Maximum Output Current Capability and T ransformer Design The maximum output current capability and transformer design for continuous conduction mode (CCM) is chosen as presented here. The maximum duty cycle (D MAX) occurs when the con - verter has the minimum VIN: DMAX = VOUT • NP NS   VOUT • NP NS   + VIN(MIN) Due to the current limit of its internal power switch, the LT8331 should be used in a flyback converter whose maximum output current (IO(MAX)) is: IO(MAX) ≤ VIN(MIN) VOUT

DMAX • 0.5A − 0.5 • ΔISW( ) • η where η (< 1.0) is the converter efficiency. Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. The transformer ripple current ∆ISW has a direct effect on the design/choice of the transformer and the converter’s output current capability. Choosing smaller values of ∆ISW increases the output current capability, but requires large primary and secondary inductances and reduces the cur- rent loop gain (the converter will approach voltage mode). Accepting larger values of ∆ISW allows the use of low primary and secondary inductances, but results in higher input current ripple, greater core losses, and reduces the output current capability. It is recommended to choose a ∆ISW of approximately 0.2A to 0.3A. Given an operating input voltage range, and having cho- sen the operating frequency and ripple current in the pri- mary winding, the primary winding inductance can be calculated using the following equation: L = VIN(MIN) ΔISW • fOSC
DMAX The primary winding peak current is the switch current limit (maximum 0.7A). The primary and secondary maxi- mum RMS currents are: ILP(RMS) ≈ POUT(MAX) DMAX • VIN(MIN) • η ILS(RMS) ≈ IOUT(MAX) 1 − DMAX Based on the preceding equations, the user should design/ choose the transformer having sufficient saturation and RMS current ratings. Flyback Converter: Snubber Design T ransformer leakage inductance (on either the primary or secondary) causes a voltage spike to occur after the MOSFET turn-off. This is increasingly prominent at higher load currents, where more stored energy must be dis- sipated. In some cases a snubber circuit will be required to avoid overvoltage breakdown at the MOSFET’s drain node. There are different snubber circuits (such as RC snubber , RCD snubber , etc.) and Application Note 19 is a good reference on snubber design. An RCD snubber is shown in Figure 6. The snubber resistor value (RSN) can be calculated by the following equation: RSN =2 • SN −VSN • VOUT • NP NS SW(PEAK) • LLK • fOSC

DSN should be higher than the sum of VSN and VIN(MAX). the output voltage is below 100V.

VIN(MAX) + VOUT The power dissipated by the diode is: PD = IO(MAX) • VD and the diode junction temperature is: TJ = TA + PD • RθJA The RθJA to be used in this equation normally includes the RθJC for the device, plus the thermal resistance from the board to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction tem - perature rating. Flyback Converter: Output Capacitor Selection The output capacitor of the flyback converter has a similar operation condition as that of the boost converter . Refer to the Boost Converter: Output Capacitor Selection section for the calculation of COUT and ESRCOUT. The RMS ripple current rating of the output capacitors in continuous operation can be determined using the fol- lowing equation: IRMS(COUT),CONTINUOUS ≈ IO(MAX) • DMAX 1 − DMAX Flyback Converter: Input Capacitor Selection The input capacitor in a flyback converter is subject to a large RMS current due to the discontinuous primary current. To prevent large voltage transients, use a low ESR input capacitor sized for the maximum RMS current. The RMS ripple current rating of the input capacitors in continuous operation can be determined using the fol- lowing equation: IRMS(CIN),CONTINUOUS ≈ POUT(MAX) VIN(MIN) • η
1−DMAX DMAX SEPIC CONVERTER APPLICATIONS The LT8331 can be configured as a SEPIC (single-ended primary inductance converter), as shown in Figure 8. This topology allows for the input to be higher, equal, or lower than the desired output voltage. The conversion ratio as a function of duty cycle is: VOUT + VD VIN = D 1 − D in continuous conduction mode (CCM). APPLICATIONS INFORMATION

Figure 8. LT8331 Configured in a SEPIC Topology

8331 F08

from the input source when the circuit is in shutdown. are specified in the Electrical Characteristics table. Figure 9. The Switch Current Waveform of the SEPIC Converter

8331 F09

Rev. C For more information www.analog.com The inductor ripple current has a direct effect on the choice of the inductor value. Choosing smaller values of ∆IL requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆ IL allows the use of low inductances, but results in higher input current ripple and greater core losses. It is recommended that c falls in the range of 0.5 to 0.8. Due to the current limit of its internal power switch, the LT8331 should be used in a SEPIC converter whose maxi- mum output current (IO(MAX)) is: IO(MAX) < (1 – DMAX ) • (0.5A – 0.5 • ∆ISW ) • η where η (< 1.0) is the converter efficiency. Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. Given an operating input voltage range, and having cho- sen ripple current in the inductor , the inductor value (L1 and L2 are independent) of the SEPIC converter can be determined using the following equation: L1 = L2 = VIN(MIN) 0.5 • ΔISW • fOSC

DMAX For most SEPIC applications, the equal inductor values will fall in the range of 4.7µH to 220µH. By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: L = VIN(MIN) ΔISW • fOSC
DMAX This maintains the same ripple current and energy storage in the inductors. The peak inductor currents are: IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1 IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2 The maximum RMS inductor currents are approximately equal to the maximum average inductor currents. Based on the preceding equations, the user should choose the inductors having sufficient saturation and RMS cur - rent ratings. SEPIC Converter: Output Diode Selection To maximize efficiency, a fast switching diode with a low forward drop and low reverse leakage is desirable. The average forward current in normal operation is equal to the output current. It is recommended that the peak repetitive reverse voltage rating VRRM is higher than V OUT + V IN(MAX) by a safety margin (a 10V safety margin is usually sufficient). The power dissipated by the diode is: PD = IO(MAX) • VD where VD is diode’s forward voltage drop, and the diode junction temperature is: TJ = TA + PD • RθJA The RθJA used in this equation normally includes the RθJC for the device, plus the thermal resistance from the board, to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction temperature rating. SEPIC Converter: Output and Input Capacitor Selection The selections of the output and input capacitors of the SEPIC converter are similar to those of the boost converter . SEPIC Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 10) should be larger than the maxi - mum input voltage: VCDC > VIN(MAX) APPLICATIONS INFORMATION

are specified in the Electrical Characteristics table. Figure 10. A Simplified Inverting Converter

8331 F10

in continuous conduction mode (CCM). negative output voltage (VOUT) and the input voltage (VIN).

Rev. C For more information www.analog.com The ESR can be minimized by using high quality X5R or X7R dielectric ceramic capacitors. In many applications, ceramic capacitors are sufficient to limit the output volt- age ripple. The RMS ripple current rating of the output capacitor needs to be greater than: IRMS(COUT) > 0.3 • ∆IL2 Inverting Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 10) should be larger than the maxi - mum input voltage minus the output voltage (negative voltage): VCDC > VIN(MAX) – VOUT CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while approximately –IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the fol- lowing equation: IRMS(CDC) >IO(MAX) • DMAX 1 − DMAX A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. APPLICATIONS INFORMATION

Rev. CFor more information www.analog.com TYPICAL APPLICATIONS 9V to 16V Input, 135V Boost Converter 36V to 72V Input,120V Boost Converter

8331 TA03

D1: ROHM RB558VA150TR L1: WURTH ELEKTRONIK WE-744 066 101 C1: MURATA GRM31CR71E106MA12L C3: UNITED CHEMI-CON KTS251B105M55N0T00 12.1k 287k 0.1µF 154k 1µF VOUT = 135V IN SW1-2 EN/UVLO L T8331 VIN 9V TO 16V 100/uni03BCH 4mA AT VIN = 9V 10mA AT VIN = 12V 17mA AT VIN = 16V SYNC/MODE GND FBX BIAS SS 200kHz 1µF 10µF V RT INTVCC

8331 TA04

D1: ROHM RB558VA150TR L1: WURTH ELEKTRONIK WE 744 066 101 C1: MURATA GRJ32DC72A475KE11L C3: UNITED CHEMI-CON KTS251B105M55N0T00 13.3k 59k 0.1µF 63.4k 1µF VOUT = 120V IN SW1-2 EN/UVLO L T8331 VIN 36V TO 72V 100/uni03BCH 55mA AT VIN = 36V 100mA AT VIN = 72V SYNC/MODE GND FBX BIAS SS 450kHz 1µF 4.7µF V RT INTVCC 75mA AT VIN = 48V

Rev. C For more information www.analog.com TYPICAL APPLICATIONS 10V to 48V Input, 240V Boost Converter 36V to 72V Input, 48V SEPIC Converter

8331 TA05

0.1/uni03BCF 1/uni03BCF D1, D2, D3: DIODES INC. BAV21W L1: SUMIDA CDRH8D43RT125NP-331MC C1: MURATA GRM31CR61H106KA12L C3, C6: MURATA GRM55DR72E105KW01L C5: MURATA GRM31CR72D104KW03L C7: MURATA GQM2195C2E4R7CB12J 200kHz 330/uni03BCH 13.3k 249k 0.22µF 154k 1µF VOUT1 IN SW1-2 EN/UVLO L T8331 VIN 10V TO 48V SYNC/MODE GND FBX BIAS SS 1/uni03BCF 10/uni03BCF V RT INTVCC INTVCC INTVCC 4.7pF VOUT2 VOUT2 = 240V 15mA AT VIN = 12V 35mA AT VIN = 48V 30mA AT VIN = 36V 25mA AT VIN = 24V 100Ω 1/4W

8331 TA06

D1: ROHM RB558VA150TR L1, L2: COIL TRONICS DRQ127-221 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRJ32DC72A475KE11L C5: MURATA GRM31CR72A225KA73L 34.8k 2.2µF 59k 0.1µF 63.4k 1µF VOUT = 48V IN SW1-2 EN/UVLO L T8331 VIN 36V TO 72V 220/uni03BCH 220/uni03BCH 150mA AT VIN = 36V 165mA AT VIN = 48V 190mA AT VIN = 72V SYNC/MODE GND FBX BIAS SS V OUT 450kHz 4.7µF 1µF V RT INTVCC

Rev. CFor more information www.analog.com TYPICAL APPLICATIONS 4.5V to 80V Input, 12V SEPIC Converter 4.5V to 80V Input, 5V SEPIC Converter

8331 TA07

D1: ROHM RB578VAM100TR L1, L2: COIL TRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRM32ER71E226KE15L C5: MURATA GRM31CR72A105KA01L 154k 1µF 787k 0.1µF 63.4k 1µF VOUT = 12V IN SW1-2 EN/UVLO L T8331 VIN 4.5V TO 80V 33/uni03BCH 33/uni03BCH 75mA AT VIN = 4.5V 120mA AT VIN = 12V 120mA AT VIN = 24V 120mA AT VIN = 48V 120mA AT VIN = 80V SYNC/MODE GND FBX BIAS SS V OUT 450kHz 22µF 1µF V RT INTVCC INTVCC INTVCC

8331 TA08

D1: ROHM RB578VAM100TR L1, L2: COIL TRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRM31CR61A476ME15L C5: MURATA GRM31CR72A105KA01L 464k 1µF 787k 0.1µF 100k 1µF VOUT = 5V IN SW1-2 EN/UVLO L T8331 VIN 4.5V TO 80V 33/uni03BCH 33/uni03BCH 130mA AT VIN = 4.5V 175mA AT VIN = 12V 180mA AT VIN = 24V 180mA AT VIN = 48V 180mA AT VIN = 80V SYNC/MODE GND FBX BIAS SS V OUT 300kHz 47µF 1µF V RT INTVCC INTVCC INTVCC

Rev. C For more information www.analog.com TYPICAL APPLICATIONS 36V to 72V Input, –24V Inverting Converter

8331 TA09

D1: ROHM RB558VA150TR L1, L2: COIL TRONICS DRQ127-101 C1: MURATA GRM32DC72A475K11L C3: MURATA GRM31CR61H106KA12L C5: MURATA GRM32DC72A475K11L 34.8k 4.7µF 59k 0.1µF 63.4k 1µF VOUT = –24V IN SW1-2 EN/UVLO L T8331 VIN 36V TO 72V 100/uni03BCH 100/uni03BCH 175mA AT VIN = 36V 190mA AT VIN = 48V 200mA AT VIN = 72V SYNC/MODE GND FBX BIAS SS 450kHz 10µF 4.7µF V RT INTVCC 4.5V to 80V Input, –12V Inverting Converter

8331 TA10

D1: DIODES INC. DFLS1100 L1, L2: COIL TRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRM32ER61A226KE20L C5: MURATA GRM31CR72A105KA01L 71.5k 1µF 787k 22nF 100k 1µF VOUT = –12V IN SW1-2 EN/UVLO L T8331 VIN 4.5V TO 80V 33/uni03BCH 33/uni03BCH 70mA AT VIN = 4.5V 80mA AT VIN = 12V 80mA AT VIN = 48V 80mA AT VIN = 80V SYNC/MODE GND FBX BIAS SS 300kHz 22µF 1µF V RT INTVCC

Rev. CFor more information www.analog.com 4.5V to 80V Input, –5V Inverting Converter TYPICAL APPLICATIONS

8331 TA11

D1: DIODES INC. DFLS1100 L1, L2: COIL TRONICS DRQ74-330 C1: MURATA GRM32ER72A105KA01L C3: MURATA GRM32ER61A226KE20L C5: MURATA GRM31CR72A105KA01L 191k 1µF 787k 22nF 100k 1µF VOUT = –5V IN SW1-2 EN/UVLO L T8331 VIN 4.5V TO 80V 33/uni03BCH 33/uni03BCH 135mA AT VIN = 4.5V 170mA AT VIN = 12V 170mA AT VIN = 48V 170mA AT VIN = 80V SYNC/MODE GND FBX BIAS SS 300kHz 22µF 1µF V RT INTVCC

Rev. C For more information www.analog.com PACKAGE DESCRIPTION MSOP (MSE16(12)) 0213 REV D 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 1.0 (.039) BSC 1.0 (.039) BSC 16 14 121110 1 3 5 6 7 8 1 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) BSC BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.280 ±0.076 (.011 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF Variation: MSE16 (12) 16-Lead Plastic MSOP with 4 Pins Removed Exposed Die Pad (Reference LTC DWG # 05-08-1871 Rev D)

Rev. CFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 08/16 Updated 10V to 48V Input schematic. 24 B 05/19 Corrected Typo in VIN Quiescent Current. 2 C 03/20 Added to Features Section. Added Automotive Products. Corrected DMIN equation. 1, 2, 21

Rev. C For more information www.analog.com  ANALOG DEVICES, INC. 2015-2020 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT8300 100VIN Micropower Isolated Flyback Converter with 150V/260mA Switch VIN = 6V to 100V, Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23 LT8330 60V, 1A, Low IQ Boost/SEPIC/Inverting Converter VIN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation), 6-Lead TSOT-23, 3mm × 2mm DFN packages LT8494 70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up DC/DC Converter VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3µA (Burst Mode Operation), ISD = <1µA, 20-Lead TSSOP LT8570/LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter VIN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD = <1mA, 3mm × 3mm DFN-8, MSOP-8E LT8580 1A (ISW), 65V, 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E 40V to 80V Input, 5V Isolated Output Converter D1, D2: PMEG6010CEJ T1: WURTH ELEKTRONIK 750311558 C3: MURATA GRM31CR61A475KA01L C5: MURATA GRM32ER61A107ME20L

8331 TA02

4 : 1 3.24k 27nF 100k 1µF VOUT = 5V 100mA IN SW1-2 EN/UVLO L T8331 VIN 40V TO 80V 7.15k SYNC/MODE GND FBX BIAS SS 100µF 1µF V RT INTVCC 4.7µF 10Ω Efficiency Load Regulation ISOLATED FL YBACK: V OUT = 5V V IN = 40V V IN = 80V LOAD CURRENT (mA) 100 120 100 EFFICIENCY (%)

8331 TA02b

LOAD CURRENT (mA) 100 120 4.2 4.3 4.4 4.5 4.6 4.7 4.8 4.9 5.0 5.1 5.2 5.3 5.4 5.5 5.6 5.7 5.8 V OUT (V)

8331 TA02c

ISOLATED FL YBACK: V OUT = 5V V IN = 40V V IN = 80V

Summary

Low IQ Boost/SEPIC/Flyback/Inverting Converter with 0.5A, 140V Switch 03/20-REV.C

Description