LT8494: SEPIC/Boost DC/DC Converter with 2A, 70V Switch, and 7µA Quiescent Current
Document overview
- Manufacturer or author: Linear Technology Corporation
- PDF pages: 26
Technical content
8494faFor more information www.linear .com/L T8494 INPUT VOL TAGE (V) SUPPL Y CURRENT (µA)
8494 TA01b
Converter with 2A, 70V Switch, and 7µA Quiescent Curr ent The LT®8494 is an adjustable frequency (250kHz to 1.5MHz) monolithic switching regulator . Quiescent cur- rent can be less than 7µA when operating and is ~0.3µA when SWEN is low. The LT8494 can be configured as either a SEPIC, boost or flyback converter . The low ripple Burst Mode operation maintains high efficiency at low output current while keeping output rip- ple below 10mV. Dual supply pins (V IN and BIAS) allow the part to automatically operate from the most efficient supply. Input supply voltage can be up to 60V for SEPIC topologies and up to 32V (with ride-through up to 60V) for boost and flyback topologies. After start-up, battery life is extended since the part can draw current from its output (BIAS) even when V IN voltage drops below 2.5V. Using a resistor divider on the SWEN pin provides a pro- grammable undervoltage lockout (UVLO) for the con - verter . A power good flag signals when VOUT reaches 92% of the programmed output voltage. Additional features such as frequency foldback and soft- start are integrated. The LT8494 is available in 20-lead QFN and 20-lead TSSOP packages with exposed pads for low thermal resistance. Fault tolerance in the TSSOP allows for adjacent pin shorts or an open without raising the output voltage above its programmed value. 450kHz, 5V Output SEPIC Converter No-Load Supply Current Efficiency
APPLICATIONS
n Low Ripple Burst Mode® Operation: n 7µA IQ at 12VIN to 5VOUT n Output Ripple (<10mV Typ.) n Dual Supply Pins: n Improves Efficiency n Reduces Minimum Supply Voltage to ~1V After n Start-Up to Extend Battery Life n Wide Input Voltage Range of ~1V to 60V (2.5V to 32V for Start-Up) n PG Functional for Input Supply Down to 1.3V n FMEA Fault Tolerant in TSSOP Package n Fixed Frequency PWM, SEPIC/BOOST/FL YBACK Topologies n NPN Power Switch: 2A/70V n Programmable Switching Frequency: 250kHz to 1.5MHz n UVLO Programmable on SWEN Pin n Soft-Start Programmable with One Capacitor n Small 20-Lead QFN or 20-Lead TSSOP Packages n Automotive ECU Power n Power for Portable Products n Industrial Supplies L, L T , L TC, L TM, Linear Technology, Burst Mode and the Linear logo are registered trademarks of Analog Devices, Inc. All other trademarks are the property of their respective owners. 2.2µF15µH 15µH 1µF VIN 3V TO 60V VOUT 0.35A (VIN = 3V) 0.6A (VIN = 5V) 1.0A (VIN > 12V) SW BIAS FBGND VIN SWEN RT PG SS 316k
8494 TA01a
47µF 4.7pF 4.7µF V IN = 12V V IN = 24V V IN = 5V LOAD CURRENT (A) 0.0 0.2 0.4 0.6 0.8 1.0 EFFICIENCY (%)
8494 TA01c
8494fa For more information www.linear .com/L T8494 ABSOLUTE MAXIMUM RATINGS S V RT V S O perating Junction Temperature Range Lead Temperature (Soldering, 10 sec) (Note 1) ORDER INFORMATION 20 19 18 17 16 6 7 8 TOP VIEW GND UF PACKAGE 20-LEAD (4mm × 4mm) PLASTIC QFN 9 10 15SS RT GND GND NC GND GND GND SW GND PG NC NC FB BIAS SWEN NC NC GND V IN θJA = 47°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB FE PACKAGE 20-LEAD PLASTIC TSSOP TOP VIEW BIAS FB FB NC NC NC PG SS NC RT SW NC V IN NC GND NC GND NC SWEN NC GND θJA = 38°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB PIN CONFIGURATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8494EUF#PBF LT8494EUF#TRPBF 8494 20-Lead (4mm × 4mm) Plastic QFN –40°C to 125°C LT8494IUF#PBF LT8494IUF#TRPBF 8494 20-Lead (4mm × 4mm) Plastic QFN –40°C to 125°C LT8494EFE#PBF LT8494EFE#TRPBF LT8494FE 20-Lead Plastic TSSOP –40°C to 125°C LT8494IFE#PBF LT8494IFE#TRPBF LT8494FE 20-Lead Plastic TSSOP –40°C to 125°C LT8494HFE#PBF LT8494HFE#TRPBF LT8494FE 20-Lead Plastic TSSOP –40°C to 150°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . For more information on lead free part marking, go to: http://www.linear .com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear .com/tapeandreel/. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. http://www.linear .com/product/LT8494#orderinfo
8494faFor more information www.linear .com/L T8494 The l denotes the specifications which apply over the full operating junction temperature range, otherwise specifications are at TA = 25°C. VIN = VSWEN = 12V, VBIAS = 5V, unless otherwise noted (Note 2).
ELECTRICAL CHARACTERISTICS
PARAMETER CONDITIONS MIN TYP MAX UNITS Minimum VIN Operating Voltages VBIAS < 2.5V VBIAS ≥ 2.5V l l 2.4 2.5 V V Minimum BIAS Operating Voltages VIN < 2.5V VIN ≥ 2.5V l l 2.4 2.5 V V Power Switch Driver (PSD) Overvoltage Threshold (Note 4) VIN or BIAS Rising VIN or BIAS Falling l l 32.1 33.9 36.5 36.4 V V Power Switch Driver (PSD) Overvoltage Threshold Hysteresis (Note 4) 100 mV Quiescent Current from V IN VSWEN = 0V VSWEN = 5V, VFB = 1.25V VSWEN = 5V, VFB = 1.25V (LT8494E, LT8494I) VSWEN = 5V, VFB = 1.25V (LT8494H) l l 0.3 3.0 3.0 3.0 0.9 4.8 6.2 8.0 µA µA µA µA Quiescent Current from BIAS V SWEN = 0V VSWEN = 5V, VFB = 1.25V VSWEN = 5V, VFB = 1.25V (LT8494E, LT8494I) VSWEN = 5V, VFB = 1.25V (LT8494H) l l 0.07 1.7 1.7 1.7 0.5 2.8 3.5 µA µA µA µA BIAS to V IN Comparator Threshold VBIAS-VIN, VBIAS Rising, VIN = 12V VBIAS-VIN, VBIAS Falling, VIN = 12V Hysteresis (Rising-Falling Threshold) l l l 0.55 0.17 0.20 0.9 0.37 0.53 1.2 0.57 0.8 V V V Feedback Voltage l 1.178 1.202 1.230 V FB Pin Bias Current (Note 7) VFB = 1.202V 0.1 20 nA FB Voltage Line Regulation 5V ≤ VIN ≤ 32V, BIAS = 5V 5V ≤ VIN ≤ 32V, BIAS = 0V 0.2 0.2 m%/V m%/V Minimum Switch Off-Time 70 ns Minimum Switch On-T ime 95 ns Switching Frequency RT = 68.1k RT = 324k l l 0.92 219 1.0 250 1.06 280 MHz kHz Switch Current Limit at Minimum Duty Cycle (Note 5) l 2.1 2.55 2.95 A Switch Current Limit at Maximum Duty Cycle (Note 6) l 1.3 1.85 2.4 A Switch VCESAT ISW = 1.2A 340 mV Switch Leakage Current (Note 7) VSW = 12V, VSWEN = 0V 0.01 1 μA Soft-Start Charging Current (Note 7) VSS = 100mV l 5.2 8.2 12.2 μA SWEN Pin Current (Note 7) VSWEN = 1.2V VSWEN = 5V VSWEN = 12V 240 200 550 nA nA nA SWEN Rising Voltage Threshold l 0.9 1 1.1 V SWEN Voltage Hysteresis 30 mV PG Threshold as % of VFB Regulation Voltage V FB Rising VFB Falling l l PG Hysteresis 46 mV PG Output Voltage Low I SINK = 1.25mA ISINK = 100μA, VBIAS = 0V, VIN = 1.3V ISINK = 100μA, VBIAS = 1.3V, VIN = 0V l l l 150 150 150 mV mV mV PG Leakage Current V PG = 5V (LT8494E, LT8494I) VPG = 5V (LT8494H) l l 0.3 1.0 μA μA
8494fa For more information www.linear .com/L T8494 TYPICAL PERFORMANCE CHARACTERISTICS Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Voltages are with respect to GND pin unless other wise noted. Note 2: The LT8494E is guaranteed to meet per formance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8494I is guaranteed to meet performance specifications from –40°C to 125°C junction temperature. The LT8494H is guaranteed over the full –40°C to 150°C operating junction temperature range. Operation lifetime is derated at junction temperatures greater than 125°C. Note 3: This IC includes overtemperature protection that is intended to protect the device during momentary overload conditions. Junction temperature will exceed the maximum operating range when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature may impair device reliability Note 4: See Power Supplies and Operating Limits in the Applications Information section for more details. Note 5: Current limit guaranteed by design and/or correlation to static test. Slope Compensation reduces current limit at higher duty cycles. Note 6: Max duty cycle current limit measured at 1MHz switching frequency Note 7: Polarity specification for all currents into pins is positive. All voltages are referenced to GND unless otherwise specified. No-Load Supply Current Maximum Load Current Load Regulation TA = 25°C unless otherwise specified. FRONT PAGE APPLICATION TYPICAL MINIMUM V IN (V) 0.0 0.5 1.0 1.5 2.0 2.5 LOAD CURRENT (A)
8494 G05
V IN =12V TEMPERATURE (°C) –50 –10 110 150 100 SUPPL Y CURRENT (µA)8494 G04 Switching Waveforms, Burst Mode Operation T ransient Load Response, Load Current is Stepped from 20mA (Burst Mode Operation) to 220mA Switching Waveforms, Full Frequency Continuous Operation FRONT PAGE APPLICATION VIN = 12V VOUT = 5V ILOAD = 20mA 10µs/DIV
8494 G16
0.5A/DIV VOUT 5mV/DIV FRONT PAGE APPLICATION V IN = 12V VOUT = 5V 500µs/DIV
8494 G17
0.5A/DIV FRONT PAGE APPLICATION V IN = 12V VOUT = 5V ILOAD = 0.5A 1µs/DIV
8494 G18
0.5A/DIV VOUT 5mV/DIV V IN =12V FRONT PAGE APPLICATION REFERENCED TO V OUT AT 100mA LOAD LOAD CURRENT (mA) 200 400 600 800 1000 –0.15 –0.10 –0.05 0.00 0.05 0.10 0.15 LOAD REGULATION (%)
8495 G18
8494faFor more information www.linear .com/L T8494 TYPICAL PERFORMANCE CHARACTERISTICS Switch Current Limit at 500kHz Switch Current Limit at Minimum Duty Cycle Switch VCESAT Minimum Switch On-Time Feedback Voltage Oscillator Frequency TA = 25°C unless otherwise specified. TEMPERATURE (°C) –50 SWITCH ON-TIME (ns) 140 120 100
8494 G13
TEMPERATURE (°C) –50 SWITCH OFF-TIME (ns) 180 160 140 120 100
8494 G14
TEMPERATURE (°C) –50 FREQUENCY (MHz) 1.5 0.5 1.0 0.0
8494 G11
RT = 68.1k RT = 324k SWITCHING FREQUENCY (kHz) 1200 1000 600 400 200 800
8494 G12
FB VOL TAGE (V) RT = 68.1k RT = 324k Frequency Foldback Minimum Switch Off-Time DUTY CYCLE (%) 0.0 0.5 1.0 1.5 2.0 2.5 3.0 SWITCH CURRENT LIMIT (A)
8494 G06
TEMPERATURE (°C) –50 SWITCH CURRENT LIMIT (A) 3.0 2.0 1.0 2.5 1.5 0.5
8494 G07
SWITCH CURRENT (A) SWITCH VCESAT (mV) 600 400 200 500 300 100 1.0
8494 G08
2.00.5 1.5 TEMPERATURE (°C) –50 FB VOL TAGE (V) 1.23 1.21 1.19 1.22 1.20 1.18
8494 G09
T ransient Load Response, Load Current is Stepped from 300mA to 500mA FRONT PAGE APPLICATION VIN = 12V VOUT = 5V 500µs/DIV
8494 G19
0.5A/DIV
8494fa For more information www.linear .com/L T8494 TYPICAL PERFORMANCE CHARACTERISTICS FB Pin Current Quiescent Current PG Output Voltage vs Supply VoltageSWEN Pin Current Pin Current Internal UVLO PG Pin Current vs Supply Voltage TA = 25°C unless otherwise specified. TEMPERATURE (°C) –50 VIN/BIAS VOL TAGE (V) 2.50 2.40 2.45 2.35 2.30
8494 G20
FB PIN CURRENT (µA)
8494 G24
FB VOL TAGE (V) 0.001 0.01 0.1 100 1000 5030 604020 10 TEMPERATURE (°C) –50 QUIESCENT CURRENT (µA)
8494 G27
VIN = 12V VBIAS = VSWEN = 5V VFB = 1.25V CURRENT INTO VIN VIN VOL TAGE (V) PG PIN CURRENT (mA)
8494 G22
PG = 0.4V VIN = BIAS, SWEN = 0 VIN = BIAS = SWEN PG OUTPUT VOL TAGE (V)
8494 G25
VIN/BIAS VOL TAGE (V) 0 321 10k PULL-UP FROM VIN TO PG SWEN PIN CURRENT (nA) 400 350 300 250 200 150 100
8494 G23
SWEN PIN VOL TAGE (V) 0 5030 604020 10 TEMPERATURE (°C) –50 CURRENT INTO PIN (nA)
8494 G26
VIN = 1.25V VSWEN = 1.2V ISWEN Overvoltage Lockout TEMPERATURE (°C) –50 VIN OR BIAS VOL TAGE (V) 35.5 34.5 33.5 35.0 34.0 33.0
8494 G15
8494faFor more information www.linear .com/L T8494 SS (Pin 1/Pin 8): So ft-Start Pin. Place a soft-start capaci- tor on this pin. Upon start-up, the SS pin will be charged by a (nominally) 256k resistor to about 2.1V. RT (Pin 2/Pin 10): Oscillator Frequency Set Pin. Place a resistor from this pin to ground to set the internal oscil - lator frequency. Minimize capacitance on this pin. See the Applications Information section for more details. GND (Pins 3, 4, 9, 11, 13, 14, 15, Exposed Pad 21/Pins 14, 16, Exposed Pad 21) : Gro und. Solder all pins and the exposed pad directly to the local ground plane. The exposed pad metal of the package provides both electrical contact to ground and good thermal contact to the printed circuit board. NC pins are not connected to internal circuitr y. Some NC pins in the TSSOP package must be left floating to ensure FMEA fault tolerance (see Applications Informations sec- tion for details). SWEN (Pin 6/Pin 12): Switch Enable Detect Pin. This pin enables/disables the switching regulator and soft-start. A resistor divider can be connected to SWEN to perform an undervoltage lockout function. VIN (Pin 10/Pin 18): Supply Input Pin. This pin is typically connected to the input of the DC/DC converter . Must be locally bypassed. SW (Pin 12/Pin 20): Switch Pin. This is the collector of the internal NPN power switch. Minimize trace area con- nected to this pin to minimize EMI. BIAS (Pin 16/Pin 1): Supply Input Pin. This pin is typi - cally connected to the output of the DC/DC converter in cases where VIN can be higher than VOUT. Must be locally bypassed. FB (Pin 17/Pin 2, 3): Output Voltage Feedback Pin. The LT8494 regulates the FB pin to 1.202V. Connect a resis- tor divider between the output, FB and GND to set the regulated output voltage. PG (Pin 20/Pin 7): The PG pin is the open-drain output of an internal comparator . PG remains low until the FB pin is above 92% of the regulation voltage, and there are no fault conditions. See the Applications Information section for more details. PIN FUNCTIONS (QFN/TSSOP)
8494fa For more information www.linear .com/L T8494 BLOCK DIAGRAM VIN 2.4V DIE TEMP 165°C 2.15V 1.10V 1.00V OTHERS SW PG BIAS GND SWEN 2.4V 34V 1.00V Q 256k S R OVP ILIMIT VC_LIMITER CHIP SHUTDOWN SR2 R Q S SR1 2.1V SS DISABLE PSD SUPPL Y SELECT LOGIC VOL TAGE REFS Burst Mode DETECT QUADRATIC RAMP GENERATOR FREQUENCY FOLDBACK CHIP SHUTDOWN 1.10V LOW POWER MODE SOFT- START 34V 100mV 1.202V RT FB PGOOD VC 8494 BD POWER SWITCH DRIVER ADJUSTABLE OSCILLATOR
8494faFor more information www.linear .com/L T8494 OPERATION The LT8494 is a constant-frequency, current mode SEPIC/boost/flyback regulator . Operation can be best understood by referring to the Block Diagram. In the Block Diagram, the adjustable oscillator , with frequency set by the external RT resistor , enables an RS latch, turning on the internal power switch. An amplifier and comparator monitor the switch current flowing through an internal sense resistor , turning the switch off when this current reaches a level determined by the voltage at VC. An error amplifier adjusts the VC voltage by measuring the output voltage through an external resistor divider tied to the FB pin. If the error amplifier’s output voltage (VC) increases, more current is delivered to the output; if the VC voltage decreases, less current is delivered. An active clamp on the VC voltage provides current limit. An internal regulator provides power to the control circuitry. In order to improve efficiency, the NPN power switch driver (see Block Diagram) supplies NPN base current from whichever of V IN and BIAS has the lower supply voltage. However , if either of them is below 2.4V or above 34V (typical values), the power switch draws current from the other pin. If both supply pins are below 2.4V or above 34V then switching activity is stopped. To further optimize efficiency, the LT8494 automatically enters Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down, reducing the V IN/BIAS pin supply currents to be less than 3µA typically (see Electrical Characteristics). The LT8494 contains a power good comparator which trips when the FB pin is above 92% of its regulated value. The PG output is an open-drain transistor that is off when the output is in regulation, allowing an external resistor to pull the PG pin high (See Applications Information section for details). Several functions are provided to enable a very clean start-up for the LT8494.
- First, the SWEN pin voltage is monitored by an internal voltage reference to give a precise turn-on threshold. An external resistor divider can be connected from the input power supply to the SWEN pin to provide a user-programmable undervoltage lockout function.
- Second, the soft-start circuitr y provides for a grad - ual ramp-up of the switch current. When the part is brought out of shutdown, the external SS capacitor is first discharged, and then an integrated 256k resistor pulls the SS pin up to ~2.1V. By connecting an exter- nal capacitor to the SS pin, the voltage ramp rate on the pin can be set. Typical values for the soft-start capacitor range from 100nF to 1µF.
- Finally, the frequency foldback circuit reduces the maximum switching frequency when the FB pin is below 1V. This feature reduces the minimum duty cycle that the part can achieve thus allowing better control of the switch current during start-up.
8494 F01
time (see Electrical Characteristics table). Figure 1. Switching Frequency in Burst Mode Operation will be inversely proportional to the output capacitance. seamless, and will not disturb the output voltage. Diagram) cannot remain on for 100% of each clock cycle.
- 100%
- 100% where TP is the clock period and Minimum Switch On-Time (found in the Electrical Characteristics) is typically 95ns. The application should be designed such that the oper - ating duty cycle (DC) is between DC MIN and DC MAX. Normally, DC rises with higher VOUT and lower VIN. Duty cycle equations for both boost and SEPIC topologies are given below, where V D is the diode forward voltage drop and VCESAT is typically 340mV at 1.2A. For the boost topology: DC≅ VOUT – VIN + VD VOUT + VD – VCESAT For the SEPIC topology: DC≅ VOUT + VD VIN + VOUT + VD – VCESAT The LT8494 can be used in configurations where the duty cycle is higher than DCMAX, but it must be operated in the discontinuous conduction mode or Burst Mode operation so that the effective duty cycle is reduced. Setting the Switching Frequency The LT8494 uses a constant frequency PWM architec - ture that can be programmed to switch from 250kHz to 1.5MHz by using a resistor tied from the RT pin to ground. Table 1 shows the necessary RT values for various switch- ing frequencies.
Table 1. Switching Frequency vs RT Value increases, and will saturate more easily.
8494fa For more information www.linear .com/L T8494 APPLICATIONS INFORMATION Adequate Load Current: Small value inductors result in increased ripple currents and thus, due to the limited peak switch current, decrease the average current that can be provided to a load (I OUT). In order to provide adequate load current, L should be at least: L > DC• VIN 2 f( ) ILIM – VOUT •IOUT VIN • η For boost topologies, or: L > DC• VIN 2 f( ) ILIM – VOUT •IOUT VIN • η –IOUT for the SEPIC topologies. where: L = L1||L2 for the uncoupled SEPIC topology DC = switch duty cycle (see previous section) ILIM = switch current limit, typically about 2.35A at 50% duty cycle (see the Typical Performance Characteristics section) η = power conversion efficiency (typically 85% to 90% for boost and 80% to 85% for SEPIC at high currents) f = switching frequency Negative values of L indicate that the output load cur - rent IOUT exceeds the switch current limit capability of the LT8494. Avoiding Subharmonic Oscillations: The internal slope compensation circuit of LT8494 helps prevent the subhar- monic oscillations that can occur when the duty cycle is greater than 50%, provided that the inductance exceeds a minimum value. In applications that operate with duty cycles greater than 50%, the inductance must be at least: L > VIN – VCESAT( ) • 2DC–1( ) for boost and coupled inductor SEPIC, or: L1||L2> VIN – VCESAT( ) • 2DC–1( ) for the uncoupled inductor SEPIC topologies. Maximum Inductance: Excessive inductance can reduce current ripple to levels that are difficult for the current comparator (A2 in the Block Diagram) to cleanly discrimi- nate, thus causing duty cycle jitter and/or poor regulation. The maximum inductance can be calculated by: LMAX = VIN – VCESAT IMIN(RIPPLE)
- DC f where LMAX is L1||L2 for uncoupled SEPIC topologies and IMIN(RIPPLE) is typically 150mA. Current Rating: Finally, the inductor(s) must have a rating greater than its peak operating current to prevent inductor saturation resulting in efficiency loss. In steady state, the peak and average input inductor cur- rents (continuous conduction mode only) are given by: IL1 (PEAK)= VOUT •IOUT VIN • η + VIN •DC 2•L1• f IL1 (AVG)= VOUT •IOUT VIN • η for the boost and uncoupled inductor SEPIC topology. For uncoupled SEPIC topologies, the peak and average currents of the output inductor L2 are given by: IL2(PEAK) =IOUT + VOUT • 1–DC( ) 2•L2• f IL2(AVG) =IOUT
8494faFor more information www.linear .com/L T8494 APPLICATIONS INFORMATION For the coupled inductor SEPIC: IL(PEAK) =IOUT • 1 + VOUT VIN • η + VIN •DC 2•L • f IL(AVG) =IOUT • 1 + VOUT VIN • η Note: Inductor current can be higher during load tran - sients. It can also be higher during short-circuit and start-up if inadequate soft-start capacitance is used. Thus, IL(PEAK) may be higher than the switch current limit of 2.95A, and the RMS inductor current is approximately equal to I L(AVG). Choose an inductor having sufficient saturation current and RMS current ratings. Capacitor Selection Low ESR (equivalent series resistance) capacitors should be used at the output to minimize the output ripple volt - age. Multilayer ceramic capacitors are an excellent choice, as they have an extremely low ESR and are available in very small packages. X5R or X7R dielectrics are preferred, as these materials retain their capacitance over wider volt- age and temperature ranges. Always use a capacitor with a sufficient voltage rating. Many capacitors rated at 2.2µF to 20µF, particularly 0805 or 0603 case sizes, have greatly reduced capacitance at the desired output voltage. Solid tantalum or OS-CON capacitors can be used, but they will occupy more board area than a ceramic and will have a higher ESR with greater output ripple. Ceramic capacitors also make a good choice for the input decoupling capacitor , which should be placed as closely as possible to the VIN and BIAS pins of the LT8494. A 2.2µF to 4.7µF input capacitor is sufficient for most applications. Audible Noise Ceramic capacitors are small, robust and have very low ESR. However , due to their piezoelectric nature, ceramic capacitors can sometimes create audible noise when used with the LT8494. During Burst Mode operation, the LT8494 regulator’s switching frequency depends on the load current, and at very light loads the regulator can excite the ceramic capacitor at audio frequencies, gen- erating audible noise. Since LT8494 operates at a lower current limit during Burst Mode operation, the noise is typically very quiet. If this is unacceptable, use a high per- formance tantalum or electrolytic capacitor at the output. Diode Selection The diode used in boost or SEPIC topologies conducts current only during the switch off-time. During the switch on-time, the diode has reverse voltage across it. The peak reverse voltage is equal to V OUT in the boost topology and equal to (V OUT + VIN) in the SEPIC topology. Use a diode with a reverse voltage rating greater than the peak reverse voltage. An additional consideration is the reverse leakage cur- rent. The leakage current appears to the output as load current and affects the efficiency, most noticeably, under light load conditions. In Burst Mode operation, after the inductor current vanishes, the reverse voltage across the boost diode is approximately equal to V OUT – VIN in the boost topology and VOUT in the SEPIC topology. The per- centage of time that the diode is reverse biased increases as load current decreases. Schottky diodes that have larger forward voltages often have less leakage, so a trade-off exists between light load and high load efficiency. Also the Schottky diodes with larger reverse bias ratings may have less leakage at a given output voltage, therefore, superior leakage per- formance can be achieved at the expense of diode size. Finally, keep in mind that the leakage current of a power Schottky diode goes up exponentially with junction tem- perature. Therefore, the Schottky diode must be selected with care to avoid excessive increase in light load supply current at high temperatures. Soft-Start The LT8494 contains a soft-start circuit to limit peak switch currents during start-up. High start-up current is inherent in switching regulators since the feedback loop is saturated due to VOUT being far from its final value. The
8494fa For more information www.linear .com/L T8494 APPLICATIONS INFORMATION regulator tries to charge the output capacitor as quickly as possible, which results in large peak currents. The start-up current can be limited by connecting an external capacitor (typically 100nF to 1µF) to the SS pin. This capacitor is slowly charged to ~2.1V by an internal 256k resistor once the part is activated. SS pin voltages below ~0.8V reduce the internal current limit. Thus, the gradual ramping of the SS voltage also gradually increases the current limit as the capacitor charges. This, in turn, allows the output capacitor to charge gradually toward its final value while limiting the start-up current. When the switching regula- tor shuts down, the soft-start capacitor is automatically discharged to ~100mV or less before charging resumes, thus assuring that the soft-start occurs after every reac- tivation of the switching regulation. Power Supplies and Operating Limits The LT8494 draws supply current from the VIN and BIAS pins. The largest supply current draw occurs when the switching regulator is enabled (SWEN is high) and the power switch is toggling on and off. Under light load con- ditions the switching regulator enters Burst Mode opera- tion where the power switch toggles infrequently and the input current is significantly reduced (see the Low Ripple Burst Mode Operation section). Power Switch Driver (PSD) Operating Range: The NPN power switch is driven by a power switch driver (PSD) as shown in the Block Diagram. The driver must be powered by a supply (VIN or BIAS) that is above the minimum oper- ating voltage and below the PSD overvoltage threshold. These voltages are typically 2.4V and 34V respectively (see Electrical Characteristics). If neither V IN nor BIAS is within this operating range, the PSD and the switching regulator are automatically dis- abled. Voltages up to 60V are not harmful to the PSD, however , as discussed, switching regulation is automati- cally disabled when neither V IN nor BIAS is in the valid operating range. When both VIN and BIAS are too low for proper LT8494 operation (typically < 2.4V), the chip will enter shutdown and draw minimal current from both supplies. Automatic Power Supply Selection: In order to minimize power loss, the LT8494 draws as much of its required current as possible from the lowest suitable voltage sup- ply (VIN or BIAS) in accordance with the requirements described in the previous two sections. This selection is automatic and can change as V IN and/or BIAS voltages change. The LT8494 compares the V IN and BIAS voltages to determine which is lower . The comparator has an offset and hysteresis as shown in the Electrical Characteristics section. The voltage comparison happens continuously when the power switch is toggling. The result of the latest comparison is latched inside the LT8494 when switching stops. If the power switch is not toggling, the LT8494 uses the last VIN vs BIAS comparison to determine which supply is lower . After initial power up or any thermal lock- out the LT8494 always concludes that V IN is the lower supply voltage until subsequent voltage comparisons can be made while the power switch is toggling. BIAS Connection for SEPIC Converters: For SEPIC con- verters, where VIN can be above or below V OUT, BIAS is typically connected to V OUT which improves efficiency when VIN voltage is higher than VOUT. Connecting BIAS to VOUT in a SEPIC topology also allows the switching regu- lator to operate with VIN above 34V (typical switch driver overvoltage threshold) in cases where VOUT is regulated below the PSD overvoltage threshold. Finally, connecting BIAS to V OUT also allows the converter to operate from VIN voltages less than 2.4V after V OUT rises within the PSD operating range. This can be very useful in battery powered applications since the battery voltage drops as it discharges. BIAS Connection for Boost Converters: For boost con- verters, BIAS is typically connected to V OUT or to ground. Connecting BIAS to VOUT allows the converter to operate with VIN < 2.5V after VOUT has risen within the PSD oper- ating range. However , during no load conditions on VOUT, despite VIN being selected as the primary input supply, the overall power loss will be slightly elevated due to the small amount of current still being drawn from the higher voltage BIAS pin. To minimize boost converter power loss during no load conditions, connect BIAS instead to ground.
below VOUT. Otherwise a SEPIC topology can be used. and may damage the passive components or the chip. ponent parameters, will generally prevent these issues. Figure 2. Power Good Function
8494 F02
these layers will spread heat dissipated by the LT8494. mal resistance from junction to ambient. supplied by the lowest suitable voltage on VIN and BIAS. Automatic Power Supply Selection section). resistors connected to those pins. Output Power Good section for more details. OUT or cause damage to the LT8494 regulator . tolerance. Table 3 assumes that all NC pins are floating. Figure 3. VIN Undervoltage Lockout
8494 F03
Table 3. Effects of Pin Shorts (TSSOP) 1.202V if BIAS is connected to the output. PG/SS 7/8 No effect or output will fall below regulation. Table 4. Effects of Floating Pins (TSSOP) FB 2, 3 No effect if the other FB pad is soldered. RT 10 Output may fall below regulation. SWEN 12 Enable state of the pin becomes undefined. Output will not exceed regulation voltage. GND 14 No effect if Exposed Pad is soldered. SW 10 Output will fall below regulation voltage. degradation of device performance. LT8494 that may exceed its absolute maximum rating. circuitry to prevent interplane coupling and overall noise. nents should be separated from the switch current path. Figure 4. High Speed Chopped Switching Path for Boost Topology Figure 5. High Speed Chopped Switching Path for
8494 F04
8494 F05
Figure 6. Suggested Component Placement for Boost Topology Figure 7. Suggested Component Placement for SEPIC Topology
8494 F07
8494 F06
8494faFor more information www.linear .com/L T8494 TYPICAL APPLICATIONS 750kHz, 16V to 32V Input, 48V Output, 0.5A Boost Converter 450kHz, 5V Output SEPIC Converter (Same as Front Page Application) 22µH C1: 2.2µF , 50V , X5R, 1206 C2: 4.7µF , 100V , X7R, 1210 D1: ONSEMI MBRA2H100 L1: WURTH LHMI 74437349220 0.2µF 10pF VIN 16V TO 32V VOUT 48V 0.5A SW FB BIASGND VIN SWEN RT PG SS 25.5k
8494 TA02a
93.1k L T8494 4.7µF 2.2µF LOAD CURRENT (mA) 100 200 300 400 500 100 EFFICIENCY (%)
8494 TA02b
VIN = 24V 200µs/DIV
8494 TA02d
0.5V/DIV AC-COUPLED IL 0.5A/DIV VIN = 24V 96/uni03A9 LOAD 5ms/DIV
8494 TA02e
0.5V/DIV IL 0.5A/DIV Efficiency, VIN = 24V T ransient Response with 400mA to 500mA to 400mA Output Load Step Start-Up Waveforms 15µH C1: 4.7µF , 100V , X5R, 1206 C3: 2.2µF , 100V , X5R, 1206 C2: TAIYO YUDEN, EMK325BJ476MM-T D1: ONSEMI MBRA2H100 L1, L2: COIL TRONICS DRQ125-150-R 1µF 4.7pF VIN 3V TO 60V (3V TO 32V FOR START-UP) VOUT 0.35A (V IN = 3V) 0.6A (VIN = 5V) 1.0A (VIN > 12V) SW BIAS FBGND VIN SWEN RT PG SS 316k
8494 TA02c
47µF 2.2µF 4.7µF 15µH
8494fa For more information www.linear .com/L T8494 TYPICAL APPLICATIONS Wide Input and Output Range SEPIC Converter with Charge Pump Switches at 400kHz 22µH L1, L2: COILCRAFT MSD1260T-223ML C1: 2.2µF , 50V , X5R, 1206 C2, C7-C10: TAIYO YUDEN GMK325C7106KMHT , 10µF 35V , X7S, 1210 C3: 3.3µF , 100V , X7R, 1210 D1-D4: FAIRCHILD 0540 D5-D7: ON-SEMI MBRA2H100 R1: 1.2/uni03A9, 0.5W , SMD, 2010 1µF VIN 6V TO 38V (6V TO 32V FOR STARTUP) VOUT 20V to 60V 80mA SW BIAS FB PGGND VIN SWEN RT SS
8494 TA03a
10µF 10µF 10µF 2.2µF 3.3µF 22µH 26.7k 78.7k 0.1V TO 3.2V 1.2/uni03A9 10µF C10 10µF DAC (SET DAC TO 3.2V FOR START-UP) OUTPUT ADJUST
8494faFor more information www.linear .com/L T8494 TYPICAL APPLICATIONS Li-Ion to 12V, Low Quiescent Current Boost at 650kHz Low Quiescent Current, 5V to 300V, 250kHz Flyback Converter DANGER HIGH VOL TAGE! Operation by High Voltage T rained Personnel Only 6.8µH C1: 4.7µF , 6.3V , X7R, 1206 C2: 47µF , 16V , X5R, 1210 D1: ONSEMI MBRM120L T1G L1: WURTH LHMI 74437346068 1µF VIN 2.8V TO 4.1V VOUT 12V 0.2A SW FB BIASGND VIN SWEN RT PG SS 110k
8494 TA04a
47µF 4.7µF 14.7µH *KEEP MAXIMUM OUTPUT POWER BELOW 0.6W C1: 2.2µF , 25V , X5R, 1206 C2: TDK C3225CH2J223K D1: VISHAY GSD2004S DUAL DIODE CONNECTED IN SERIES D2: ON SEMICONDUCTOR MBRA2H100 T1: WURTH-FLEX FLEXIBAL TRANSFORMER 749196121 D1T1 1:5 1µF VIN VOUT 300V 2mA SW FB BIASGND VIN SWEN RT PG SS 12.1k
8494 TA05
2.2µF LOAD CURRENT (mA) 0.2 100 200 EFFICIENCY (%)
8494 TA04b
Efficiency, VIN = 3.3V 2mA LOAD 5ms/DIV
8494 TA05b
0.5A/DIV 2mA LOAD 2µs/DIV
8494 TA05c
0.5V/DIV IPRIMARY 1A/DIV Switching WaveformsStart-Up Waveforms
8494fa For more information www.linear .com/L T8494 TYPICAL APPLICATIONS 1.5MHz, 12V Output SEPIC Converter 4.7µH 4.7µH C1, C3: 2.2µF , 50V , X5R, 1206 C2: TAIYO YUDEN TMK325BJ106MM D1: DENTRAL SEMI CMMSH2-40 L1, L2: COIL TRONICS DRQ74-4R7 1µF 4.7pF VIN 9V TO 16V VOUT 12V 0.5ASW BIAS FBGND VIN SWEN RT PG SS 110k
8494 TA08a
41.2k L T8494 10µF 2.2µF 2.2µF D1 LOAD CURRENT (mA) 100 200 300 400 500
8498 TA08b
EFFICIENCY (%) POWER LOSS (mW) POWER LOSS EFFICIENCY Efficiency, VIN = 12V
8494faFor more information www.linear .com/L T8494 PACKAGE DESCRIPTION Please refer to http://www.linear .com/product/LT8494#packaging for the most recent package drawings. 4.00 ±0.10 4.00 ±0.10 NOTE: 1. DRAWING IS PROPOSED TO BE MADE A JEDEC PACKAGE OUTLINE MO-220 VARIATION (WGGD-1)—TO BE APPROVED 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE PIN 1 TOP MARK (NOTE 6) 0.40 ±0.10 20 19 BOTTOM VIEW—EXPOSED PAD
2.00 REF
2.45 ±0.10 0.75 ±0.05 R = 0.115 TYP R = 0.05 TYP 0.25 ±0.05
0.50 BSC
0.200 REF
0.00 – 0.05 (UF20) QFN 01-07 REV A RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 0.70 ±0.05 0.25 ±0.05 2.00 REF 2.45 ±0.05 3.10 ±0.05 4.50 ±0.05 PACKAGE OUTLINE PIN 1 NOTCH R = 0.20 TYP OR 0.35 × 45° CHAMFER 2.45 ±0.10 2.45 ±0.05 20-Lead Plastic QFN (4mm × 4mm) (Reference LTC DWG # 05-08-1710 Rev A)
8494fa For more information www.linear .com/L T8494 PACKAGE DESCRIPTION Please refer to http://www.linear .com/product/LT8494#packaging for the most recent package drawings. FE20 (CB) TSSOP REV L 0117 0.09 – 0.20 (.0035 – .0079) 0° – 8° 0.25 REF RECOMMENDED SOLDER PAD LAYOUT 0.50 – 0.75 (.020 – .030) 4.30 – 4.50* (.169 – .177) 1 3 4 5 6 7 8 9 10 DETAIL A DETAIL A IS THE PART OF THE LEAD FRAME FEATURE FOR REFERENCE ONLY NO MEASUREMENT PURPOSE 11 12 14 13 6.40 – 6.60* (.252 – .260) 3.86 (.152) 2.74 (.108) 20 1918 17 16 15 1.20 (.047) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 2.74 (.108) 0.45 ±0.05
0.65 BSC
4.50 ±0.10 6.60 ±0.10 1.05 ±0.10 3.86 (.152) MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 6.40 (.252) BSC 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663 Rev L) Exposed Pad Variation CB DETAIL A 0.60 (.024) REF 0.28 (.011) REF
8494faFor more information www.linear .com/L T8494 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However , no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER A 06/17 Clarified input conditions on top application 19, 24
8494fa For more information www.linear .com/L T8494 LINEAR TECHNOLOGY CORPORATION 2015 LT 0617 REV A • PRINTED IN USA www.linear .com/L T8494 RELATED PARTS TYPICAL APPLICATION 450kHz, Wide Input Range 12V Output SEPIC Converter PART NUMBER DESCRIPTION COMMENTS LT8495 70V, 2A Boost/SEPIC 1.5MHz High Efficiency DC/DC Converter with POR and Watchdog Timer VIN: 2.5V to 32V, VOUT(MAX) = 70V, IQ = 9µA, ISD < 1µA, 4mm × 4mm QFN20, TSSOP-20E Packages LT3580 42V, 2A Boost/Inverting 2.5MHz High Efficiency DC/DC Converter VIN: 2.5V to 32V, VOUT(MAX) = ±40V, IQ = 1mA, ISD < 1µA, 3mm × 3mm DFN-8, MSOP-8E Packages LT8580 65V, 1A Boost/Inverting DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD < 1µA, 3mm × 3mm DFN-8, MSOP-8E Packages LT8570/ LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD < 1µA, 3mm × 3mm DFN-8, MSOP-8E Packages LT8582 40V, Dual 3A, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 40V, VOUT(MAX) = ±40V, IQ = 2.8mA, ISD < 1µA, 7mm × 4mm DFN-24 Package LT8471 40V, Dual 3A, Multitopology High Efficiency DC/DC Converter VIN: 2.6V to 50V, VOUT(MAX) = ±45V, IQ = 2.4mA, ISD < 1µA, LT3581 40V, 3.3A, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 40V, VOUT(MAX) = ±40V, IQ = 1mA, ISD < 1µA, 4mm × 3mm DFN-14, MSOP-16E Packages LT8582 40V, Dual 3A Boost, Inverter , SEPIC, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 40V, VOUT(MAX) = ±40V, IQ = 2.1mA, ISD < 1µA, 7mm × 4mm DFN-24 Package LT3579/ LT3579-1 40V, 3.3A Boost, Inverter , SEPIC, 2.5MHz High Efficiency Boost Converter VIN: 2.5V to 40V, VOUT(MAX) = ±40V, IQ = 1mA, ISD < 1µA, 4mm × 5mm QFN-20, TSSOP-20E Packages 2.2µF D1 10µH 10µH 1µF VIN 3V TO 55V (3V TO 32V FOR START-UP) VOUT 12V 0.2A (V IN = 3V) 0.35A (VIN = 5V) 0.65A (VIN > 12V) SW BIAS FBGND VIN SWEN RT PG SS 110k
8494 TA06a
10µF 2.2µF C1, C3: 2.2µF , 100V , X5R, 1210 C2: 10µF , 25V , X5R, 1210 D1: ONSEMI MBRA2H100 L1, L2: COIL TRONICS DRQ125-100-R (VOUT RIPPLE MAY INCREASE BELOW 6V VIN) V IN = 12V V IN = 24V V IN = 5V LOAD CURRENT (A) 0.0 0.1 0.2 0.3 0.4 0.5 0.6 EFFICIENCY (%)
8494 TA06b
INPUT VOL TAGE (V) 100 SUPPL Y CURRENT (µA)