LT8362

LT8362 (Rev. B)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 32

Technical content

Rev. BFor more information www.analog.com Document Feedback

DESCRIPTION

FEATURES

Low IQ Boost/SEPIC/Inverting Converter with 2A, 60V Switch The LT®8362 is a current mode DC/DC converter with a 60V, 2A switch operating from a 2.8V to 60V input. With a unique single feedback pin architecture it is capable of boost, SEPIC or inverting configurations. Burst Mode operation consumes as low as 9µA quiescent current to maintain high efficiency at very low output currents, while keeping typical output ripple below 15mV. An external compensation pin allows optimization of loop bandwidth over a wide range of input and output volt - ages and programmable switching frequencies between 300kHz and 2MHz. A SYNC/MODE pin allows synchroni- zation to an external clock. It can also be used to select between burst or pulse-skipping modes of operation with or without Spread Spectrum Frequency Modulation for low EMI. For increased efficiency, a BIAS pin can accept a second input to supply the INTV CC regulator . Additional features include frequency foldback and programmable soft-start to control inductor current during start-up. The LT8362 is available in a thermally enhanced 10-lead 3mm × 3mm DFN package or a thermally enhanced 16-lead MSOP package with four pins removed. 2MHz, 48V Output Boost Converter

APPLICATIONS

n Wide Input Voltage Range: 2.8V to 60V n Ultralow Quiescent Current and Low Ripple Burst Mode® Operation: IQ = 9µA n 2A, 60V Power Switch n Positive or Negative Output Voltage Programming with a Single Feedback Pin n Programmable Frequency (300kHz to 2MHz) n Synchronizable to an External Clock n Spread Spectrum Frequency Modulation for Low EMI n BIAS Pin for Higher Efficiency n Programmable Undervoltage Lockout (UVLO) n Thermally Enhanced 10-Lead 3mm × 3mm DFN and 16-Lead MSOP packages n AEC-Q100 Qualified for Automotive Applications n Industrial and Automotive n Telecom n Medical Diagnostic Equipment n Portable Electronics All registered trademarks and trademarks are the property of their respective owners. Efficiency and Power Loss

8362 TA01a

34.8k 57.6k 150pF 20k 1µF VIN SW EN/UVLO L T8362 VIN 8V TO 38V VOUT 48V 200mA AT VIN = 8V 320mA AT VIN = 12V 700mA AT VIN = 24V 6.8/uni03BCH SYNC/MODE FBX BIAS SS GND VC 4.7µF 4.7µF RT INTVCC 10nF 4.7pF EFFICIENCY POWER LOSS V IN = 12V V IN = 24V LOAD CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 100 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 EFFICIENCY (%) POWER LOSS (W)

8362 TA01b

Rev. B For more information www.analog.com ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8362EMSE#PBF LT8362EMSE#TRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8362IMSE#PBF LT8362IMSE#TRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8362HMSE#PBF LT8362HMSE#TRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 150°C LT8362EDD#PBF LT8362EDD#TRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT8362IDD#PBF LT8362IDD#TRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT8362HDD#PBF LT8362HDD#TRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 150°C AUTOMOTIVE PRODUCTS** LT8362EMSE#WPBF LT8362EMSE#WTRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8362IMSE#WPBF LT8362IMSE#WTRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 125°C LT8362HMSE#WPBF LT8362HMSE#WTRPBF 8362 16-Lead Plastic MSOP with 4 Pins Removed –40°C to 150°C LT8362EDD#WPBF LT8362EDD#WTRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT8362IDD#WPBF LT8362IDD#WTRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT8362HDD#WPBF LT8362HDD#WTRPBF LGWZ 10-Lead (3mm × 3mm) Plastic DFN –40°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS (Note 1) O perating Junction Temperature (Note 3) LT8 C to 125°C LT8 150°C C to 150°C EN/UVLO V IN INTVCC NC BIAS VC SW1 SW2 SYNC/MODE SS RT FBX TOP VIEW PGND, GND MSE PACKAGE VARIATION: MSE16 (12) 16-LEAD PLASTIC MSOP θ JA = 45°C/W , θJC = 10°C/W EXPOSED PAD (PIN 17) IS PGND AND GND, MUST BE SOLDERED TO PCB TOP VIEW DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN θJA = 43°C/W EXPOSED PAD (PIN 11) IS PGND AND GND, MUST BE SOLDERED TO PCB 1 SW SYNC/MODE SS RT FBX EN/UVLO V IN INTVCC BIAS VC PGND, GND

Rev. BFor more information www.analog.com PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Operating Voltage Range l 2.8 60 V VIN Quiescent Current at Shutdown V EN/UVLO = 0.2V l μA μA V EN/UVLO = 1.5V l μA μA V IN Quiescent Current Sleep Mode (Not Switching) SYNC = 0V l μA μA Active Mode (Not Switching) SYNC = 0V or INT VCC, BIAS = 0V l 1200 1200 1600 1850 µA µA SYNC = 0V or INT VCC, BIAS = 5V l µA µA BIAS Threshold Rising, BIAS Can Supply INTV CC Falling, BIAS Cannot Supply INTVCC 4.4 4.65 4.25 V V V IN Falling Threshold to Supply INTVCC BIAS = 12V BIAS – 2V V BIAS Falling Threshold to Supply INTVCC VIN = 12V VIN V FBX Regulation FBX Regulation Voltage FBX > 0V FBX < 0V l l 1.568 –0.822 1.6 –0.80 1.636 –0.780 V V FBX Line Regulation FBX > 0V, 2.8V < VIN < 60V FBX < 0V, 2.8V < VIN < 60V 0.005 0.005 0.015 0.015 %/V %/V FBX Pin Current FBX = 1.6V, –0.8V l –10 10 nA Oscillator Switching Frequency (fOSC) RT = 165k RT = 45.3k RT = 20k l l l 265 0.90 1.85 300 327 1.08 2.15 kHz MHz MHz SSFM Maximum Frequency Deviation ( ∆f/f OSC) • 100, RT = 20k 14 20 28 % Minimum On-Time Burst Mode, VIN = 24V (Note 6) Pulse-Skip Mode, VIN = 24V (Note 6) ns ns Minimum Off-Time l 50 75 ns SYNC/Mode, Mode Thresholds (Note 5) High (Rising) Low (Falling) l l 0.14 1.3 0.2 1.7 V V SYNC/Mode, Clock Thresholds (Note 5) Rising Falling l l 0.4 1.3 0.8 1.7 V V f SYNC/fOSC Allowed Ratio RT = 20k 0.95 1 1.25 kHz/kHz SYNC Pin Current SYNC = 2V SYNC = 0V, Current Out of Pin µA µA Switch Maximum Switch Current Limit Threshold l 2 2.5 3.1 A Switch Overcurrent Threshold Discharges SS Pin 3.75 A Switch RDS(ON) ISW = 0.5A 165 mΩ Switch Leakage Current VSW = 60V 0.1 1 µA ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted.

Rev. B For more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: INTV CC cannot be externally driven. No additional components or loading is allowed on this pin. Note 3: The LT8362E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8362I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT8362H is guaranteed over the full –40°C to 150°C operating junction temperature range. Note 4: The IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime. Note 5: For SYNC/MODE inputs required to select modes of operation see the Pin Functions and Applications Information sections. Note 6: The IC is tested in a Boost converter configuration with the output voltage programmed for 24V. PARAMETER CONDITIONS MIN TYP MAX UNITS EN/UVLO Logic EN/UVLO Pin Threshold (Rising) Start Switching l 1.576 1.68 1.90 V EN/UVLO Pin Threshold (Falling) Stop Switching l 1.555 1.6 1.645 V EN/UVLO Pin Current VEN/UVLO = 1.6V l –50 50 nA Soft-Start Soft-Start Charge Current SS = 0.5V 2 µA Soft-Start Pull-Down Resistance Fault Condition, SS = 0.1V 220 Ω Error Amplifier Error Amplifier T ransconductance FBX = 1.6V FBX = –0.8V µA/V µA/V Error Amplifier Voltage Gain FBX = 1.6V FBX = –0.8V 185 145 V/V V Error Amplifier Max Source Current VC = 1.1V, Current Out of Pin 7 µA Error Amplifier Max Sink Current VC = 1.1V 7 µA

Rev. BFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Frequency vs Temperature Switching Frequency vs VIN Normalized Switching Frequency vs FBX Voltage Switch Current Limit vs Duty Cycle Switch Minimum On-Time vs Temperature Switch Minimum Off-Time vs Temperature FBX Positive Regulation Voltage vs Temperature FBX Negative Regulation Voltage vs Temperature EN/UVLO Pin Thresholds vs Temperature JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.568 1.576 1.584 1.592 1.600 1.608 1.616 1.624 1.632 FBX VOL TAGE (V)

8362 G01

V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 –0.820 –0.815 –0.810 –0.805 –0.800 –0.795 –0.790 –0.785 –0.780 FBX VOL TAGE (V)

8362 G02

V IN = 12V EN/UVLO RISING (TURN–ON) EN/UVLO FALLING (TURN–OFF) JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.54 1.56 1.58 1.60 1.62 1.64 1.66 1.68 1.70 1.72 1.74 EN/UVLO PIN VOL TAGE (V)

8362 G03

JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.90 1.92 1.94 1.96 1.98 2.00 2.02 2.04 2.06 2.08 2.10 SWITCHING FREQUENCY (MHz)

8362 G04

V IN = 12V V IN (V) 1.90 1.92 1.94 1.96 1.98 2.00 2.02 2.04 2.06 2.08 2.10 SWITCHING FREQUENCY (MHz)

8362 G05

VOL TAGE (V) –0.8 –0.4 0.0 0.4 0.8 1.2 1.6 100 125 NORMALIZED SWITCHING FREQUENCY (%)

8362 G06

V IN = 12V DUTY CYCLE (%) 100 2.0 2.1 2.2 2.3 2.4 2.5 2.6 2.7 2.8 2.9 3.0 SWITCH CURRENT LIMIT (A)

8362 G07

V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 100 MINIMUM ON TIME (ns)

8362 G08

V IN = 12V V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 100 MINIMUM OFF TIME (ns)

8362 G09

Rev. B For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Waveforms (in CCM) Switching Waveforms (in DCM/Light Burst Mode) Switching Waveforms (in Deep Burst Mode) Burst Frequency vs Load Current V OUT T ransient Response: Load Current T ransients from 160mA to 320mA to 160mA V OUT T ransient Response: Load Current T ransients from 80mA to 320mA to 80mA V IN Pin Current (Sleep Mode, Not Switching) vs Temperature VIN Pin Current (Active Mode, Not Switching, Bias = 0V) vs Temperature V IN Pin Current (Active Mode, Not Switching, Bias = 5V) vs Temperature V IN = 12V V BIAS = 0V V SYNC_MODE = 0V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 V IN PIN CURRENT (µA)

8362 G10

V IN = 12V V BIAS = 0V V SYNC_MODE = FLOAT JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 V IN PIN CURRENT (mA)

8362 G11

V IN = 12V V BIAS = 5V V SYNC_MODE = FLOAT JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 V IN PIN CURRENT (µA)

8362 G12

1µs/DIV V SW 20V/DIV I L 500mA/DIV

8362 G13

1µs/DIV V SW 20V/DIV I L 500mA/DIV

8362 G14

1µs/DIV V SW 20V/DIV I L 500mA/DIV

8362 G15

V IN = 12V V OUT = 48V FRONT PAGE APPLICATION 100µs/DIV V OUT 500mV/DIV I OUT 200mA/DIV

8362 G16

V IN = 12V V OUT = 48V FRONT PAGE APPLICATION 100µs/DIV V OUT 500mV/DIV I OUT 200mA/DIV

8362 G17

LOAD CURRENT (mA) 0.5 1.0 1.5 2.0 2.5 SWITCHING FREQUENCY (MHz)

8362 G18

V IN = 12V V OUT = 48V FRONT PAGE APPLICATION

Rev. BFor more information www.analog.com PIN FUNCTIONS EN/UVLO: Shutdown and Undervoltage Detect Pin. The LT8362 is shut down when this pin is low and active when this pin is high. Below an accurate 1.6V threshold, the part enters undervoltage lockout and stops switching. This allows an undervoltage lockout (UVLO) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin. An 80mV pin hysteresis ensures part switching resumes when the pin exceeds 1.68V. EN/UVLO pin voltage below 0.2V reduces V IN current below 1µA. If shutdown and UVLO features are not required, the pin can be tied directly to system input. VIN: Input Supply. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the VIN pin, and the negative terminal as close as possible to the exposed pad PGND copper (near EN/UVLO). INTVCC: Regulated 3.2V Supply for Internal Loads. The INTVCC pin must be bypassed with a 1µF low ESR ceramic capacitor to GND. No additional components or loading is allowed on this pin. INTVCC draws power from the BIAS pin if 4.4V ≤ BIAS ≤ VIN, otherwise INTVCC is powered by the VIN pin. NC: No Internal Connection. Leave this pin open. BIAS: Second Input Supply for Powering INTV CC. Removes the majority of INTVCC current from the VIN pin to improve efficiency when 4.4V ≤ BIAS ≤ VIN. If unused, tie the pin to GND. VC: Error Amplifier Output Pin. Tie external compensation network to this pin. FBX: Voltage Regulation Feedback Pin for Positive or Negative Outputs. Connect this pin to a resistor divider between the output and the exposed pad GND copper (near FBX). FBX reduces the switching frequency during start-up and fault conditions when FBX is close to 0V. RT: A resistor from this pin to the exposed pad GND cop- per (near FBX) programs switching frequency. SS: Soft-Start Pin. Connect a capacitor from this pin to GND copper (near FBX) to control the ramp rate of induc- tor current during converter start-up. SS pin charging current is 2μA. An internal 220Ω MOSFET discharges this pin during shutdown or fault conditions. SYNC/MODE: This pin allows five selectable modes for optimization of performance. SYNC/MODE Pin Input Capable Mode(s) of Operation (1) GND or <0.14V Burst (2) External Clock Pulse-skip/Sync (3) 100k Resistor to GND Burst/SSFM (4) Float (pin open) Pulse-skip (5) INTVCC or >1.7V Pulse-skip/SSFM where the selectable modes of operation are, Burst = low IQ, low output ripple operation at light loads Pulse-skip = skipped pulse(s) at light load (aligned to clock) Sync = switching frequency synchronized to external clock SSFM = Spread Spectrum Frequency Modulation for low EMI SW1, SW2 (SW): Output of the Internal Power Switch. Minimize the metal trace area connected to these pins to reduce EMI. PGND,GND: Power Ground and Signal Ground for the IC. The package has an exposed pad underneath the IC which is the best path for heat out of the package. The pin should be soldered to a continuous copper ground plane under the device to reduce die temperature and increase the power capability of the LT8362. Connect power ground components to the exposed pad copper exiting near the EN/UVLO and SW pins. Connect signal ground components to the exposed pad copper exiting near the VC and FBX pins.

Rev. B For more information www.analog.com BLOCK DIAGRAM 8362 BD OPT VBIAS (+) VBIAS – 2V(–) 4.4V(+) 4.0V(–) 3.2V REGULATOR SW1 OSCILLATOR ERROR AMP SELECT FREQUENCY FOLDBACK INTVCC UVLO SWITCH LOGIC BURST DETECT SLOPE DRIVER INTVCC TJ > 170°C 1.68V(+) 1.6V(–) INTERNAL REFERENCE UVLO C IN SW2 BIAS OPT VIN COUT CVCC DL VOUT UVLO RT SYNC/MODE OVER- CURRENT OVERCURRENT PGND/GND ERROR AMP ERROR AMP SLOPE 1.6VFBX VOUT –0.8V MAX ILIMIT 1.5× MAX I LIMIT RSENSE PWM COMPARATOR ISS 2/uni03BCA SS CSS RC VC CC EN/UVLO VIN UVLO SW

Rev. BFor more information www.analog.com OPERATION The LT8362 uses a fixed frequency, current mode con- trol scheme to provide excellent line and load regulation. Operation can be best understood by referring to the Block Diagram. An oscillator (with frequency programmed by a resistor at the RT pin) turns on the internal power switch at the beginning of each clock cycle. Current in the induc- tor then increases until the current comparator trips and turns off the power switch. The peak inductor current at which the switch turns off is controlled by the voltage on the V C pin. The error amplifier servos the VC pin by com- paring the voltage on the FBX pin with an internal refer - ence voltage (1.60V or –0.80V, depending on the chosen topology). When the load current increases it causes a reduction in the FBX pin voltage relative to the internal ref- erence. This causes the error amplifier to increase the VC pin voltage until the new load current is satisfied. In this manner , the error amplifier sets the correct peak switch current level to keep the output in regulation. The LT8362 is capable of generating either a positive or negative output voltage with a single FBX pin. It can be configured as a boost or SEPIC converter to generate a positive output voltage, or as an inverting converter to generate a negative output voltage. When configured as a Boost converter , as shown in the Block Diagram, the FBX pin is pulled up to the internal bias voltage of 1.60V by a voltage divider (R1 and R2) connected from V OUT to GND. Amplifier A2 becomes inactive and amplifier A1 performs (inverting) amplification from FBX to V C. When the LT8362 is in an inverting configuration, the FBX pin is pulled down to –0.80V by a voltage divider from V OUT to GND. Amplifier A1 becomes inactive and amplifier A2 performs (non-inverting) amplification from FBX to V If the EN/UVLO pin voltage is below 1.6V, the LT8362 enters undervoltage lockout (UVLO), and stops switch - ing. When the EN/UVLO pin voltage is above 1.68V (typi- cal), the LT8362 resumes switching. If the EN/UVLO pin voltage is below 0.2V, the LT8362 draws less than 1µA from VIN. For the SYNC/MODE pin tied to ground or < 0.14V, the LT8362 will enter low output ripple Burst Mode opera- tion for ultra low quiescent current during light loads to maintain high efficiency. For a 100k resistor from SYNC/ MODE pin to GND, the LT8362 uses Burst Mode opera - tion for improved efficiency at light loads but seamlessly transitions to Spread-Spectrum Modulation of switch - ing frequency for low EMI at heavy loads. For the SYNC/ MODE pin floating (left open), the LT8362 uses pulse- skipping mode, at the expense of hundreds of microamps, to maintain output voltage regulation at light loads by skipping switch pulses. For the SYNC/MODE pin tied to INTV CC or >1.7V, the LT8362 uses pulse-skipping mode and performs Spread-Spectrum Modulation of switching frequency. For the SYNC/MODE pin driven by an external clock, the converter switching frequency is synchronized to that clock and pulse-skipping mode is also enabled. See the Pin Functions section for SYNC/MODE pin. The LT8362 includes a BIAS pin to improve efficiency across all loads. The LT8362 intelligently chooses between the VIN and BIAS pins to supply the INTVCC for best effi- ciency. The INTV CC supply current can be drawn from the BIAS pin instead of the VIN pin for 4.4V ≤ BIAS ≤ VIN. Protection features ensure the immediate disable of switching and reset of the SS pin for any of the following faults: internal reference UVLO, INTVCC UVLO, switch cur- rent > 1.5× maximum limit, EN/UVLO < 1.6V or junction temperature > 170°C.

Figure 1. Burst Frequency vs Load Current minimizing the input quiescent current and output ripple. capacitance will decrease the output ripple proportionally. Figure 2. Burst Mode Operation defined by the resistor at the RT pin as shown in Figure 1. operation. A logic input can also control the EN/UVLO pin. minimize their effect on efficiency at light loads.

8362 F01

8362 F02

rents required by the internal power MOSFET gate driver . (to stop switching and reset soft-start) is typically 2.5V. with a local ceramic capacitor . Table 1. SW Frequency vs RT Value (this can be ground or a logic low output). clock, but instead will pulse skip to maintain regulation. tained at lower output load than in Burst Mode operation. ies the clock with a triangle frequency modulation of 20%. the switching frequency programmed using the RT pin.

Rev. B For more information www.analog.com DUTY CYCLE CONSIDERATION The LT8362 minimum on-time, minimum off-time and switching frequency (fOSC) define the allowable minimum and maximum duty cycles of the converter (see Minimum On-Time, Minimum Off-Time, and Switching Frequency in the Electrical Characteristics table). Minimum Allowable Duty Cycle = Minimum On-Time(MAX) • fOSC(MAX) Maximum Allowable Duty Cycle = 1 – Minimum Off-Time(MAX) • fOSC(MAX) The required switch duty cycle range for a Boost converter operating in continuous conduction mode (CCM) can be calculated as: DMIN = 1 – VIN(MAX) VOUT + VD DMAX = 1 – VIN(MIN) VOUT + VD where VD is the diode forward voltage drop. If the above duty cycle calculations for a given application violate the minimum and/or maximum allowed duty cycles for the LT8362 , operation in discontinuous conduction mode (DCM) might provide a solution. For the same VIN and VOUT levels, operation in DCM does not demand as low a duty cycle as in CCM. DCM also allows higher duty cycle operation than CCM. The additional advantage of DCM is the removal of the limitations to inductor value and duty cycle required to avoid sub-harmonic oscilla - tions and the right half plane zero (RHPZ). While DCM provides these benefits, the trade-off is higher inductor peak current, lower available output power and reduced efficiency. SETTING THE OUTPUT VOL TAGE The output voltage is programmed with a resistor divider from the output to the FBX pin. Choose the resistor values for a positive output voltage according to: R1 = R2 • VOUT 1.60V –1⎛ Choose the resistor values for a negative output voltage according to: R1 = R2 • |VOUT| 0.80V –1⎛ The locations of R1 and R2 are shown in the Block Diagram. 1% resistors are recommended to maintain output voltage accuracy. Higher-value FBX divider resistors result in the lowest input quiescent current and highest light-load efficiency. FBX divider resistors R1 and R2 are usually in the range from 25k to 1M. SOFT-START The LT8362 contains several features to limit peak switch currents and output voltage (V OUT) overshoot during start-up or recovery from a fault condition. The primary purpose of these features is to prevent damage to external components or the load. High peak switch currents during start-up may occur in switching regulators. Since V OUT is far from its final value, the feedback loop is saturated and the regulator tries to charge the output capacitor as quickly as possible, resulting in large peak currents. A large surge current may cause inductor saturation or power switch failure. The LT8362 addresses this mechanism with a programma- ble soft-start function. As shown in the Block Diagram, the soft-start function controls the ramp of the power switch current by controlling the ramp of V C through Q1. This allows the output capacitor to be charged gradually toward its final value while limiting the start-up peak currents. Figure 3 shows the output voltage and supply current for the first page Typical Application. It can be seen that both the output voltage and supply current come up gradually. APPLICATIONS INFORMATION

Figure 3. Soft-Start Waveforms the Typical Performance Characteristics section). the part will stop switching and go into thermal lockout. regulate the output which simplifies loop compensation. network is usually connected from the V C pin to GND. including load current, input voltage and temperature. Application Note 76 is a good reference.

8362 F03

Rev. B For more information www.analog.com APPLICATIONS INFORMATION APPLICATION CIRCUITS The LT8362 can be configured for different topologies. The first topology to be analyzed will be the boost con - verter , followed by the SEPIC and inverting converters. Boost Converter: Switch Duty Cycle The LT8362 can be configured as a boost converter for the applications where the converter output voltage is higher than the input voltage. Remember that boost con- verters are not short-circuit protected. Under a shorted output condition, the inductor current is limited only by the input supply capability. For applications requiring a step-up converter that is short-circuit protected, please refer to the Applications Information section covering SEPIC converters. The conversion ratio as a function of duty cycle is: VOUT VIN = 1 1 − D in continuous conduction mode (CCM). For a boost converter operating in CCM, the duty cycle of the main switch can be calculated based on the output voltage (V OUT) and the input voltage (VIN). The maximum duty cycle (D MAX) occurs when the converter has the minimum input voltage: DMAX = VOUT − VIN(MIN) VOUT Discontinuous conduction mode (DCM) provides higher conversion ratios at a given frequency at the cost of reduced efficiencies, higher switching currents, and lower available output power . Boost Converter: Maximum Output Current Capability and Inductor Selection For the boost topology, the maximum average inductor current is: IL(MAX)(AVE)= IO(MAX) • 1 1 − DMAX

• 1 η where η (< 1.0) is the converter efficiency. Due to the current limit of its internal power switch, the LT8362 should be used in a boost converter whose maxi- mum output current (IO(MAX)) is: IO(MAX) ≤ VIN(MIN) VOUT
• 2A − 0.5 • ΔISW( ) • η Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. The inductor ripple current ∆ISW has a direct effect on the choice of the inductor value and the converter’s maximum output current capability. Choosing smaller values of SW increases output current capability, but requires large inductances and reduces the current loop gain (the converter will approach voltage mode). Accepting larger values of ∆ISW provides fast transient response and allows the use of low inductances, but results in higher input current ripple and greater core losses, and reduces output current capability. It is recommended to choose a SW of approximately 0.75A. Given an operating input voltage range, and having cho- sen the operating frequency and ripple current in the inductor , the inductor value of the boost converter can be determined using the following equation: L = VIN(MIN) ΔISW • fOSC
• DMAX The peak inductor current is the switch current limit (max- imum 3.1A), and the RMS inductor current is approxi - mately equal to IL(MAX)(AVE). Choose an inductor that can handle at least 3.1A without saturating, and ensure that the inductor has a low DCR (copper-wire resistance) to minimize I 2R power losses. Note that in some applications, the current handling requirements of the inductor can be lower , such as in the SEPIC topology where each inductor only carries one- half of the total switch current. For better efficiency, use similar valued inductors with a larger volume. Many dif - ferent sizes and shapes are available from various manu- facturers (see Table 2). Choose a core material that has

switching frequency and converter efficiency.

• 2•D–1( ) 1–D( ) Lower L values are allowed if the inductor current oper - ates in DCM or duty cycle operation is below 50%.

Table 2. Inductor Manufacturers be provided with a low performance electrolytic capacitor . cerns the maximum input voltage rating of the LT8362. easily avoided (see Application Note 88). Figure 4. The Output Ripple Waveform of a Boost Converter

8362 F04

high frequency switching noise on the converter output. capacitor at audio frequencies, generating audible noise. ceramic capacitors are also available. Table 3. Ceramic Capacitor Manufacturers A Schottky diode is recommended for use with the LT8362. reverse voltage ratings for the target applications. Table 4. Recommended Schottky Diodes DFLS260 2 60 20 Diodes, Inc. ground plane for better thermal performance.

in continuous conduction mode (CCM). from the input source when the circuit is in shutdown. Figure 5. Suggested Boost Converter Layout

8362 F05

Figure 6. LT8362 Configured in a SEPIC Topology

8362 F06

are specified in the Electrical Characteristics table.

8362 F07

Figure 7. The Switch Current Waveform of the SEPIC Converter loop gain (the converter will approach voltage mode).

Rev. BFor more information www.analog.com Due to the current limit of its internal power switch, the LT8362 should be used in a SEPIC converter whose maxi- mum output current (IO(MAX)) is: IO(MAX) < (1 – DMAX) • (2A – 0.5 • ∆ISW) • η where η (< 1.0) is the converter efficiency. Minimum possible inductor value and switching frequency should also be considered since they will increase inductor ripple current ∆ISW. Given an operating input voltage range, and having cho- sen ripple current in the inductor , the inductor value (L1 and L2 are independent) of the SEPIC converter can be determined using the following equation: L1 = L2 = VIN(MIN) 0.5 • ΔISW • fOSC

• DMAX For most SEPIC applications, the equal inductor values will fall in the range of 2.2µH to 100µH. By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: L = VIN(MIN) ΔISW • fOSC
• DMAX This maintains the same ripple current and energy storage in the inductors. The peak inductor currents are: IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1 IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2 The maximum RMS inductor currents are approximately equal to the maximum average inductor currents. Based on the preceding equations, the user should choose the inductors having sufficient saturation and RMS cur - rent ratings. Similar to Boost converters, the SEPIC converter also needs slope compensation to prevent subharmonic oscillations while operating in CCM. The equation presented in the Boost converter section defines the minimum inductance value to avoid sub-harmonic oscillations when coupled inductors are used. For uncoupled inductors, the minimum inductance requirement is doubled. SEPIC Converter: Output Diode Selection To maximize efficiency, a fast switching diode with a low forward drop and low reverse leakage is desirable. The average forward current in normal operation is equal to the output current. It is recommended that the peak repetitive reverse voltage rating VRRM is higher than V OUT + V IN(MAX) by a safety margin (a 10V safety margin is usually sufficient). The power dissipated by the diode is: PD = IO(MAX) • VD where VD is diode’s forward voltage drop, and the diode junction temperature is: TJ = TA + PD • RθJA The RθJA used in this equation normally includes the RθJC for the device, plus the thermal resistance from the board, to the ambient temperature in the enclosure. TJ must not exceed the diode maximum junction temperature rating. SEPIC Converter: Output and Input Capacitor Selection The selections of the output and input capacitors of the SEPIC converter are similar to those of the boost converter . APPLICATIONS INFORMATION

in continuous conduction mode (CCM). negative output voltage (VOUT) and the input voltage (VIN). are specified in the Electrical Characteristics table. Figure 8. A Simplified Inverting Converter

8362 F10

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION Inverting Converter: Output Capacitor Selection The inverting converter requires much smaller output capacitors than those of the boost, flyback and SEPIC converters for similar output ripples. This is due to the fact that, in the inverting converter , the inductor L2 is in series with the output, and the ripple current flowing through the output capacitors are continuous. The output ripple voltage is produced by the ripple current of L2 flow- ing through the ESR and bulk capacitance of the output capacitor: ΔVOUT(P–P) = ΔIL2 • ESR COUT + 1 8 • fOSC • COUT After specifying the maximum output ripple, the user can select the output capacitors according to the preceding equation. The ESR can be minimized by using high quality X5R or X7R dielectric ceramic capacitors. In many applications, ceramic capacitors are sufficient to limit the output volt- age ripple. The RMS ripple current rating of the output capacitor needs to be greater than: IRMS(COUT) > 0.3 • ∆IL2 Inverting Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 8) should be larger than the maximum input voltage minus the output voltage (negative voltage): VCDC > VIN(MAX) +| VOUT| CDC has nearly a rectangular current waveform. During the switch off-time, the current through CDC is IIN, while approximately –IO flows during the on-time. The RMS rating of the coupling capacitor is determined by the fol- lowing equation: IRMS(CDC) >IO(MAX) • DMAX 1 − DMAX A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC.

Rev. B For more information www.analog.com TYPICAL APPLICATIONS 2MHz, 8V to 38V Input, 48V Boost Converter 4.7pF 4.7µF 34.8k 1µF 20k 10nF 150pF 57.6k 6.8µH 4.7µF 50V 1210 V OUT 48V 200mA AT VIN = 8V 320mA AT VIN = 12V 700mA AT VIN = 24V V IN FBX BIAS GND EN/UVLO L T8362

8362 TA02

V IN 8V TO 38V SW SYNC/MODE INTV CC R T SS V C D1: DIODES INC. DFLS260 L1: WURTH ELEKTRONIK 74437349068 C3: MURATA GRM32ER71H475k 2MHz, 2.8V to 9V Input, 12V Boost Converter

8362 TA03

4.7µF 154k 4.7pF 1µF 20k 10nF 680pF 36.5k 2.2µH 10µF V OUT 12V 300mA AT V IN = 2.8V 600mA AT V IN = 5V 1.1A AT VIN = 9V V IN BIAS FBX GND EN/UVLO L T8362 V IN 2.8V TO 9V D1: NXP PMEG2020EJ SW SYNC/MODE INTV CC R T SS V C L1: WURTH ELEKTRONIK 74437349022 C3: MURATA GRM31CR71E106KA12L Efficiency V IN = 2.8V V IN = 5V V IN = 9V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 100 EFFICIENCY (%)

8362 TA03a

V IN = 12V V IN = 24V LOAD CURRENT (A) 0.001 0.01 0.1 100 EFFICIENCY (%)

8362 TA02a

Rev. BFor more information www.analog.com TYPICAL APPLICATIONS 2MHz, 4V to 19V Input, 24V Boost Converter 2MHz, 2.8V to 6V Input, 48V Boost Converter in DCM 4.7pF 4.7µF 71.5k 1µF 20k 10nF 330pF 36.5k 4.7µH 4.7µF 1210 V OUT 24V 500mA AT V IN = 8V 700mA AT V IN = 12V 1.24A AT VIN = 19V V IN FBX BIAS GND EN/UVLO L T8362 V IN 4V TO 19V D1: NXP PMEG3020EPA SW SYNC/MODE INTV CC R T SS V C L1: WURTH ELEKTRONIK 74437349047 C3: MURATA GRM32ER71H475k

8362 TA04

4.7pF 4.7µF 34.8k 1µF 20k 10nF 680pF 36.5k 0.33µH 1µF 100V 1210 V OUT 48V 20mA AT V IN = 2.8V 22mA AT V IN = 5V 25mA AT V IN = 6V V IN FBX BIAS GND

8362 TA05

V IN 2.8V TO 6V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1: WURTH ELEKTRONIK 744373460033 C3: MURATA GRM32CR72A105KA35L Efficiency Efficiency V IN = 8V V IN = 12V V IN = 19V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 100 EFFICIENCY (%)

8362 TA04a

V IN = 2.8V V IN = 5V V IN = 6V LOAD CURRENT (mA) 100 EFFICIENCY (%)

8362 TA05a

Rev. B For more information www.analog.com TYPICAL APPLICATIONS 2MHz, 2.8V to 28V Input, 5V SEPIC Converter 464k 1µF 20k 10nF 680pF 36.5k 22µF 2.4µH 1µF 2.4µH 4.7pF 4.7µF V OUT 500mA AT V IN = 2.8V 750mA AT V IN = 5V 1A AT V IN = 12V 1.2A AT V IN = 28V V IN FBX BIAS GND

8362 TA06

V IN 2.8V TO 28V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878002 C3: TAIYO YUDEN TMK325B7226MMHP C6: MURATA GRM31CR72A105K V OUT Efficiency 2MHz, 2.8V to 42V Input, 12V SEPIC Converter 4.7µF 154k 1µF 20k 10nF 680pF 36.5k 10µF 4.7µH 1µF 4.7µH 4.7pF V OUT 12V 125mA AT V IN = 2.8V 460mA AT V IN = 5V 760mA AT V IN = 12V 1A AT V IN = 24V 1A AT V IN = 42V V IN FBX BIAS GND

8362 TA07

V IN 2.8V TO 42V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878004 C3: MURATA GRM31CR71E106KA12L C6: MURATA GRM31CR72A105K V OUT Efficiency V IN = 2.8V V IN = 5V V IN = 12V V IN = 28V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 100 EFFICIENCY (%)

8362 TA06a

V IN = 5V V IN = 12V V IN = 24V V IN = 42V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 100 EFFICIENCY (%)

8362 TA07a

Rev. BFor more information www.analog.com TYPICAL APPLICATIONS 2MHz, 4.5V to 30V Input, 24V SEPIC Converter 71.5k 1µF 20k 10nF 680pF 36.5k 6.8µH 1µF 6.8µH 4.7pF 10µF 4.7µF V OUT 24V 260mA AT VIN = 5V 700mA AT VIN = 24V 500mA AT V IN = 12V 700mA AT VIN = 30V V IN FBX BIAS GND

8362 TA08

V IN 4.5V TO 30V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878006 C3: MURATA GRM31CR71E106KA12L C6: MURATA GRM31CR72A105K V OUT 2MHz, 2.8V to 28V Input, –5V Inverting Converter 191k 1µF 20k 10nF 680pF 36.5k 22µF 2.4µH 1µF 2.4µH 4.7pF 4.7µF V OUT –5V 500mA AT V IN = 2.8V 750mA AT V IN = 5V 1A AT VIN = 12V 1.2A AT VIN = 28V V IN FBX BIAS GND

8362 TA09

V IN 2.8V TO 28V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878002 C3: TAIYO YUDEN TMK325B7226MMHP C6: MURATA GRM31CR72A105K Efficiency Efficiency V IN = 5V V IN = 12V V IN = 24V V IN = 30V LOAD CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 100 EFFICIENCY (%)

8362 TA08a

V IN = 2.8V V IN = 5V V IN = 12V V IN = 28V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 100 EFFICIENCY (%)

8362 TA09a

Rev. B For more information www.analog.com TYPICAL APPLICATIONS 2MHz, 2.8V to 42V Input, –12V Inverting Converter 2MHz, 4.5V to 30V Input, –24V Inverting Converter 71.5k 1µF 20k 10nF 680pF 36.5k 10µF 4.7pF 4.7µH 1µF 4.7µH 4.7µF V OUT –12V 125mA AT V IN = 2.8V 760mA AT V IN = 12V 1A AT VIN = 24V 1A AT VIN = 42V 460mA AT V IN = 5V V IN FBX BIAS GND

8362 TA10

V IN 2.8V TO 42V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878004 C3: MURATA GRM31CR71E106KA12L C6: MURATA GRM31CR72A105K Efficiency Efficiency V IN = 5V V IN = 12V V IN = 24V V IN = 42V LOAD CURRENT (A) 0.2 0.4 0.6 0.8 1.0 1.2 100 EFFICIENCY (%)

8362 TA10a

V IN = 5V V IN = 12V V IN = 24V V IN = 30V LOAD CURRENT (A) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 100 EFFICIENCY (%)

8362 TA11a

34.8k 1µF 20k 10nF 680pF 36.5k 10µF 4.7pF 6.8µH 1µF 6.8µH 4.7µF V OUT –24V 260mA AT V IN = 5V 700mA AT V IN = 24V 700mA AT V IN = 30V 500mA AT V IN = 12V V IN FBX BIAS GND

8362 TA11

V IN 4.5V TO 30V D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1, L2: WURTH ELEKTRONIK 744878006 C3: MURATA GRM31CR71E106KA12L C6: MURATA GRM31CR72A105K

Rev. BFor more information www.analog.com TYPICAL APPLICATIONS 10µF 34.8k 1µF 20k 10nF 1nF 22.1k 6.8µH 0.1µF FB2 0.1µF 100k 4.7µF 10µF C11 4.7pF V OUT 48V V IN FBX BIAS GND EN/UVLO L T8362 V IN D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1: WURTH ELEKTRONIK 74437324068 L2: WURTH ELEKTRONIK 74479876147 FB1: WURTH ELEKTRONIK 742792040 C6: 50CE33PCS INPUT EMI FIL TER 0.47µH OUTPUT EMI FIL TER 50V 1206 33µF 100V 0402 100V 0402

8362 TA12

= 12V 700mA AT V IN = 24V C10 0.1µF 100V 0402 Conducted EMI Performance (CISPR25 Class 5 Peak) Conducted EMI Performance (CISPR25 Class 5 Average) Radiated EMI Performance (CISPR25 Class 5 Peak) Radiated EMI Performance (CISPR25 Class 5 Average) Low IQ, Low EMI, 2MHz, 48V Output Boost Converter with SSFM 12V INPUT TO 48V OUTPUT AT 300mA, f SW = 2MHz CLASS 5 PEAK LIMIT L T8362 2MHz f SW PEAK EMI FREQUENCY (MHz) –20 –10 AMPLITUDE (dBµV)

8362 TA12a

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 2MHz CLASS 5 AVERAGE LIMIT L T8362 2MHz f SW AVERAGE EMI FREQUENCY (MHz) –20 –10 AMPLITUDE (dBµV)

8362 TA12b

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 2MHz CLASS 5 PEAK LIMIT L T8362 2MHz f SW PEAK EMI FREQUENCY (MHz) 100 200 300 400 500 600 700 800 900 1000 –20 –10 AMPLITUDE (dBµV/m)

8362 TA12c

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 2MHz CLASS 5 AVERAGE LIMIT L T8362 2MHz f SW AVERAGE EMI FREQUENCY (MHz) 100 200 300 400 500 600 700 800 900 1000 –20 –10 AMPLITUDE (dBµV/m)

8362 TA12d

Rev. B For more information www.analog.com TYPICAL APPLICATIONS Conducted EMI Performance (CISPR25 Class 5 Peak) Conducted EMI Performance (CISPR25 Class 5 Average) Radiated EMI Performance (CISPR25 Class 5 Peak) Radiated EMI Performance (CISPR25 Class 5 Average) 10µF 34.8k

8362 TA13

1µF 121k 10nF 1nF 22.1k 22µH 82µF FB1 100k 4.7µF 50V 1206 C10 0.1µF 100V 0402 C11 4.7pF V OUT 48V V IN FBX BIAS GND EN/UVLO L T8362 V IN D1: DIODES INC. DFLS260 SW SYNC/MODE INTV CC R T SS V C L1: WURTH ELEKTRONIK 74437346220 L2: WURTH ELEKTRONIK 74437324022 FB1: WURTH ELEKTRONIK 742792040 C6: PANASONIC 35SVPF82M INPUT EMI FIL TER 2.2µH OUTPUT EMI FIL TER 1µF 100V 0402 0.1µF 100V 0402 10µF 50V 1210 50V 1206 4V TO 35V 300mA AT V IN = 12V 700mA AT V IN = 24V Low IQ, Low EMI, 400kHz, 48V Boost Converter with SSFM 12V INPUT TO 48V OUTPUT AT 300mA, f SW = 400kHz CLASS 5 PEAK LIMIT L T8362 400kHz f SW PEAK EMI FREQUENCY (MHz) –20 –10 AMPLITUDE (dBµV)

8362 TA13a

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 400kHz CLASS 5 AVERAGE LIMIT L T8362 400kHz f SW AVERAGE EMI FREQUENCY (MHz) –20 –10 AMPLITUDE (dBµV)

8362 TA13b

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 400kHz CLASS 5 PEAK LIMIT L T8362 400kHz f SW PEAK EMI FREQUENCY (MHz) 100 200 300 400 500 600 700 800 900 1000 –20 –10 AMPLITUDE (dBµV/m)

8362 TA13c

12V INPUT TO 48V OUTPUT AT 300mA, f SW = 400kHz CLASS 5 AVERAGE LIMIT L T8362 400kHz f SW AVERAGE EMI FREQUENCY (MHz) 100 200 300 400 500 600 700 800 900 1000 –20 –10 AMPLITUDE (dBµV/m)

8362 TA13d

Rev. BFor more information www.analog.com PACKAGE DESCRIPTION 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.125 TYP 2.38 ±0.10 (2 SIDES) 106 PIN 1 TOP MARK (SEE NOTE 6)

0.200 REF

0.00 – 0.05 (DD) DFN REV C 0310 0.25 ±0.05 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.15 ±0.05 0.50 BSC 0.70 ±0.05 3.55 ±0.05 PACKAGE OUTLINE 0.25 ±0.05

0.50 BSC

10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER

Rev. B For more information www.analog.com PACKAGE DESCRIPTION MSOP (MSE16(12)) 0213 REV D 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.17 –/uni00A00.27 (.007 – .011) TYP 0.86 (.034) REF 0.50 (.0197) BSC 1.0 (.039) BSC 1.0 (.039) BSC 16 14 121110 1 3 5 6 7 8 1 8 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL NOT EXCEED 0.254mm (.010") PER SIDE. 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.305 ±0.038 (.0120 ±.0015) TYP 0.50 (.0197) BSC BOTTOM VIEW OF EXPOSED PAD OPTION 2.845 ±0.102 (.112 ±.004) 2.845 ±0.102 (.112 ±.004) 4.039 ±0.102 (.159 ±.004) (NOTE 3) 1.651 ±0.102 (.065 ±.004) 1.651 ±0.102 (.065 ±.004) 0.1016 ±0.0508 (.004 ±.002) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.280 ±0.076 (.011 ±.003) REF 4.90 ±0.152 (.193 ±.006) DETAIL “B” DETAIL “B” CORNER TAIL IS PART OF THE LEADFRAME FEATURE. FOR REFERENCE ONL Y NO MEASUREMENT PURPOSE

0.12 REF

0.35 REF Variation: MSE16 (12) 16-Lead Plastic MSOP with 4 Pins Removed Exposed Die Pad (Reference LTC DWG # 05-08-1871 Rev D)

Rev. BFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 12/17 Removed Lead Temperature line from Absolute Maximum Ratings. Corrected Electrical Characteristics table SSFM Maximum Frequency Deviation Condition. Corrected fSYNC/fOSC units. Corrected Soft-Start Charge Current Condition to 0.5V. Inverting Converter Section: Added, + |V OUT| to equation. Added efficiency graph to 48V Boost Converter circuit. Removed 200mA output current line from schematic. Corrected Conducted EMI Y axis units on both plots. Removed 100mA and 200mA output current lines from schematic. Edited circuit: Added lower FB resistor , shorted BIAS pin to GND. Corrected Conducted EMI Y axis units on both plots. B 02/21 Added automotive versions. Edited Electrical Characteristics table and Block Diagram. Updated Figure 5. Suggested Boost Converter Layout. Edited equations. 1, 2 3, 8

Rev. B For more information www.analog.com  ANALOG DEVICES, INC. 2017-2021 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT8300 100VIN Micropower Isolated Flyback Converter with 150V/260mA Switch VIN = 6V to 100V, Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23 LT8330 60V, 1A, Low IQ Boost/SEPIC/Inverting 2MHz Converter V IN = 3V to 40V, VOUT(MAX) = 60V, IQ = 6µA (Burst Mode Operation), 6-Lead TSOT-23, 3mm × 2mm DFN packages LT8331 Low IQ Boost/SEPIC/Flyback/Inverting Converter with 140V/0.5A Switch VIN = 4.5V to 100V, VOUT(MAX)=140V, IQ = 6µA (Burst Mode Operation), MSOP-16(12)E LT8335 28V, 2A, Low IQ Boost/SEPIC/Inverting 2MHz Converter V IN = 3V to 25V, VOUT(MAX) = 25V, IQ = 6µA (Burst Mode Operation), 3mm × 2mm DFN package LT8494 70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up DC/DC Converter VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3µA (Burst Mode Operation), ISD = <1µA, 20-Lead TSSOP LT8570/LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter V IN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD = <1mA, 3mm × 3mm DFN-8, MSOP-8E LT8580 1A (ISW), 65V, 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E 2MHz, Low-IQ Automotive Pre-Boost Application Line T ransient Response (Pass-Through to Boosting) 4.7µF 250k

8362 TA14

1µF 20k 10nF 150pF 57.6k 1.5µH 22µF 4.7pF V OUT 8V (while boosting) 500mA AT V IN = 2.8V V IN FBX BIAS GND EN/UVLO L T8362 V IN 2.8V TO 20V D1: NXP PMEG2020EJ L1: WURTH ELEKTRONIK 74437349015 C3: TAIYO YUDEN TMK325B7226MMHP SW SYNC/MODE INTV CC R T SS V C V IN = 14V to 3V (20V/ms) V OUT = 8V , I OUT = 0.5A 100µs/DIV V OUT 5V/DIV V IN 5V/DIV

8362 TA14a