LT8330

LT8330 (Rev. C)

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 24

Technical content

Rev. DFor more information www.analog.comDocument Feedback TYPICAL APPLICATION FEATURES DESCRIPTION Low IQ Boost/SEPIC/ Inverting Converter with 1A, 60V Switch The LT®8330 is a current mode DC/DC converter capable of generating either positive or negative output voltages using a single feedback pin . It can be configured as a boost, SEPIC or inverting converter consuming as low as 6µA of quiescent current. Low ripple Burst Mode opera- tion maintains high efficiency down to very low output currents while keeping the output ripple below 15mV in a typical application. The internally compensated current mode architecture results in stable operation over a wide range of input and output voltages . Integrated soft-start and frequency foldback functions are included to control inductor current during start-up . The LT8330 comes in small package options that, combined with a high switching frequency of 2MHz, help maintain a small foot print for an overall efficient, space-saving and cost effective solution. 48V Boost Converter

APPLICATIONS

n 3V to 40V Input Voltage Range n Ultralow Quiescent Current and Low Ripple Burst Mode® Operation: IQ = 6µA n 1A, 60V Power Switch n Positive or Negative Output Voltage Programming with a Single Feedback Pin n Fixed 2MHz Switching Frequency n Accurate 1.6V EN/UVLO Pin Threshold n Internal Compensation and Soft-Start n Low Profile (1mm) ThinSOT™ Package n Low Profile (0.75mm) 8-Lead (3mm × 2mm) DFN Package n DFN Package is AEC-Q100 Qualified n Industrial and Automotive n Telecom n Medical Diagnostic Equipment n Portable Electronics Efficiency and Power Loss EFFICIENCY POWER LOSS LOAD CURRENT (mA) 120 160 100 100 200 300 400 500 600 700 800 900 1000 EFFICIENCY (%) POWER LOSS (mW)

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4.7µF 34.8k 4.7µF 1µF 4.7pF V IN SW FBX GND EN/UVLO L T8330 VIN 12V 6.8µH VOUT 48V 135mA V CC INT All registered trademarks and trademarks are the property of their respective owners.

Rev. D For more information www.analog.com ABSOLUTE MAXIMUM RATINGS (Note 1) ORDER INFORMATION Lead Free Finish TAPE AND REEL (MINI) TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8330ES6#TRMPBF LT8330ES6#TRPBF L TGMQ 6-Lead Plastic TSOT-23 –40°C to 125°C LT8330IS6#TRMPBF LT8330IS6#TRPBF L TGMQ 6-Lead Plastic TSOT-23 –40°C to 125°C LT8330JS6#TRMPBF LT8330JS6#TRPBF L TGMQ 6-Lead Plastic TSOT-23 –40°C to 150°C LT8330HS6#TRMPBF LT8330HS6#TRPBF L TGMQ 6-Lead Plastic TSOT-23 –40°C to 150°C LT8330EDDB#TRMPBF LT8330EDDB#TRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LT8330IDDB#TRMPBF LT8330IDDB#TRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LT8330JDDB#TRMPBF LT8330JDDB#TRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 150°C LT8330HDDB#TRMPBF LT8330HDDB#TRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 150°C AUTOMOTIVE PRODUCTS** LT8330EDDB#WTRMPBF LT8330EDDB#WTRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LT8330IDDB#WTRMPBF LT8330IDDB#WTRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 125°C LT8330JDDB#WTRMPBF LT8330JDDB#WTRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 150°C LT8330HDDB#WTRMPBF LT8330HDDB#WTRPBF LGRC 8-Lead (3mm × 2mm) Plastic DFN –40°C to 150°C TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container. Contact the factory for parts specified with wider operating temperature ranges. Contact the factory for information on lead based finish parts. Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models. TOP VIEW DDB PACKAGE 8-LEAD (3mm × 2mm) PLASTIC DFN θJA = 60°C/W EXPOSED PAD (PIN 9) IS GND, MUST BE SOLDERED TO PCB 1FBX NC SW SW EN/UVLO INTVCC VIN GND TOP VIEW S6 PACKAGE 6-LEAD PLASTIC TSOT-23 θJA = 125°C/W , θJC = 102°C/W VIN INTVCC EN/UVLO SW GND FBX PIN CONFIGURATION Operating Junction Temperature (Note 3)

Rev. DFor more information www.analog.com ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VIN = 12V, EN/UVLO = 12V unless otherwise noted. PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Operating Voltage Range l 3 40 V VIN Quiescent Current at Shutdown VEN/UVLO = 0.2V l 0.9 µA µA VEN/UVLO = 1.5V l 3.6 9.5 µA µA VIN Quiescent Current Sleep Mode, Not Switching l 5.5 8.5 µA µA Active Mode, Not Switching l 780 840 1100 1200 µA µA FBX Regulation FBX Regulation Voltage FBX > 0V FBX < 0V l l 1.568 –0.820 1.6 –0.80 1.632 –0.780 V V FBX Line Regulation FBX > 0V, 3V < VIN < 40V FBX < 0V, 3V < VIN < 40V 0.005 0.005 0.015 0.015 %/V %/V FBX Pin Current FBX = 1.6V, –0.8V l –10 10 nA Oscillator Switching Frequency (fOSC) VIN = 24V l 1.85 2.0 2.15 MHz Minimum On-Time VIN = 24V 65 105 ns Minimum Off-Time VIN = 24V 47 65 ns Switch Maximum Switch Current Limit Threshold l 1.0 1.2 1.4 A Switch RDS(ON) ISW = 0.5A 330 mΩ Switch Leakage Current VSW = 60V 0.1 1 µA EN/UVLO Logic EN/UVLO Pin Threshold (Rising) Start Switching l 1.620 1.68 1.745 V EN/UVLO Pin Threshold (Falling) Stop Switching l 1.556 1.60 1.644 V EN/UVLO Pin Current VEN/UVLO = 1.6V l –40 100 nA Soft-Start Soft-Start Time VIN = 24V 1 ms Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: INTVCC cannot be externally driven. No additional components or loading is allowed on this pin. Note 3: The LT8330E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C to 125°C operating junction temperature range are assured by design, characterization and correlation with statistical process controls. The LT8330I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT8330J and LT8330H are guaranteed over the full –40°C to 150°C operating junction temperature range. High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: The IC includes overtemperature protection that is intended to protect the device during overload conditions. Junction temperature will exceed 150°C when overtemperature protection is active. Continuous operation above the specified maximum operating junction temperature will reduce lifetime.

Rev. D For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Frequency vs Temperature Switching Frequency vs VIN Normalized Switching Frequency vs FBX Voltage Switch Current Limit vs Duty Cycle Switch Minimum On-Time vs Temperature Switch Minimum Off-Time vs Temperature FBX Positive Regulation Voltage vs Temperature FBX Negative Regulation Voltage vs Temperature EN/UVLO Pin Thresholds vs Temperature V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.570 1.580 1.590 1.600 1.610 1.620 1.630 FBX VOL TAGE (V)

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V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 –0.815 –0.810 –0.805 –0.800 –0.795 –0.790 –0.785 FBX VOL TAGE (V)

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V IN = 24V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.90 1.92 1.94 1.96 1.98 2.00 2.02 2.04 2.06 2.08 2.10 SWITCHING FREQUENCY (MHz)

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V IN (V) 1.85 1.90 1.95 2.00 2.05 2.10 2.15 SWITCHING FREQUENCY (MHz)

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V IN = 24V FBX VOL TAGE (V) –0.8 –0.4 0.0 0.4 0.8 1.2 1.6 100 125 NORMALIZED SWITCHING FREQUENCY (%)

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V IN = 12V DUTY CYCLE (%) 100 1.00 1.10 1.20 1.30 1.40 SWITCH CURRENT LIMIT (A)

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V IN = 24V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 100 MINIMUM ON–TIME (ns)

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V IN = 24V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 MINIMUM OFF–TIME (ns)

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V IN = 12V EN/UVLO RISING (TURN-ON) EN/UVLO FALLING (TURN-OFF) JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.54 1.56 1.58 1.60 1.62 1.64 1.66 1.68 1.70 1.72 1.74 EN/UVLO PIN VOL TAGE (V)

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Rev. DFor more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Waveforms (in CCM) Switching Waveforms (in DCM/Light Burst Mode) Switching Waveforms (in Deep Burst Mode) VOUT T ransient Response: Load Current T ransients from 67.5mA to 135mA to 67.5mA VIN Pin Current (Sleep Mode, Not Switching) vs Temperature VIN Pin Current (Active Mode, Not Switching) vs Temperature Burst Frequency vs Load Current VOUT T ransient Response: Load Current T ransients from 5mA to 135mA to 5mA V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 1.25 2.50 3.75 5.00 6.25 7.50 8.75 10.00 V IN PIN CURRENT (µA)

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V IN = 12V JUNCTION TEMPERATURE (°C) –50 –25 100 125 150 175 600 650 700 750 800 850 900 950 1000 V IN PIN CURRENT (µA)

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V IN = 12V V OUT = 48V FRONT PAGE APPLICATION LOAD CURRENT (mA) 0.5 1.0 1.5 2.0 2.5 SWITCHING FREQUENCY (MHz)

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V IN = 12V , V OUT = 48V , I LOAD = 135mA 1µs/DIV FRONT PAGE APPLICATION V SW 20V/DIV IL 500mA/DIV

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V IN = 12V , V OUT = 48V , I LOAD = 20mA 1µs/DIV FRONT PAGE APPLICATION V SW 20V/DIV

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V IN = 12V , V OUT = 48V , I LOAD = 2mA 1µs/DIV FRONT PAGE APPLICATION V SW 20V/DIV

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V IN = 12V V OUT = 48V 100µs/DIV V OUT 500mV/DIV IL 100mA/DIV

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V IN = 12V V OUT = 48V 100µs/DIV V OUT 500mV/DIV IL 100mA/DIV

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Rev. D For more information www.analog.com PIN FUNCTIONS EN/UVLO: Shutdown and Undervoltage Detect Pin . The LT8330 is shut down when this pin is low and active when this pin is high. Below an accurate 1.6V threshold the part enters undervoltage lockout and stops switching. This allows an undervoltage lockout (UVLO) threshold to be programmed for system input voltage by resistively dividing down system input voltage to the EN/UVLO pin. An 80mV pin hysteresis ensures part switching resumes when the pin exceeds 1.68V. EN/UVLO pin voltage below 0.2V reduces V IN current below 1µA. If shutdown and UVLO features are not required, the pin can be tied directly to system input. FBX: Voltage Regulation Feedback Pin for Positive or Negative Outputs. Connect this pin to a resistor divider between the output and GND. FBX reduces the switching frequency during start-up and fault conditions when FBX is close to GND. GND: Ground Connection for the LT8330. The DFN pack- age has the best thermal performance due to an exposed pad (Pin 9) on the bottom of the package . This exposed pad must be soldered to a ground plane. Pin 5 of the DFN package (and Pin 2 of the TSOT package) should also be connected to a ground plane. The ground plane should be connected to large copper layers to spread heat dissipated by the LT8330. INTVCC: Regulated 3V Supply for Internal Loads . The INTVCC pin must be bypassed with a minimum 1µF low ESR ceramic capacitor to ground. No additional components or loading is allowed on this pin. NC: No Internal Connection. Tie directly to local ground. SW: The Output of Internal Power Switch . Minimize the metal trace area connected to this pin to reduce EMI. VIN: Input Supply. This pin must be locally bypassed. Be sure to place the positive terminal of the input capacitor as close as possible to the VIN pin, and the negative terminal as close as possible to the GND pin.

Rev. DFor more information www.analog.com BLOCK DIAGRAM GND 8330 BD ERROR AMP SELECT FREQUENCY FOLDBACK INTVCC UVLO OSCILLATOR 2MHz SWITCH LOGIC BURST DETECT ERROR AMP ERROR AMP SLOPE VC SLOPE SOFT-START 1.6V FBX VOUT –0.8V UVLO DRIVER ILIMIT RSENSE PWM COMPARATOR INTVCC TJ > 170°C A6 1.68V(+) 1.6V(–) EN/UVLO INTERNAL REFERENCE UVLO VIN CIN SW OPT OPT VIN COUT CVCC DL VOUT UVLO 3V REGULATOR

Rev. D For more information www.analog.com OPERATION The LT8330 uses a fixed frequency, current mode control scheme to provide excellent line and load regulation. Op- eration can be best understood by referring to the Block Diagram. An internal 2MHz oscillator turns on the internal power switch at the beginning of each clock cycle. Current in the inductor then increases until the current comparator trips and turns off the power switch . The peak inductor current at which the switch turns off is controlled by the voltage on the internal VC node. The error amplifier servos the VC node by comparing the voltage on the FBX pin with an internal reference voltage (1.60V or –0.80V, depending on the chosen topology). When the load current increases it causes a reduction in the FBX pin voltage relative to the internal reference. This causes the error amplifier to increase the VC voltage until the new load current is satis- fied. In this manner , the error amplifier sets the correct peak switch current level to keep the output in regulation. The LT8330 is capable of generating either a positive or negative output voltage with a single FBX pin . It can be configured as a boost or SEPIC converter to generate a positive output voltage , or as an inverting converter to generate a negative output voltage . When configured as a boost converter , as shown in the Block Diagram, the FBX pin is pulled up to the internal bias voltage of 1.60V by a voltage divider (R1 and R 2) connected from V OUT to GND. Amplifier A2 becomes inactive and amplifier A1 performs (inverting) amplification from FBX to VC. When the LT8330 is in an inverting configuration , the FBX pin is pulled down to –0.80V by a voltage divider from VOUT to GND. Amplifier A1 becomes inactive and amplifier A2 performs (non-inverting) amplification from FBX to VC. If the EN /UVLO pin voltage is below 1.6V, the LT8330 enters undervoltage lockout (UVLO), and stops switching. When the EN/UVLO pin voltage is above 1.68V (typical), the LT8330 resumes switching. If the EN/UVLO pin volt- age is below 0.2V, the LT8330 only draws 1µA from VIN. To optimize efficiency at light loads, the LT8330 operates in Burst Mode operation in light load situations. Between bursts, all circuitry associated with controlling the output switch is shut down , reducing the input supply current to 6µA. ACHIEVING UL TRALOW QUIESCENT CURRENT To enhance efficiency at light loads the LT8330 uses a low ripple Burst Mode architecture . This keeps the output capacitor charged to the desired output voltage while minimizing the input quiescent current and output ripple. In Burst Mode operation the LT8330 delivers single small pulses of current to the output capacitor followed by sleep periods where the output power is supplied by the output capacitor . While in sleep mode the LT8330 consumes only 6µA. As the output load decreases, the frequency of single cur- rent pulses decreases (see Figure 1) and the percentage of time the LT8330 is in sleep mode increases, resulting in much higher light load efficiency than for typical con - verters. To optimize the quiescent current performance at light loads, the current in the feedback resistor divider must be minimized as it appears to the output as load current. In addition , all possible leakage currents from Figure 1. Burst Frequency vs Load Current APPLICATIONS INFORMATION the output should also be minimized as they all add to the equivalent output load. The largest contributor to leakage current can be due to the reverse biased leakage of the Schottky diode (see Diode Selection in the Applications Information section). V IN = 12V V OUT = 48V FRONT PAGE APPLICATION LOAD CURRENT (mA) 0.5 1.0 1.5 2.0 2.5 SWITCHING FREQUENCY (MHz)

8330 F01

capacitance will decrease the output ripple proportionally. Figure 2. Burst Mode Operation at which the IC turns on and off (see the Block Diagram). operation. A logic input can also control the EN/UVLO pin. minimize their effect on efficiency at light loads. required by the internal power MOSFET gate driver. (to stop switching and reset soft start) is typically 2.5V. in the Electrical Characteristics table). available output power and reduced efficiency.

8330 F02

inductor saturation or power switch failure. its final value while limiting the start-up peak currents . the output voltage and supply current come up gradually. Figure 3. Soft-Start Waveforms VC and hence inductor peak current. the part will stop switching and go into thermal lockout .

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frequency and converter efficiency. Table 1. Inductor Manufacturers be provided with a low performance electrolytic capacitor. cerns the maximum input voltage rating of the LT8330. easily avoided (see Application Note 88). be used at the output to minimize the output ripple voltage. capacitor, can affect the stability of the overall system . and can generally be ignored. value for the zero frequency is between 30kHz to 60kHz. across the feedback resistor from output to FBX pin).

when used with the LT8330 due to their piezoelectric nature. eration, the noise is typically very quiet to a casual ear . capacitors are also available. Table 2. Ceramic Capacitor Manufacturers A Schottky diode is recommended for use with the LT8330. Figure 4. Suggested Layout – (a) ThinSOT, (b) DFN voltage ratings for the target applications. Table 3. Recommended Schottky Diodes mended component placement for the ThinSOT package. for the DFN package. Note the vias under the exposed pad.

8330 F04a 8330 F04b

Inverting converters are analyzed below. in continuous conduction mode (CCM). from the input source when the circuit is in shutdown. are specified in the Electrical Characteristics table. Figure 5. LT8330 Configured in a SEPIC Topology

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are applied to L1 and L2 throughout the switching cycle. loop gain (the converter will approach voltage mode ).

• DMAX For most SEPIC applications , the equal inductor values will fall in the range of 1µH to 47µH. By making L1 = L2, and winding them on the same core, the value of inductance in the preceding equation is replaced by 2L, due to mutual inductance: L = VIN(MIN) ΔISW •fOSC
• DMAX This maintains the same ripple current and energy storage in the inductors. The peak inductor currents are: IL1(PEAK) = IL1(MAX) + 0.5 • ∆IL1 IL2(PEAK) = IL2(MAX) + 0.5 • ∆IL2 The maximum RMS inductor currents are approximately equal to the maximum average inductor currents. APPLICATIONS INFORMATION

Figure 6. The Switch Current Waveform of the SEPIC Converter

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margin (a 10V safety margin is usually sufficient). exceed the diode maximum junction temperature rating. SEPIC converter are similar to those of the boost converter. in continuous conduction mode (CCM). negative output voltage (VOUT) and the input voltage (VIN). Figure 7. A Simplified Inverting Converter

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Rev. D For more information www.analog.com Be sure to check that DMAX and DMIN obey : DMAX < 1-Minimum Off-Time(MAX) • fOSC(MAX) and DMIN > Minimum On-Time(MAX) • fOSC(MAX) where Minimum Off-Time , Minimum On-Time and f OSC are specified in the Electrical Characteristics table. Inverting Converter: Inductor, Output Diode and Input Capacitor Selections The selections of the inductor , output diode and input capacitor of an inverting converter are similar to those of the SEPIC converter . Please refer to the corresponding SEPIC converter sections. Inverting Converter: Output Capacitor Selection The inverting converter requires much smaller output capacitors than those of the boost , flyback and SEPIC converters for similar output ripples. This is due to the fact that, in the inverting converter, the inductor L2 is in series with the output, and the ripple current flowing through the output capacitors are continuous. The output ripple voltage is produced by the ripple current of L 2 flowing through the ESR and bulk capacitance of the output capacitor: ΔVOUT(P–P) = ΔIL2 • ESRCOUT + 1 8 •f •COUT After specifying the maximum output ripple, the user can select the output capacitors according to the preceding equation. The ESR can be minimized by using high quality X 5R or X7R dielectric ceramic capacitors. In many applications, ceramic capacitors are sufficient to limit the output volt- age ripple. The RMS ripple current rating of the output capacitor needs to be greater than: IRMS(COUT) > 0.3 • ∆IL2 Inverting Converter: Selecting the DC Coupling Capacitor The DC voltage rating of the DC coupling capacitor (CDC, as shown in Figure 7) should be larger than the maximum input voltage minus the output voltage (negative voltage): VCDC > VIN(MAX) – VOUT CDC has nearly a rectangular current waveform . During the switch off-time, the current through CDC is IIN, while approximately –IO flows during the on-time . The RMS rating of the coupling capacitor is determined by the fol- lowing equation: IRMS(CDC) > IO(MAX) • DMAX 1– DMAX A low ESR and ESL, X5R or X7R ceramic capacitor works well for CDC. APPLICATIONS INFORMATION

Rev. DFor more information www.analog.com TYPICAL APPLICATIONS 48V Boost Converter 8V to 16V Input, 24V Boost Converter 3V to 6V Input, 48V Boost Converter 4.7µF 1µF 4.7pF V IN SW FBX GND EN/UVLO L T8330 V CC INT 4.7µF 34.8k 6.8µH D1: NXP PMEG6010CEJ L1: WÜRTH WE-MAPI 3015 74438335068 C3: MURATA GRM32ER71H475k

8330 TA02

71.5k 4.7µF 1µF V OUT V IN SW FBX GND EN/UVLO L T8330 8V TO 16V V IN 24V V CC INT 6.8µH 4.7µF D1: DIODES INC. SBR140S3 L1: WÜRTH WE-MAPI 3015 74438335068 C3: MURATA GRM32ER71H475k 4.7pF 287k 210mA AT V IN = 8V 320mA AT V IN = 12V 450mA AT V IN = 16V

8330 TA03

4.7µF 4.7µF V OUT V IN SW FBX GND EN/UVLO L T8330 3V TO 6V V IN 48V V CC INT 0.68µH 1µF D1: NXP PMEG6010CEJ L1: WÜRTH WE-MAPI 3012 744383340068 C3: MURATA GRM32ER71H475k 34.8k 12mA AT V IN = 3V 13mA AT V IN = 5V 14mA AT V IN = 6V

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V IN = 12V BOOST: V OUT = 48V LOAD CURRENT (mA) 120 160 100 EFFICIENCY (%)

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BOOST : V OUT = 24V V IN = 8V V IN = 12V V IN = 16V LOAD CURRENT (mA) 100 200 300 400 500 100 EFFICIENCY (%)

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BOOST : V OUT = 48V V IN = 3V V IN = 5V V IN = 6V LOAD CURRENT (mA) 100 EFFICIENCY (%)

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Rev. D For more information www.analog.com TYPICAL APPLICATIONS 3V to 6V Input, 24V Boost Converter 8V to 30V Input, 24V SEPIC Converter 71.5k 1µF V OUT V IN SW FBX GND EN/UVLO L T8330 3V TO 6V V IN 24V V CC INT 0.68µH 4.7µF 4.7µF D1: NXP PMEG6010CEJ L1: WÜRTH WE-MAPI 3012 744383340068 C3: MURATA GRM32ER71H475k 30mA AT V IN = 3V 34mA AT V IN = 5V 35mA AT V IN = 6V

8330 TA05

4.7µF 71.5k 4.7µF 1µF 4.7pF 1µF 6.8µH 287k V OUT V IN SW FBX GND EN/UVLO L T8330 8V TO 30V 6.8µH V IN 24V V CC INT D1: NXP PMEG6010CEJ L1: WÜRTH WE-TDC 8038 74489440068 C3: MURATA GRM32ER71H475k 160mA AT V IN = 8V 200mA AT V IN = 12V 250mA AT V IN = 24V 250mA AT V IN = 30V

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BOOST : V OUT = 24V V IN = 3V V IN = 5V V IN = 6V LOAD CURRENT (mA) 100 EFFICIENCY (%)

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SEPIC: V OUT = 24V V IN = 8V V IN = 12V V IN = 24V V IN = 30V LOAD CURRENT (mA) 120 180 240 300 100 EFFICIENCY (%)

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Rev. DFor more information www.analog.com TYPICAL APPLICATIONS 4V to 36V Input, 12V SEPIC Converter 4V to 16V Input, 5V SEPIC Converter 4.7µF 154k 4.7µF 1µF 4.7pF 1µF 4.7µH 4.7µH V OUT V IN SW FBX GND EN/UVLO L T8330 4V TO 36V V IN 12V V CC INT D1: NXP PMEG6010CEJ L1: WÜRTH WE-TDC 8038 74489440047 C3: MURATA GRM31CR61C475k 806k 170mA AT V IN = 4V 270mA AT V IN = 12V 280mA AT V IN = 24V 280mA AT V IN = 36V

8330 TA07

4.7µF 464k 4.7µF 1µF 4.7pF 1µF 2.7µH 2.7µH V OUT V IN SW FBX GND EN/UVLO L T8330 4V TO 16V V IN V CC INT D1: NXP PMEG6010CEJ L1: WÜRTH WE-TDC 8018 74489430027 C3: MURATA GRM21BR71C475k 806k 280mA AT V IN = 4V 300mA AT V IN = 5V 380mA AT V IN = 12V 380mA AT V IN = 16V

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SEPIC: V OUT = 12V V IN = 4V V IN = 12V V IN = 24V V IN = 36V LOAD CURRENT (mA) 120 180 240 300 100 EFFICIENCY (%)

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V IN = 4V V IN = 5V V IN = 12V V IN = 16V SEPIC: V OUT = 5V LOAD CURRENT (mA) 160 240 320 400 100 EFFICIENCY (%)

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Rev. D For more information www.analog.com TYPICAL APPLICATIONS 8V to 30V Input, –24V Inverting Converter 4V to 36V Input, –12V Inverting Converter 4V to 16V Input, –5V Inverting Converter 2.2µF 34.8k 4.7µF 1µF 4.7pF 1µF 287k V OUT V IN SW FBX GND EN/UVLO L T8330 8V TO 30V V IN –24V V CC INT D1: NXP PMEG6010CEJ L1: WÜRTH WE-TDC 8038 74489440068 C3: MURATA GRM32ER71H475k 6.8µH 6.8µH 160mA AT V IN = 8V 200mA AT V IN = 12V 250mA AT V IN = 24V 250mA AT V IN = 30V

8330 TA09

4.7µF 71.5k 4.7µF 1µF 4.7pF 1µF 806k V OUT V IN SW FBX GND EN/UVLO L T8330 4V TO 36V V IN –12V V CC INT D1: NXP PMEG6010CEJ L1: Coilcraft LPD5030-472MR C3: MURATA GRM21BR71C475k 4.7µH 4.7µH 170mA AT V IN = 4V 270mA AT V IN = 12V 280mA AT V IN = 24V 280mA AT V IN = 36V

8330 TA10

4.7µF 1µF 4.7pF 1µF 2.7µH 2.7µH 806k V OUT V IN SW FBX GND EN/UVLO L T8330 4V TO 16V V IN –5V V CC INT 4.7µF D1: NXP PMEG6010CEJ L1: WÜRTH WE-TDC 8018 74489430027 C3: MURATA GRM21BR71C475k 280mA AT V IN = 4V 300mA AT V IN = 5V 380mA AT V IN = 12V 380mA AT V IN = 16V

8330 TA11

INVERTING: V OUT = –24V V IN = 8V V IN = 12V V IN = 24V V IN = 30V LOAD CURRENT (mA) 120 180 240 300 100 EFFICIENCY (%)

8330 TA09b

INVERTING : V OUT = –12V V IN =4V V IN =12V V IN =24V V IN =36V LOAD CURRENT (mA) 120 180 240 300 100 EFFICIENCY (%)

8330 TA10b

INVERTING: V OUT = –5V V IN = 4V V IN = 5V V IN = 12V V IN = 16V LOAD CURRENT (mA) 160 240 320 400 100 EFFICIENCY (%)

8330 TA11b

Rev. DFor more information www.analog.com PACKAGE DESCRIPTION 2.00 ±0.10 NOTE: 1. DRAWING CONFORMS TO VERSION (WECD-1) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 0.56 ±0.05 0.75 ±0.05 R = 0.115 TYPR = 0.05 TYP 2.15 ±0.05 3.00 ±0.10 PIN 1 BAR TOP MARK (SEE NOTE 6)

0.200 REF

0 – 0.05 (DDB8) DFN 1116 REV C 0.25 ±0.05

0.50 BSC

R = 0.20 OR 0.25 × 45° CHAMFER 0.25 ±0.05 2.20 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 0.61 ±0.05 1.15 ±0.05 0.70 ±0.05 2.55 ±0.05 PACKAGE OUTLINE 8-Lead Plastic DFN (3mm × 2mm) (Reference LTC DWG # 05-08-1702 Rev C)

Rev. D For more information www.analog.com PACKAGE DESCRIPTION 1.50 – 1.75 (NOTE 4)2.80 BSC 0.30 – 0.45

6 PLCS (NOTE 3)

DATUM ‘A’ 0.09 – 0.20 (NOTE 3) S6 TSOT-23 0302

2.90 BSC

(NOTE 4)

0.95 BSC

1.90 BSC

0.80 – 0.90

1.00 MAX

0.01 – 0.100.20 BSC 0.30 – 0.50 REF PIN ONE ID NOTE: 1. DIMENSIONS ARE IN MILLIMETERS 2. DRAWING NOT TO SCALE 3. DIMENSIONS ARE INCLUSIVE OF PLATING 4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR 5. MOLD FLASH SHALL NOT EXCEED 0.254mm 6. JEDEC PACKAGE REFERENCE IS MO-193

3.85 MAX

0.62 MAX 0.95 REF RECOMMENDED SOLDER PAD LAYOUT PER IPC CALCULATOR 1.4 MIN2.62 REF

1.22 REF

(Reference LTC DWG # 05-08-1636)

Rev. DFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable . However , no responsibility is assumed by Analog Devices for its use , nor for any infringements of patents or other rights of third parties that may result from its use . Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices .

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 03/16 Corrected VIN Quiescent Current. Corrected Typographic Errors. 2, 22, 23 B 09/19 Added automotive models. Updated Equations in Inverting Converter Applications. C 04/21 Updated description. Added J-Grade. Changed EN/UVLO Pin Current spec from 40nA to 100nA. 2, 3 D 06/25 Updated Features. Updated Order Information.

Rev. D For more information www.analog.com  ANALOG DEVICES, INC. 2015–2025 www.analog.com RELATED PARTS TYPICAL APPLICATION 4.7µF 56.2k 4.7µF 1µF 1µF 1µF –VOUT V IN SW FBX GND EN/UVLO L T8330 8V TO 40V V IN –15V V CC INT D1, D2: NXP PMEG6010CEJ L1A, L1B, L1C: COIL TRONICS VP4-0075 C3, C4: MURATA GRM32ER71H475k 287k 4.7µF OUT +15V L1C 6µH L1B 6µH L1A 6µH LOAD 120mA AT V IN = 8V 160mA AT V IN = 24V 170mA AT V IN = 40V

8330 TA12

8V to 40V Input, ±15V Converter PART NUMBER DESCRIPTION COMMENTS LT1930/LT1930A 1A (ISW), 1.2MHz/2.2MHz High Efficiency Step-Up DC/DC Converter VIN = 2.6V to 16V, VOUT(MAX) = 34V, IQ = 4.2mA/5.5mA, ISD < 1µA, ThinSOT Package LT1935 2A (ISW), 40V, 1.2MHz High Efficiency Step-Up DC/DC Converter VIN = 2.3V to 16V, VOUT(MAX) = 38V, IQ = 3mA, ISD < 1µA, ThinSOT Package LT3467 1.1A (ISW), 1.3MHz High Efficiency Step-Up DC/DC Converter VIN = 2.4V to 16V, VOUT(MAX) = 40V, IQ = 1.2mA, ISD < 1µA, ThinSOT, 2mm × 3mm DFN Packages LT3580 2A (ISW), 42V, 2.5MHz, High Efficiency Step-Up DC/DC Converter VIN = 2.5V to 32V, VOUT(MAX) = 42V, IQ = 1mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E LT8494 70V, 2A Boost/SEPIC 1.5MHz High Efficiency Step-Up DC/DC Converter VIN = 1V to 60V (2.5V to 32V Start-Up), VOUT(MAX) = 70V, IQ = 3µA (Burst Mode operation), ISD = <1µA, 20-Lead TSSOP LT8570/LT8570-1 65V, 500mA/250mA Boost/Inverting DC/DC Converter VIN(MIN) = 2.55V, VIN(MAX) = 40V, VOUT(MAX) = ±60V, IQ = 1.2mA, ISD = <1mA, 3mm × 3mm DFN-8, MSOP-8E LT8580 1A (ISW), 65V 1.5MHz, High Efficiency Step-Up DC/DC Converter VIN: 2.55V to 40V, VOUT(MAX) = 65V, IQ = 1.2mA, ISD = <1µA, 3mm × 3mm DFN-8, MSOP-8E Efficiency OUT = –15V V IN = 8V V IN = 24V V IN = 40V OUT = +15V LOAD CURRENT (mA) 120 160 200 100 EFFICIENCY (%)

8330 TA12b