LT8316

LT8316 (Rev. B)

Document overview

• Manufacturer or author: Analog Devices Inc.
• PDF pages: 28

Technical content

Rev. BFor more information www.analog.comDocument Feedback FEATURES DESCRIPTION 560VIN Micropower No-Opto Isolated Flyback Controller The LT®8316 is a micropower , high voltage flyback con- troller . No opto-isolator is needed for regulation. The device samples the output voltage from the isolated fly - back waveform appearing across a third winding on the transformer . Quasi-resonant boundary mode operation improves load regulation, reduces transformer size, and maintains high efficiency. At start-up, the LT8316 charges its INTVCC capacitor via a high voltage current source. During normal operation, the current source turns off and the device draws its power from a third winding on the transformer minimiz- ing standby power dissipation. The LT8316 operates from a wide range of input supply voltages and can deliver up to 100W of power . It is avail- able in a thermally enhanced 20-pin TSSOP package with additional pins removed for high-voltage spacing.

APPLICATIONS

n Wide Input Voltage Range: 16V to 560V (600V max) n No Opto-Isolator Required for Regulation n Quasi-Resonant Boundary Mode Operation n Constant-Current and Constant-Voltage Regulation n Low-Ripple Light Load Burst Mode® Operation n Low Quiescent Current: 75μA n Programmable Current Limit and Soft-Start n TSSOP Package with High-Voltage Spacing n Available in 20(15)-Lead Package with Extended Creepage Distance n AEC-Q100 Compliant with Exception n HBM ESD Classification Level 1C n Isolated Telecom, Automotive, Industrial, Medical Power Supplies n Isolated Off-Line Housekeeping Power Supplies n Electric Vehicles and Battery Stacks n Multioutput Isolated Power Supplies for Inverter Gate Drives All registered trademarks and trademarks are the property of their respective owners. TYPICAL APPLICATION 16VIN to 560VIN Isolated 12VOUT Supply Efficiency 4.7µF 100nF 47pF 4.7µF 1300µF 540µH 8.44µH 8.44µH 10k 44.2k 4.99k 108k 20k 40m/uni03A9 61.9k DCM V IN EN/UVLO FB GND INTV CC IREG/SS SMODE SENSE TC V C BIAS GATE L T8316 V IN 16V TO 560V V OUT V OUT 8:1:1 12V UP TO 800mA (VIN = 20V) UP TO 3A (VIN = 80V) UP TO 4A (VIN = 160V TO 560V)

8316 TA01a

VIN = 20V VIN = 80V VIN = 160V VIN = 320V VIN = 560V LOAD CURRENT (A) EFFICIENCY (%)

8316 TA01b

Rev. B For more information www.analog.com LT8316 20(16), 20(15)-Lead Plastic TSSOP ESD MODEL WITHSTAND THRESHOLD (V) CLASS HBM* ±1000 1C FICDM ±1250 C3 *All pins with the exception of VIN pins pass up to ±4000V Class 3A. ELECTROSTATIC DISCHARGE RATINGS PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS SM VCC D 0mA Operating Junction Temperature (Note 3) LT8 C to 125°C LT8 C to 150°C C to 150°C (Note 1) (Note 4) FE PACKAGE 20(16)-LEAD PLASTIC TSSOP θJA = 38°C/W , θJC = 10°C/W EXPOSED PAD (PIN 21) IS GND, MUST BE SOLDERED TO PCB TOP VIEW

20 GND

19 GATE

18 SENSE

17 EN/UVLO

16 SMODE

15 GND

14 IREG/SS

V IN 1 VIN 2 VIN 3 INTVCC 8 BIAS 9 DCM 10 GND F PACKAGE 20(15)-LEAD PLASTIC TSSOP θJA = 88°C/W TOP VIEW V IN 1 VIN 2 INTVCC 8 BIAS 9 DCM 10 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT8316EFE#PBF LT8316EFE#TRPBF LT8316FE 20-Lead Plastic TSSOP –40°C to 125°C LT8316IFE#PBF LT8316IFE#TRPBF LT8316FE 20-Lead Plastic TSSOP –40°C to 125°C LT8316HFE#PBF LT8316HFE#TRPBF LT8316FE 20-Lead Plastic TSSOP –40°C to 150°C LT8316IF#PBF LT8316IF#TRPBF LT8316F 20-Lead Plastic TSSOP –40°C to 125°C ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection circuity, damage may occur on devices subjected to high energy ESD. Therefore, proper ESD precautions should be taken to avoid performance degradtion or loss of functionality ESD CAUTION

Rev. BFor more information www.analog.com

ELECTRICAL CHARACTERISTICS

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. BIAS = 30V, VEN/UVLO = 30V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS BIAS Chip Bias Voltage Supply Range After Startup 9.5 V IQ BIAS Quiescent Current Burst Mode Operation Active 470 150 700 μA μA I CLAMP(MAX) BIAS Clamp Maximum Current 15 mA VCLAMP BIAS Clamping Voltage ICLAMP = 200µA ICLAMP = 15mA V V I SHDN VIN Shutdown Current VEN/UVLO < 0.3V, BIAS = Floating 12 20 μA VIN(MIN) Minimum Input Voltage for Startup BIAS = Floating l 16 V ISTARTUP Startup Current Out of INTVCC VIN = 16V, BIAS = Floating l 100 300 μA VUVLO EN/UVLO Threshold EN/UVLO Hysteresis V EN/UVLO Falling VEN/UVLO Rising 1.18 1.22 1.26 120 V mV INTVCC UVLO Rising Threshold Startup Current through Depletion FET 11.1 12 13.1 V INTVCC UVLO Falling Threshold 7.6 8.1 8.6 V INTVCC Regulation Voltage Drawing 20mA from INTVCC 9.5 10 10.5 V INTVCC LDO Dropout Voltage Drawing 20mA from INTVCC 1 V Gate Driver Rise Time CGATE = 3.3nF, 10% to 90% 30 ns Gate Driver Fall Time CGATE = 3.3nF, 90% to 10% 8 ns VREG FB Regulation Voltage l 1.18 1.22 1.25 V GM Voltage Error Amplifier T ransconductance V FB = 1.22V ± 5mV 245 350 455 μS VTC TC Voltage TC Voltage Temperature Coefficient T A = 25°C 1.22 +4.1 V mV/°C I TC TC Sinking/Sourcing Current ±100 μA IIREG/SS IREG/SS Current Current Out-of-Pin 9.7 10 10.3 μA IDCM Flyback Collapse Detection Threshold Resonant Valley Detection Threshold I DCM Rising IDCM Falling −170 −85 μA μA V SENSE(MIN) Minimum Current Voltage Threshold 14 20 26 mV VSENSE(MAX) Maximum Current Voltage Threshold 90 100 110 mV SENSE Input Bias Current Current Out-of-Pin 35 µA LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE AUTOMOTIVE PRODUCTS** LT8316EFE#WPBF LT8316EFE#WTRPBF LT8316FE 20-Lead Plastic TSSOP –40°C to 125°C LT8316IFE#WPBF LT8316IFE#WTRPBF LT8316FE 20-Lead Plastic TSSOP –40°C to 125°C LT8316IF#WPBF LT8316IF#WTRPBF LT8316F 20-Lead Plastic TSSOP –40°C to 125°C Contact the factory for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.

Rev. B For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Switching Frequency Boundary Mode Waveforms Load and Line Regulation Output Voltage vs Temperature CV/CC Operation TA = 25°C, unless otherwise noted. FRONT PAGE APPLICATION LOAD CURRENT (A) 11.4 11.6 11.8 12.0 12.2 12.4 12.6 OUTPUT VOL TAGE (V)

8316 G01

VIN = 20V VIN = 80V VIN = 160V VIN = 320V VIN = 560V FRONT PAGE APPLICATION V IN = 320V TEMPERATURE (°C) –50 –25 100 125 150 11.8 11.9 12.0 12.1 12.2 OUTPUT VOL TAGE (V)

8316 G02

IOUT = 100mA IOUT = 1A IOUT = 4A V IN = 320V R IREG/SS = 61.9kΩ FRONT PAGE APPLICATION LOAD CURRENT (A) OUTPUT VOL TAGE (V)

8316 G03

VIN = 20V VIN = 80V VIN = 160V VIN = 320V VIN = 560V LOAD CURRENT (A) 100 FREQUENCY (kHz)

8316 G04

V IN = 320V , I OUT = 4A 5µs/DIV V SENSE 100mV/DIV V OUT AC COUPLED 50mV/DIV V SW 200V/DIV

8316 G05

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Absolute maximum voltage at the V IN pin is 600V for transient operation and 560V for continuous operation. Note 3: The LT8316E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the −40°C to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LT8316I is guaranteed over the full −40°C to 125°C operating junction temperature range. LT8316H is guaranteed to meet performance specifications over the full −40°C to 150°C operating temperature range High junction temperatures degrade operating lifetimes. Operating lifetime is derated at junction temperatures greater than 125°C. Note 4: Human body model (HBM) per ANSI/ESDA/JEDEC JS-001. Field induced charged device model (FICDM) per ANSI/ESDA/JEDEC JS-002. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. BIAS = 30V, VEN/UVLO = 30V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS FSW(MIN) Minimum Switching Frequency Burst Mode Standby Mode 187 3.5 220 250 kHz Hz FSW(MAX) Maximum Switching Frequency 138 140 142 kHz

Rev. BFor more information www.analog.com Discontinuous Mode Waveforms Burst Mode Waveforms FRONT PAGE APPLICATION V IN = 320V , I OUT = 2A 5µs/DIV V SENSE 100mV/DIV V OUT AC COUPLED 50mV/DIV V SW 200V/DIV

8316 G06

V IN = 320V , I OUT = 30mA 100µs/DIV V SENSE 100mV/DIV V OUT AC COUPLED 50mV/DIV V SW 200V/DIV

8316 G07

TYPICAL PERFORMANCE CHARACTERISTICS VIN Pin Shutdown Current BIAS Pin Quiescent Current Depletion Startup Current Load T ransient Response Startup Waveforms TA = 25°C, unless otherwise noted. 10ms/DIV I OUT 2A/DIV V OUT AC COUPLED 200mV/DIV

8316 G08

V IN = 320V , R OUT = 3Ω 50ms/DIV V IN 320V/DIV V INTVCC 10V/DIV V BIAS 10V/DIV V OUT 10V/DIV

8316 G09

TEMPERATURE (°C) –50 –25 100 125 150 SHUTDOWN CURRENT (/uni03BCA)

8316 G10

VIN = 100V VIN = 560V TEMPERATURE (°C) –50 –25 100 125 150 120 160 QUIESCENT CURRENT (/uni03BCA)

8316 G11

V INTVCC (V) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 I INTVCC (mA)

8316 G12

150°C 25°C –55°C

Rev. B For more information www.analog.com TYPICAL PERFORMANCE CHARACTERISTICS Minimum Switch-On Time Minimum Switch-Off Time DCM Pin Threshold TA = 25°C, unless otherwise noted. TEMPERATURE (°C) –50 –25 100 125 150 100 150 200 250 300 350 400 MINIMUM ON TIME (ns)

8316 G19

TEMPERATURE (°C) –50 –25 100 125 150 500 550 600 650 700 750 800 850 900 OFF TIME (ns)

8316 G20

TEMPERATURE (°C) –50 –25 100 125 150 –220 –200 –180 –160 –140 –120 –100 –80 –60 –40 –20 DCM CURRENT (µA)

8315 G21

IREG/SS Pin Current Switching Frequency Limit Switch Current Limit TEMPERATURE (°C) –50 –25 100 125 150 9.5 9.6 9.7 9.8 9.9 10.0 10.1 10.2 10.3 10.4 10.5 IREG/SS CURRENT (/uni03BCA)

8316 G16

MAXIMUM SWITCHING FREQUENCY MINIMUM SWITCHING FREQUENCY TEMPERATURE (°C) –50 –25 100 125 150 125 130 135 140 145 150 FREQUENCY (kHz)

8316 G17

TEMPERATURE (°C) –50 –25 100 125 150 100 105 110 SENSE VOL TAGE (mV)

8316 G18

ULVO Threshold FB Regulation Voltage TC Pin Voltage EN/UVLO Rising EN/UVLO Falling TEMPERATURE (°C) –50 –25 100 125 150 1.15 1.20 1.25 1.30 1.35 ENABLE THRESHOLD (V)

8316 G13

TEMPERATURE (°C) –50 –25 100 125 150 1.200 1.205 1.210 1.215 1.220 1.225 1.230 1.235 1.240 FB REGULATION VOL TAGE (V)

8316 G14

TEMPERATURE (°C) –50 –25 100 125 150 0.80 1.00 1.20 1.40 1.60 1.80 TC VOL TAGE (V)

8316 G15

Rev. BFor more information www.analog.com PIN FUNCTIONS VIN (Pins 1, 2, 3): Drain of the 560V Internal Startup FET . During startup, an internal depletion MOSFET draws power from this pin to charge the INTVCC capacitor . INTVCC (Pin 8): Internal Gate Driver Bias Voltage. During start-up, current from the VIN pin charges this pin to 12V. During operation, a linear regulator from BIAS maintains this voltage at 10V. Bypass locally with a ≥2.2μF ceramic ≥15V rated capacitor . BIAS (Pin 9): Unregulated Input Voltage for the IC. This pin derives power from a third winding on the trans - former to provide power to INTV CC. Bypass locally with a ≥100nF capacitor . DCM (Pin 10): Discontinuous Conduction Mode Detector . This pin detects the dV/dt of the switching waveform, ensuring accurate output voltage sampling and quasi- resonant boundary-mode switching. Connect a capacitor with series resistance from this pin to the third winding. See Boundary Mode Detection section. TC (Pin 11): Temperature Compensation Pin. This pin presents a proportional-to-absolute-temperature (PTAT) voltage, which is equal to the internal 1.22V reference voltage at 25°C and rises with temperature by 4.1mV/°C, to compensate for the output rectifier diode. Connect an appropriate resistor from this pin to FB. FB (Pin 12): Feedback Pin. The voltage appearing on this pin is sampled and regulated to equal the internal 1.22V reference voltage. Connect this pin to a resistor divider from the third winding to regulate the output voltage. VC (Pin 13): Loop Compensation Pin. An internal G M transconductance amplifier feeds this pin with an error current depending on the sampled FB voltage. The resulting voltage determines the switching frequency and peak current limit for power delivery. Connect a series R-C network to stabilize the regulator . See Loop Compensation section. IREG/SS (Pin 14): Current Regulation/Soft-Start Pin. A 10μA current flows out of this pin. The resulting voltage sets the output current regulation point, as determined by an internal current regulation loop. Program the current with a resistor to GND, or connect a capacitor to imple - ment soft-start. SMODE (Pin 16): Standby Mode Pin. Connect this pin to INTVCC to enable Standby Mode, which reduces the mini- mum switching frequency to 220Hz for ultralow quiescent power consumption. Connect to GND to disable. EN/UVLO (Pin 17): Enable/Undervoltage Lockout Pin. The chip will operate only if the voltage on this pin is greater than the internal 1.22V reference voltage. Connect to a resistor divider as desired, or connect to BIAS or INTVCC if UVLO functionality is not desired. SENSE (Pin 18): Current Sense Pin. The voltage appear- ing on this pin is used for peak current-mode control and current limiting. Connect a current-sensing resistor from the main power MOSFET to GND to program the current limit. Utilize a compact layout with the transformer and input capacitor to reduce EMI and voltage spikes. GATE (Pin 19): Gate Driver Output. Connect this pin to the gate of the main power MOSFET for the flyback converter . GND (Pins 15, 20): Ground. Exposed Pad (Pin 21, LT8316FE Only): Ground. Solder the exposed pad to a ground plane for heat sinking.

Rev. B For more information www.analog.com BLOCK DIAGRAM 8316 BD – 10V LDO BIAS/REF CONTROL TSD INTVCC BIAS EN/UVLO SMODE DCM10 FB12 RDCM RFB2 CDCM CDRV CBIAS 36V DBIAS BOUNDARY DETECT S&H×1 TC11 ×1 RFB1 LTER :NTS RTC GM VOL TAGE ERROR AMP +4.1mV/°C 1.22V VOL TAGE CONTROLLED OSCILLATOR S Q R DRIVER MASTER LATCH DEPLETION FET CURRENT COMPARATOR CURRENT ERROR AMP ×10 13 14 10µA 1.25×(1–D) RIREG IREG/SSVC RC CC VIN 1, 2, 3 RSNS 15, 20, 21 GND SENSE 18 GATE 19

• ZSNUB LSECLPRI COUT NPS :1 DOUT VOUT+ VOUT– DSNUB CIN VIN VUVLO

Rev. BFor more information www.analog.com OPERATION The LT8316 is a high-voltage current-mode switching controller designed for the isolated flyback topology. The problem normally encountered in such circuits is that information relating to the output voltage on the isolated secondary side of the transformer must be communicated to the primary side in order to achieve regulation. This is often performed by opto-isolator circuits, which waste output power , require extra components that increase the cost and physical size of the power supply, and exhibit trouble due to limited dynamic response, nonlinearity, unit-to-unit variation, and aging over their life. The LT8316 does not need an opto-isolator because it derives information about the isolated output voltage by examining the flyback pulse waveform appearing on a tertiary winding on the transformer . The output voltage is easily programmed with two resistors. The LT8316 features a boundary mode control method (also called critical conduction mode), where the part operates at the boundary between continuous conduc - tion mode and discontinuous conduction mode. Due to boundary mode operation, the output voltage can be determined from the tertiary winding’s voltage when the secondary current is almost zero. This method improves load regulation without extra resistors and capacitors. The Block Diagram shows an overall view of the system. Many of the blocks are similar to those found in traditional switching regulators, including a current comparator , internal reference, LDO, logic, timers and a MOSFET gate driver . The novel sections include a special sampling error amplifier , a temperature compensation circuit, an output current regulator , and a depletion-mode startup FET . Depletion Startup FET The LT8316 features an internal depletion mode MOSFET . At startup, this transistor charges the INTV CC capacitor so that the LT8316 has power to begin switching. This removes the need for an external bleeder resistor or other components. Boundary Mode Operation Boundary mode is a variable frequency, current-mode switching scheme. The external N-channel MOSFET turns on and the inductor current increases until it reaches the limit determined by the voltage on the V C pin and the sense resistor’s value. After the MOSFET turns off, the voltage on the tertiary winding rises to the output voltage multiplied by the transformer tertiary-to-secondary turns ratio. After the current through the output diode falls to zero, the voltage on the tertiary winding falls. A boundary mode detection comparator on the DCM pin detects the negative dV/dt associated with the falling voltage and trig- gers the sample-and-hold circuit to sample the FB voltage. When the tertiary voltage reaches its minimum and stops falling, the boundary mode comparator turns the internal MOSFET back on for minimal switching energy loss. Boundary mode operation returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. Boundary mode also allows the use of a smaller transformer compared to con- tinuous conduction mode and does not exhibit subhar - monic oscillation. Discontinuous Conduction Mode Operation As the load gets lighter , the peak switch current decreases. Maintaining boundary mode requires the switching fre - quency to increase. An excessive switching frequency increases switching and gate charge losses. To limit these losses, the LT8316 features an internal oscillator which limits the maximum switching frequency to 140kHz. Once the switching frequency hits this limit, the part starts to reduce its switching frequency and operates in discon - tinuous conduction mode. Low Ripple Burst Mode Operation Unlike traditional flyback converters, the MOSFET has to turn on and off to generate a flyback pulse in order to update the sampled output voltage. The duration of a well-formed flyback pulse must exceed the minimum-off time for proper sampling. To this end, a minimum switch turn-off current is necessary to ensure a flyback pulse of sufficient duration.

Rev. B For more information www.analog.com APPLICATIONS INFORMATION OPERATION As the load gets very light, the LT8316 reduces switching frequency while maintaining the minimum current limit in order to reduce current delivery while still properly sam- pling the output voltage. Because flyback pulses must be generated to regulate the output, a minimum switching frequency of 3.5kHz is enforced. The minimum switch - ing frequency determines how often the output voltage is sampled and introduces a minimum load requirement of approximately 1% of the maximum load power . T ying the SMODE pin to INTVCC enables Standby Mode, which reduces the minimum switching frequency to 220Hz, reducing the minimum load requirement at the expense of a longer period between samples. CV/CC Regulation Like a traditional voltage regulator , the LT8316 implements a GM transconductance amplifier that regulates the output voltage. In addition, the LT8316 includes a current regulation loop which regulates the estimated output current to a point set by the voltage on the IREG/SS pin. Below the current setpoint, the output voltage is regulated for constant-voltage (CV) regulation. Below the voltage setpoint, the the output current is regulated for constant- current (CC) regulation. The LT8316 is designed to be an easy-to-use, yet fully- featured flyback controller . With proper technique, it is simple to build an efficient and robust power solution. However , the voltage and power levels involved can be lethal. Milliamperes from a high voltage power supply can cause heart fibrillation and death. Never touch con- ductive nodes while the circuit is active, and keep one hand behind your back while probing. Depletion Startup FET The LT8316 features an internal depletion-mode FET , which has a negative threshold voltage and is therefore normally on. At startup, this FET charges the INTV CC capacitor to 12V so that the LT8316 has power to begin switching. This removes the need for an external bleeder resistor or other startup components. Once INTV CC is charged, the depletion-mode FET turns off. The depletion FET is current-limited to avoid destructive power levels. To ensure start-up, do not load INTV CC or BIAS with excessive current while the chip is starting. ENABLE and Undervoltage Lockout (UVLO) A resistive divider from V IN to the EN/UVLO pin imple - ments undervoltage lockout (UVLO). The EN/UVLO pin threshold is set at 1.22V. Upon startup, the EN/UVLO pin exhibits a ~ 65mV hysteresis voltage to prevent oscillations. The EN/UVLO pin can also be driven with logic levels and set by the output pin of a digital controller . Otherwise, EN/UVLO can also be tied to BIAS or INTVCC to keep the chip enabled. Output Voltage The output voltage is programmed by the RFB1 and RFB2 resistors depicted in the Block Diagram. The LT8316 operates similarly to traditional current-mode switchers, except in its use of a unique sample-and-hold error ampli- fier , which regulates the isolated output voltage from the sampled flyback pulse. Operation is as follows: when the power switch M1 turns off, the voltage across the tertiary winding rises. The amplitude of the flyback pulse is given as: VFLBK = (VOUT + VF + ISEC • ESR) • NTS,

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION where VF = Output diode (DOUT) forward-biased voltage ISEC = T ransformer secondary current ESR = Parasitic resistance of secondar y circuit NTS = T ransformer tertiary-to-secondary turns ratio The voltage divider formed by R FB1 and R FB2 feeds a scaled version of the flyback pulse to the FB pin, where it is sampled and fed to the error amplifier . Because the sample-and-hold circuit samples the voltage when the secondary current is nearly zero, the (ISEC • ESR) term in the VFLBK equation can be ignored. The internal 1.22V reference voltage feeds the non-invert- ing input of the error amplifier . The high gain of the overall loop causes the FB voltage to be nearly equal to the refer- ence voltage. The resulting flyback voltage VFLBK can be expressed as: VFLBK = 1+ RFB2 RFB1 ⎟• 1.22V Combining with the previous VFLBK equation and solving for VOUT yields: VOUT = 1+ RFB2 RFB1 ⎟•1.22V NTS −VF Due to the fast nature of the flyback pulse, it is recom - mended to keep RFB1 between 1kΩ and 10kΩ in order to preserve the resistor divider’s dynamic response. Selecting the RFB2 Resistor Value The LT8316 uses a unique sampling scheme to regulate the isolated output voltage. Due to its sampling nature, the scheme exhibits repeatable delays and error sources, which will affect the output voltage and force a re-evalu- ation of the resistor values. With a fixed value for RFB1 (such as 10kΩ) chosen, rear- rangement of the expression for VOUT yields the starting value for RFB2: RFB2 =RFB1 • VOUT + VF 1.22V •NTS −1⎛ ⎝⎜ ⎞ where VOUT = Desired output voltage VF = Output diode (DOUT) forward voltage ≈ 300mV NTS = T ransformer tertiary-to-secondary turns ratio Power up the application with the final power components installed and the starting R FB2 value, and measure the regulated output voltage, VOUT(MEAS). The final RFB2 value can be adjusted to: RFB2(FINAL) ≈ RFB2 +RFB1( ) • VOUT VOUT(MEAS) −RFB1 Once the final RFB2 value is selected, the regulation accu- racy from board to board for a given application will be very consistent, typically within ± 5% when including device variation of all the components in the system (assuming resistor tolerances and transformer windings matching within ± 1%). However , if the transformer or the output diode is changed, or the layout is dramatically altered, there may be some change in VOUT. Example: Consider a 12V output supply with an output diode whose forward voltage at nearly zero current is 300mV at room temperature. If the tertiary-to-secondary ratio N TS is 1 and R FB1 is 10kΩ, then R FB2 is calculated as 90.9kΩ. The application is powered up and the output is slightly high at 12.2V, so R FB2 is adjusted to 88.7kΩ. Output Diode Temperature Compensation Reiterating the equation for VOUT, VOUT = 1+ RFB2 RFB2 ⎟•1.22V NTS −VF The first term in the VOUT equation is insensitive to tem- perature, but the output diode forward voltage V F has a significant negative temperature coefficient (from −1mV/°C to −2mV/°C). Such a temperature coefficient produces approximately 200mV to 400mV output voltage variation across operating temperature.

Rev. B For more information www.analog.com APPLICATIONS INFORMATION At higher output voltages, the resulting variation may be unimportant as it represents a small fraction of the total output. However , for lower output voltages, the diode temperature coefficient accounts for a large output voltage error . To correct this error , the TC pin provides a buffered proportional-to-absolute-temperature (PTAT) voltage. At room temperature, this voltage is equal to the internal 1.22V reference, and it has a +4.1mV/° C temperature coefficient. The output diode’s temperature coefficient TCF can easily be found experimentally by applying a uniform tempera- ture to both the output diode and the LT8316. First, RFB1 and RFB2 are adjusted to give the desired output voltage at room temperature. The temperature is then raised or lowered by a known amount to a new temperature, and the diode temperature coefficient is found as: TCF = VOUT(25°C) −VOUT(TNEW) TNEW −25°C where VOUT(25°C) = VOUT measured at room temperature VOUT(TNEW) = VOUT measured at new temperature TNEW = New temperature in Celsius Alternatively, TC F can be found more accurately by measuring V OUT at two extremes of temperature and computing: TCF = – ΔVOUT ΔT It should be noted that for this measurement, it is critical that the entire board be heated or cooled uniformly, for example by an oven. A heat gun or freeze spray will not suffice, since the heating and cooling will not be uniform, and dramatic temperature mismatch between the LT8316 and the output diode will cause significant error . If no method is available to apply uniform heat or cooling, extrapolating data from the diode’s data sheet or assum- ing a nominal TCF value (such as −1.5mV/°C) may yield a satisfactory result. With the output diode’s temperature coefficient known, a resistor R TC is then attached from the TC pin to the FB pin. Its value can be calculated as: RTC = −RFB2 • 4.1 mV /°C TCF •NTS Example: If the output diode’s temperature coefficient TCF is found experimentally to be –1.9mV/°C, then with RFB2 = 88.7kΩ, a RTC value of 191kΩ will yield a temperature- invariant output voltage. Sense Resistor Selection The resistor RSNS between the power MOSFET and GND should be selected to provide an adequate switch current to drive the application without exceeding the current limit threshold. At maximum current delivery, current limit occurs when the SENSE pin voltage is 100mV. In boundary mode, the maximum output current will depend on the duty cycle D and is given by: IOUT(MAX) ≈ 100mV 2 •RSNS

• 1−D( ) •NPS where NPS = T ransformer primary-to-secondary turns ratio D ≈ VOUT + VF( ) •NPS VOUT + VF( ) •NPS + VIN VIN = Power supply voltage. It should be noted that the worst-case occurs at minimum VIN, so D VIN(MIN) should be calculated assuming V IN = VIN(MIN). Solving for the sense resistor value: RSNS = 1−DVIN(MIN) IOUT(MAX)
• 50mV •NPS • 80% A factor of 80% is introduced to compensate for system delays and tolerances, but it may need adjustment for the final application.

VIN = 400V input that can drop as low as VIN(MIN) = 250V. D experimentally with an oscilloscope and electronic load. predict maximum output power . into account timing variations caused by circuit parasitics. The actual output power must be evaluated on the bench. at VIN(MAX) = 500V but lowers to 28W at VIN(MIN) = 250V. following information should be carefully considered. the details of these transformers. Table 1. Predesigned T ransformers — Typical Specifications

leakage inductances, as shown in Figure 1. through both primary and secondary windings. are parasitic inductances associated with each winding. and reduced converter efficiency. Figure 1. T ransformer Model

8316 F01

a function of transformer construction and materials. isolation and coupling coefficient must be made. off time, and output power . voltage onto the tertiary winding during the flyback pulse. conduct current for at least 800ns.

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION turn-on current spike. If the inductor current exceeds the minimum switch current limit during that time, the mini- mum load current will increase. Therefore, the following equation must also be observed: LPRI ≥ tON(MIN) • VIN(MAX) ISW(MIN) where tON(MIN) = Minimum Switch-On Time = 300ns Additionally, the magnetizing inductance must be large enough to provide sufficient power to the output when the LT8316 operates at maximum frequency. This creates a third requirement for magnetizing inductance: LPRI ≥ 2 •(VOUT + VF ) •IOUT(MAX) η•ISW(MAX) 2 • fSW(MAX) where ISW(MAX) = Maximum switch current = 100mV/RSNS IOUT(MAX) = Maximum load current fSW(MAX) = Maximum switching frequency = 140kHz η = Efficiency ≈ 80% In general, choose a transformer with its primar y mag- netizing inductance about 20% to 50% larger than the minimum values calculated above. In addition to these minimum values, the magnetizing inductance has a maximum value. To avoid a stuck out - put-low state, the LT8316 has a 50μs backup timer that turns the switch on if the secondar y diode turn-off has not been detected. As a result, the magnetizing inductance must not be so large as to cause secondary diode conduc- tion to exceed this time. This creates a final requirement for maximum magnetizing inductance: LPRI < 0.8 • VOUT + VF( ) •NPS • tBU ISW MAX( ) where tBU = Backup time = 50μs Example: For a 12V/2A output converter with VIN(MAX) = 500V, V F = 300mV, N PS = 10, and RSNS = 120mΩ, the first equation requires LPRI ≥ 590μH, the second equation requires LPRI ≥ 900μH, and the third equation requires LPRI ≥ 633μH. A reasonable standard value for primary inductance is LPRI = 1.2mH. If a larger minimum load at high V IN can be tolerated, 820μH is acceptable. The fourth equation dictates that L PRI must be less than 5.9mH; this requirement is easily satisfied by both options. Saturation Current The current in the transformer windings should not exceed its rated saturation current. Beyond its saturation value, the inductance drops and the current rises to an uncontrolled value, causing extra power dissipation and possible failure. Choose a transformer whose primary saturation current is at least 30% greater than ISW(MAX), which is 100mV/RSNS. Turns Ratios Typically, choose the transformer primary-to-secondary turns ratio N PS to maximize available output power . For low output voltages, a larger N PS ratio can be used to maximize the transformer’ s current gain. However , remember that the MOSFET’ s drain sees a voltage that is equal to VIN plus the output voltage multiplied by NPS. Additionally, leakage inductance will cause a voltage spike (VLEAKAGE) that adds to this reflected voltage. This total quantity needs to remain below the absolute maximum rating of the MOSFET’ s drain to prevent breakdown. Together these conditions place an upper limit on the turns ratio N PS for a given application. Choose a turns ratio low enough to ensure: NPS < VBR −VIN(MAX) −VLEAKAGE VOUT + VF where VBR = MOSFET breakdown voltage. For producing high output voltages, a low ratio NPS may be used. However , the multiplied capacitance presented to the transformer primary may cause ringing that exceeds

evaluate these applications before use with the LT8316. IN to verify proper operation. turns ratio specified within ±1%. wound transformers with excessive leakage inductance. ated ringing should be limited to less than 800ns. Figure 2. Maximum Voltages for SW Pin Flyback Waveform

8316 F02

Figure 3. Snubber Circuits A snubber circuit is recommended for most applications. and provides better load regulation and EMI performance. higher than the maximum DRAIN pin voltage. the required voltage and power dissipation. tion time, which decreases with higher clamp voltage. metal of the VIN trace for sufficient heat removal.

• 1 CSW With the value of the switching node capacitance and leak- age inductance known, a resistor can be added in series with the snubber capacitor to dissipate power and criti - cally dampen the ringing. The equation for deriving the optimal series resistance is: RSNUBBER = LLEAK CSW Energy absorbed by the RC snubber will be converted to heat and will not be delivered to the load. In high power applications, the snubber resistor may need to be sized for thermal dissipation.

8316 F03

Rev. B For more information www.analog.com APPLICATIONS INFORMATION Note that the switching node capacitance is sometimes dominated by transformer interwinding capacitance. Also note that oscilloscope probes present considerable load- ing capacitance. Use of low-capacitance, high-voltage 100× probes is recommended. Leakage Inductance and Output Diode Stress The output diode may also see increased reverse voltage stresses from leakage inductance. While it nominally sees a reverse voltage of the input voltage divided by NPS plus the output voltage when the MOSFET power switch turns on, the capacitance on the output diode and the leakage inductance form an LC tank which may ring beyond that expected reverse voltage. A snubber or clamp may be implemented to reduce the voltage spike if it is desired to use a lower reverse voltage diode. Secondary Leakage Inductance Leakage inductance on the secondary forms an inductive divider that effectively reduces the size of the tertiary- referred flyback pulse used for voltage feedback. This will increase the output voltage by a similar percentage. Note that, unlike leakage spike behavior , this phenom - enon is load independent. To the extent that the secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing variations), this can be accommodated by adjusting the RFB2/RFB1 resistor ratio. Winding Resistance Resistance in either the primary or secondary will reduce conversion efficiency. Good output voltage regulation will be maintained despite winding resistance due to the boundary/discontinuous conduction mode operation of the LT8316. Boundary Mode Detection Boundary mode is a variable frequency switching scheme that always returns the secondary current to zero with every cycle. The DCM pin uses a fast, current-input comparator in combination with a small capacitor CDCM to detect when the flyback waveform’s dV/dt is negative, indicating that the secondary diode has turned off and the flyback pulse on the tertiary winding is falling. To avoid false tripping due to leakage inductance ringing, a blanking time of 800ns is applied after the switch turns off. The detector triggers when C DCM draws 170μA of current out of the DCM pin. This information is used to set the timing of the FB sample-and-hold and estimate the output current. This is not the best time to turn the switch on because the MOSFET’s drain voltage is still nearly VIN + (VOUT • NPS), and turning the switch on would waste all the energy stored in the parasitic capacitance on the switching node. When the secondary current reaches zero, discontinuous ringing begins and the energy in the parasitic capacitance on the switch node resonates with the transformer’s mag- netizing inductance, delivering this energy back to V IN. The minimum voltage of the switching node during this discontinuous ring is V IN – (VOUT • NPS). This is the opti- mal moment to turn the switch back on, and the LT8316 does this by sensing when current drawn out of DCM falls to 85μA. This switching technique increases efficiency by up to 5%. Typical CDCM values range from 10pF to 100pF. A good starting value is 47pF. If the LT8316 is observed not to run in boundary mode, then increasing this capacitor will help. An unnecessarily large C DCM value can cause pre - mature switch turn-on and increased power loss. Excessive current delivered to the DCM pin can cause erratic behavior . To avoid this, a resistor R DCM can be added in series with C DCM to limit the current. Typical values range from 5kΩ to 50kΩ. Output Capacitor Selection The output capacitor should be chosen to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor . The following equa - tion provides an estimate of the maximum output voltage ripple at steady-state: VRIPPLE ≈ LPRI •ILIM 2•COUT • VOUT where ILIM = Maximum primary current = 100mV/RSNS

Rev. BFor more information www.analog.com APPLICATIONS INFORMATION This is a simplified equation; the actual ripple will depend on load current, duty cycle and capacitor ESR. The LT8316 samples the output voltage only when switching. As a result, when it is operating at its minimum frequency, a load transient may discharge the output capacitor before the device can respond. The output capacitor must be sufficient to prevent the load from brown-out in this event. Additional bulk capacitance may be desirable for this purpose. Operation Under Light Output Loads The LT8316 detects the output voltage from the flyback pulse appearing on the tertiary winding, which requires delivering power to the output. Thus, the LT8316 deliv - ers a minimum amount of energy even during light load conditions to ensure accurate output voltage information. The minimum operating frequency at minimum load is approximately 3.5kHz. The minimum delivery of energy creates a minimum load requirement on the output of approximately 1% of the maximum load power . A Zener diode sufficiently rated to handle the minimum load power can be used to provide a minimum load with- out decreasing efficiency in normal operation. In selecting a Zener diode for this purpose, the Zener voltage should be high enough that the diode does not become the load path during transient conditions but the voltage must still be low enough that the MOSFET and output voltage rat- ings are not exceeded when the Zener functions as the minimum load. Standby Mode Operation For extremely low no-load power dissipation, the LT8316 features a standby mode which is enabled by tying the SMODE pin to INTVCC. When the load current has dropped to zero, the LT8316 reduces its minimum switching fre - quency by a factor of 16 from 3.5kHz to 220Hz. This reduces the minimum load current by a factor of 16, at the cost of slower transient response. Because the output voltage is sampled only once every 4.6ms, the LT8316 will be unable to respond to load steps for up to this period. Output Current Regulation and Soft-Start Using duty cycle information and the current limit set by the VC pin, the LT8316 estimates the output current and regulates it to a setpoint determined by the voltage on the IREG/SS pin. The output current is regulated according to the equation: IOUT = NPS • VIREG/SS 25 • RSNS where VIREG/SS = Voltage on IREG/SS pin. A trimmed 10μA current flows out of the IREG/SS pin, so that a resistor tied from this pin to GND programs the output current according to the equation: RIREG/SS = 2.5MΩ•IOUT •RSNS NPS Example: For an application with RSNS = 120mΩ, NPS = 10, and a desired regulated output current I OUT = 2A, an IREG/SS resistor is selected RIREG/SS = 60.4kΩ. Circuit parasitics, especially transformer capacitance, will influence the accuracy of output current regulation due to energy delivery to the parasitics. Although this effect is usually small, some iteration may be necessary if accu- racy better than 5% is required. In this case, R IREG/SS can be implemented with a rheostat and adjusted until the desired output current is realized, and then replaced with a fixed-value resistor for production. When the rheostat is present, a small bypass capacitor is helpful to attenuate switching interference pickup by the rheostat. Additionally, an RC snubber placed across the secondary rectifier can improve current regulation accuracy. Soft-start functionality can also be implemented by con- necting a capacitor from the IREG/SS pin to GND. The 10μA current will act to charge the external soft-start capacitor . At startup, the regulated output current will rise monotonically until reaching voltage regulation. The soft- start capacitor then charges entirely and the output current regulation loop will not interfere with voltage regulation.

Rev. B For more information www.analog.com APPLICATIONS INFORMATION In order to avoid an undervoltage condition which causes the chip to shut down, the combined capacitance on the INTVCC and BIAS pins must be sufficient to power the LT8316 until the output achieves regulation. If power at VIN is removed, over-temperature protection is engaged, undervoltage lockout trips, or overcurrent in the sense resistor is detected, a 20Ω pull-down switch to GND discharges any capacitance on the IREG/SS pin for the duration of the fault plus 640μs. Protection from Shorted Output Conditions During a shorted output condition, the LT8316 operates at the minimum operating frequency. In normal operation, the tertiary winding provides power to the IC, but the tertiary winding voltage collapses during a shorted condi- tion. This causes the part’s INTVCC UVLO of 8.1V (typical) to shutdown switching and charge through the depletion startup current source. The part starts switching again when INTVCC has reached its turn-on voltage of 12V. To protect the output diode from excessive power dis - sipation during overload conditions, it is advised to program the regulated output current with a resistor RIREG/SS. For voltage regulators, the programmed cur - rent should be 120% to 150% of the maximum load cur- rent to ensure current regulation does not interfere with voltage regulation. Loop Compensation The LT8316 is compensated using an external resistor- capacitor network on the VC pin. Typical values are in the range of RC = 20kΩ and C C = 220nF. If too large an R C value is used, the part will be more susceptible to high fre- quency noise and jitter . If too small of an RC value is used, the transient performance will suffer . The value choice for CC is somewhat the inverse of the RC choice: if too small a CC value is used, the loop may be unstable and if too large a CC value is used, the transient performance will suffer . T ransient response may be evaluated with a load step box and adjusted with an adjustable RC compensation net - work. Stability should be confirmed over the full range of load current and input voltage. Extending Supply Voltage The LT8316 is rated to operate from a V IN up to 560V. Operation from a higher supply voltage is made possible by placing a Zener diode in series with the V IN pin, as shown in Figure 4. The voltage dropped across the Zener diode reduces the voltage applied to the chip, allowing the supply voltage to exceed 560V. For example, a 600V Zener diode will, in principle, allow a supply voltage ranging from 616V to 1160V. It should be noted that 616V is needed only during start-up; after start-up, the LT8316 will continue to operate through transient dips in supply voltage. In practice, the input voltage range must be adjusted according to the Zener diode’s voltage tolerance. Figure 4. V IN L T8316

8316 F04

Increased Supply Voltage with a Zener Diode

Figure 5. 94% Efficient Isolated 54V Supply

8316 F05

Figure 6. 91% Efficient Isolated 5V/7A Synchronous Flyback Converter

8316 F06

Figure 7. Ultra-Wide Input Range Non-Isolated 12V Buck Converter Figure 8. Non-Isolated 16.8V Gate Drive Supply

8316 F07

8316 F08

Figure 9. Nonisolated 24V Buck Converter with Optional Undervoltage Lockout

8316 F09

Rev. BFor more information www.analog.com PACKAGE DESCRIPTION FE20(16) (BB) TSSOP REV A 1219 0.09 – 0.20 (.0035 – .0079) 0° – 8° 0.25 REF RECOMMENDED SOLDER PAD LAYOUT 0.50 – 0.75 (.020 – .030) 4.30 – 4.50* (.169 – .177) 1 3 8 9 10 11 12 14 13 6.40 – 6.60* (.252 – .260) 1.78 (.070) 1.78 (.070) REF 20 19 0.2 18 17 16 15 1.20 (.047) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 1.78 (.070) 4.83 (.1902) 0.48 (.019) REF 0.42 (.016) REF0.45 ±0.05

0.65 BSC

5.00 ±0.10 6.60 ±0.10 0.80 ±0.10 0.42 5.68 (.224) REF 5.68 (.224) REF MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 6.40 (.252) BSC Variation: FE20(16) 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1990 Rev A) Exposed Pad Variation BB 0.22

Rev. B For more information www.analog.com PACKAGE DESCRIPTION FE20(15) (BB) TSSOP REV Ø 0121 0.09 – 0.20 (.0035 – .0079) 0° – 8° 0.25 REF RECOMMENDED SOLDER PAD LAYOUT 0.50 – 0.75 (.020 – .030) 4.30 – 4.50* (.169 – .177) 20 19 17 1811 12 13 14 15 16 1.20 (.047) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 10 8 2 1 1 29 8 10 9 0.45 ±0.05 5.00 ±0.10 6.60 ±0.10 0.80 ±0.10 MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE F Package Variation: F20 (15) 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-7083 Rev Ø) 6.40 – 6.60* (.252 – .260) 1112 14 1320 19 18 17 16 15 6.40 (.252) BSC BOTTOM VIEW

Rev. BFor more information www.analog.com Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 04/21 Added H-Grade and #W models. Added AEC-Q100 in Progress. Changed VIN condition to 560V throughout data sheet. Updated Package Drawing. Corrected various typos. 1-26 B 05/22 Added F15 package. Changed AEC-Q100 status. Added ESD Ratings. 1-3, 25

Rev. B For more information www.analog.com  ANALOG DEVICES, INC. 2021-2022 www.analog.com RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT8304/LT8304-1 100VIN Micropower Isolated Flyback Converter with 150V/2A Switch Low IQ Monolithic No-Opto Flyback, SO-8 Package LT8304-1 Is Recommended for High Output Voltages LT8300 100VIN Micropower Isolated Flyback Converter with 150V/260mA Switch Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23 LT8303 100VIN Micropower Isolated Flyback Converter with 150V/0.45A Switch Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23 LT8301 42VIN Micropower Isolated Flyback Converter with 65V/1.2A Switch Low IQ Monolithic No-Opto Flyback, 5-Lead TSOT-23 LT8302 42VIN Micropower Isolated Flyback Converter with 65V/3.6A Switch Low IQ Monolithic No-Opto Flyback, SO-8 Package LT8309 Secondary-Side Synchronous Rectifier Driver 4.5V ≤ VCC ≤ 40V, Fast Turn-On and Turn-Off, 5-Lead TSOT-23 LT3748 100V Isolated Flyback Controller 5V ≤ VIN ≤ 100V, No-Opto Flyback, MSOP-16(12) LT3798 Off-Line Isolated No-Opto Flyback Controller with Active PFC V IN and VOUT Limited Only by External Components LT8312 Boost Controller with Power Factor Correction VIN and VOUT Limited Only by External Components LT8315 560VIN Micropower Isolated Flyback Converter with 630V/300mA Switch Low IQ Monolithic No-Opto Flyback, TSSOP-20(16) Wide Input Range 24V Flyback Converter 4.7µF 220nF 47pF 4.7µF 670µH 10.5µH 42µH 10k 44.2k 4.99k 249k 10k 50m/uni03A9 56.2k DCM V IN EN/UVLO FB GND INTV CC IREG/SS SMODE SENSE TC V C BIAS GATE L T8316 100/uni03A9 1nF 10/uni03A9 20/uni03A9 STD6N90K5 1µF 100µF 35V V IN 20V TO 560V V OUT V OUT 24V/1.5A

8316 TA03

6mA TO 400mA (VIN = 20V) 7mA TO 900mA (VIN = 50V) 20mA TO 1.5A (VIN = 100V TO 560V) T1: SUMIDA 11328-T080 D1: BAV20WS-7-F0 D2: PDS4200H-13 D3: SMBJ188A D4: US1MFA 8:2:1 10µF 50V X5R/X7R