LT8306

LT8306 - 60V Low IQ No-Opto Isolated Flyback Controller

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Technical content

analog.com Rev A 2 of 29 TABLE OF CONTENTS High Drain Capacitance and Low Current Operation .... 19

REVISION HISTORY

Revision Number Revision Date Nature of Change Page Number Rev 0 1/23 — — Rev A 7/23 Updated Ordering Guide 28

Table 1. Electrical Characteristics

Table 2. Absolute Maximum Ratings 1 Do not force any voltage on the RFB pin. 2 Do not apply a positive or negative voltage source to the GATE pin or permanent damage may occur. package thermal impedance, and other environmental factors.

4 The LT8306R includes overtemperature protection to protect the device during momentary overload

operation above the specified absolute maximum operating junction temperature may impair device reliability. extended periods may affect product reliability.

Figure 3. Pin Diagram Table 3. Pin Descriptions

1 SENSE

terminal of the current-sense resistor to the ground plane close to the chip. 2 GND Ground. Tie this pin directly to the ground plane. the ground to an internal 8V supply voltage.

4 RFB

of any non-unity transformer turns ratio). Minimize trace area at this pin.

5 VIN

this pin to the ground with a ceramic capacitor.

6 EN/UVLO

VIN UVLO hysteresis. If neither function is used, tie this pin directly to VIN.

Figure 22. Block Diagram physical size and cost, and dynamic response is often mediocre.

analog.com Rev A 10 of 29 a sample -and-hold error amplifier, and a boundary mode detector, as well as the addition al logic for boundary conduction mode, discontinuous conduction mode, and low ripple burst mode operation. Boundary Conduction Mode Operation The LT8306 features boundary conduction mode operation at heavy load, where the chip turns on the primary power switch when the secondary current is zero. Boundary conduction mode is a variable frequency, variable peak-current switching scheme. The power switch turns on and the transformer primary current increases until an internally controlled peak current limit. After the external MOSFET turns off, the voltage on the drain of the MOSFET rises to the output voltage multiplied by the primary -to-secondary transformer turns ratio plus the input voltage. When the secondary current through the output diode falls to z ero, the voltage on the drain of the MOSFET falls below V IN. A boundary mode detector senses this event and turns the external MOSFET back on. Boundary conduction mode returns the secondary current to zero every cycle, so parasitic resistive voltage drops do not cause load regulation errors. Boundary conduction mode also allows the use of smaller transformers compared to continuous conduction mode and does not exhibit subharmonic oscillation. Discontinuous Conduction Mode Operation As the load gets lighter, boundary conduction mode increases the switching frequency and decreases the switch peak current at the same ratio. Running at a higher switching frequency up to several MHz increase switching and gate charge losses. To avoid this scenario, the LT8306 has an additional internal oscillator that clamps the maximum switching frequency to be less than 400kHz (typ). Once the switching frequency hits the internal frequency clamp, the part starts to delay the switch turn -on and operates in discontinuous c onduction mode. Since the LT8306 integrates the control loop compensation and power supply rails internally without any external capacitors, there can be some jittering behavior in the discontinuous conduction mode operation. Low Ripple Burst Mode Operation Unlike traditional flyback converters, the LT8306 must turn on and off at least for a minimum amount of time and with a minimum frequency to allow accurate sampling of the output voltage. The inherent minimum switch current limit and minimum switch-off time are necessary to guarantee the correct operation of specific applications. As the load gets very light, the LT8306 starts to fold back the switching frequency while keeping the minimum switch current limit. So, the load current can decrease while still allowing minimum switch-off time for the sample-and- hold error amplifier. Meanwhile, the part switches between the sleep mode and active mode, thereby reducing the effective quiescent current to improve light load efficiency. In this condition, the LT8306 operates in low ripple burst mode. The 10kHz (typ) minimum switching frequency determines how often the output voltage is sampled and the minimum load requirement.

analog.com Rev A 11 of 29 APPLICATIONS INFORMATION Output Voltage The RFB resistor as depicted in the b lock diagram is an external resistor used to program the output voltage. The LT8306 operates like traditional current -mode switchers, except in the use of a unique flyback pulse sense circuit and a sample -and-hold error amplifier, which sample and therefor e regulate the isolated output voltage from the flyback pulse. The operation is as follows: when the power switch M1 turns off, its drain voltage rises above the V IN supply. The amplitude of the flyback pulse, i.e., the difference between it and the VIN supply, is given as: VFLBK = (VOUT + VF + ISEC • ESR) • NPS (1) VF = Output diode forward voltage ISEC = Transformer secondary current ESR = Total impedance of secondary circuit NPS = Transformer effective primary-to-secondary turns ratio The flyback voltage is then converted to a current, I RFB, by the R FB resistor and the flyback pulse sense circuit (M2 and M3). This current, I RFB, also flows through the internal 10k R REF resistor to generate a ground-referred voltage. The resulting voltage feeds to the inverting input of the sample-and-hold error amplifier. Since the sample-and-hold error amplifier samples the voltage when the secondary current is zero, the (ISEC • ESR) term in the VFLBK equation is assumed to be zero. The internal reference voltage, V REF, feeds the non -inverting input of the sample -and-hold error amplifier. The relatively high gain in the overall loop causes the voltage at the R REF resistor to be nearly equal to the internal reference voltage VREF. The resulting relationship between VFLBK and VREF is expressed with Equation 2 or Equation VFLBK RFB ) • RREF = VREF (2) VFLBK = RFB • ( VREF RREF ) = IRFB • RFB (3) VREF = Internal reference voltage = 1.00V IRFB = RFB regulation current = 100μA Combination of Equation 1 and Equation 3 yields Equation 4 for VOUT, in terms of the RFB resistor, transformer turns ratio, and diode forward voltage. VOUT = 100μA • ( RFB NPS ) − VF (4)

analog.com Rev A 12 of 29 Output Temperature Coefficient The first term in Equation 3 does not have a temperature dependence, but the output diode forward voltage VF has a significant negative temperature coefficient (−1mV/°C to −2mV/°C). Such a negative temperature coefficient produces approximately 200mV to 300mV voltage variation on the output voltage across temperature. For higher voltage outputs, such as 12V and 24V, the output diode temperature coefficient has a negligible effect on the output voltage regulation. For lower voltage outputs, such as 3.3V and 5V, however, the output diode temperature coe fficient does count for an extra 2% to 5% output voltage regulation. For tight output voltage regulation across temperature, refer to other ADI parts with integrated temperature compensation features. Selecting the Actual RFB Resistor Value The LT8306 uses a unique sampling scheme to regulate the isolated output voltage. Due to the sampling nature, the scheme contains repeatable delays and error sources, which affect the output voltage and force a re -evaluation of the RFB resistor value. Therefore, a simple two-step process is required to choose the feedback resistor RFB. Rearrangement of the expression for VOUT in the Output Voltage section yields the starting value for RFB in Equation RFB = NPS•(VOUT+VF) 100μA (5) VOUT = Output voltage VF = Output diode forward voltage = ~0.3V NPS = Transformer effective primary-to-secondary turns ratio Power up the application with the starting RFB value and other components, and measure the regulated output voltage, VOUT(MEAS). Adjust the final RFB value according to Equation 6. RFB(FINAL) = VOUT VOUT(MEAS)

• RFB (6) Once the final R FB value is selected, the regulation accuracy from board to board for a given application is very consistent, typically under ±5% when including device variation of all the components in the system (assuming resistor tolerances and transformer windings matching within ±1%). However, if the transformer or the output diode is changed, or the layout is dramatically altered, there may be some change in VOUT. Output Power Because the MOSFET power switch is located outside the LT8306, the maximum output power is primarily limited by external components. Output power limitations can be separated into three categories: voltage limitations, current limitations, and thermal limitations. The voltage limitations in the flyback design are primarily the MOSFET switch VDS(MAX) and the output diode reverse- bias rating. Increasing the voltage rating of either component typically decreases application efficiency if all else is equal, and the voltage requirements on each of those components is directly related to the winding s ratio of the transformer, the input and output voltages, and the use of any additional snubbing components. The MOSFET VDS(MAX) must theoretically be higher than VIN(MAX) + (VOUT • NPS), though leakage inductance spikes on both the drain

24, assume no leakage inductance and high efficiency. power applications, although the MOSFET switch and output diode need to be rated for the desired currents as well. coupling between the primary and the secondary is reduced and incremental power is not delivered to the output. by over 20% from 25°C to 100°C. Figure 23. Maximum Output Power at 12VOUT with a 10A ILIM and Maximum VDS = 60V, 80V, 100V

Figure 24. Maximum Output Power at 12VOUT with 80V VDS(MAX) and ILIM = 5A, 10A, 15A selection further helps to focus on minimizing losses in the output diode.

• Q G. If that power is high enough, it causes si gnificant heating of the LT8306 and triggers the overtemperature protection. Primary Inductance Requirement The LT8306 obtains output voltage information from the external MOSFET drain voltage when the secondary winding conducts current. The sample-and-hold error amplifier needs a minimum of 630ns to settle and sample the reflected output voltage. The 630ns includes 440ns minimum demagnetizing time and 190ns sample time. To ensure proper sampling, the secondary winding needs to conduct current for a minimum of 440ns. Equation 7 gives the minimum value for primary-side magnetizing inductance. LPRI ≥ (VOUT+VF)•RSENSE•tDEMAG(MIN)•NPS VSENSE(MIN) (7) VSENSE(MIN) = Sense minimum threshold = 17mV (typ) tDEMAG(MIN) = Minimum demagnetize time = 440ns NPS = Ratio of primary windings to secondary windings In addition to the primary inductance requirement for the minimum demagnetize time, the LT8306 has minimum switch-on time that prevents the chip from turning on the power switch shorter than approximately 200ns. This minimum switch-on time is mainly for leading-edge blanking the initial switch turn-on current spike. If the inductor 100 0 602010 4030 50 MAXIMUM OUTPUT POWER (W) INPUT VOLTAGE (V) ILIM = 11A ILIM = 8A ILIM = 5A 024

analog.com Rev A 15 of 29 current exceeds the desired current limit during that time, oscillation may occur at the output as the current control loop lo ses its ability to regulate. Therefore, follow Equation 8 relating to maximum input voltage to select the primary-side magnetizing inductance. LPRI ≥ VIN(MAX) • RSENSE•tON(MIN) VSENSE(MIN) (8) tON(MIN) = Minimum switch-on time = 200ns In general, ch oose a transformer with its primary magnetizing inductance about 30% larger than the values calculated above. A transformer with much larger inductance has a bigger physical size and may cause instability at light load. Selecting a Transformer Transformer specification and design is perhaps the most critical part of successfully applying the LT8306. In addition to the usual list of guidelines dealing with high frequency isolated power supply transformer design, carefully consider the following information. Analog Devices has worked with several leading magnetic component manufacturers to produce predesigned flyback transformers for use with the LT8306. Table 4 shows the details of these transformers. Turns Ratio and RMS Diode Current Note that when choosing the R FB resistor to set output voltage, the user has relative freedom in selecting a transformer turns ratio to suit a given application. In contrast, the use of simple ratios of small integers, e.g., 3:1, 2:1, 1:1, provides more freedom in settling total turns and mutual inductance. While the turns ratio can be selected to maximize output power for a given current limit, minimizing the tur ns ratio and increasing the current limit often increases efficiency and better utilizes the saturation current of a given transformer. Figure 25 shows the maximum output power using three transformers with different windings ratio that have the same output inductance and peak output current, illustrating that increasing current while decreasing turns ratio can deliver more power.

Figure 25. Maximum Output Power at 12V Out Using Three Transformers with Equal Peak Output Current and Secondary Table 4. Predesigned Transformers Note: Typical specifications, unless otherwise noted. duty cycle, D, and Equation 10 to calculate the RMS current of a triangle waveform. synchronous rectifier driver for high efficiency.

energy must be dissipated. Minimize transformer leakage inductance. snubber circuitry, but in some cases the optimal MOSFET may require protection from this leakage spike. of MOSFET from exceeding its absolute maximum rating voltage. Figure 26. (RC + DZ) Snubber Circuit parasitic capacitance, from which the parasitic inductance can be determined from the initial period, as well. observed periods (tPERIOD and tPERIOD(SNUBBER)) and snubber capacitance (CSNUBBER) is given by Equations 11 to 13.

analog.com Rev A 18 of 29 RSNUBBER = √ LPAR CPAR (13) Note that energy absorbed by a snubber is converted to heat and is not delivered to the load. In high voltage or high current applications, the snubber may need to be sized for thermal dissipation. For the DZ snubber, take proper care when choosing both the diode and Zener diode. Schottky diodes are typically the best choice, but some PN diodes can be used if they turn on fast enough to limit the leakage inductance spike. Choose a diode that has a reverse -voltage rating higher than the maximum rating voltage of MOSFET . Choose the Zener diode breakdown voltage to balance power loss and switch voltage protection. The best compromise is to choose the largest voltage breakdown with enough margin. Use Equation 14 to make the proper choice. VZENER(MAX) = VDS(MAX) − VIN(MAX) (14) The power loss in the DZ snubber determines the power rating of the Zener diode. Leakage Inductance and Output Diode Stress The output diode may also see increased reverse voltage stresses from leakage inductance. While it nominally sees a reverse voltage of the input voltage divided by the winding’s ratio plus the output voltage when the MOSFET power switch turns on, the capacitance on the output diode and leakage inductance cause an LC tank, which may ring beyond that expected reverse volt age. Implement an RC snubber or RCD clamp to reduce the voltage spike if it is desirable to use a lower reverse voltage diode. Secondary Leakage Inductance In addition to the previously described effects of leakage inductance in general, leakage inductance on the secondary in particular exhibits an additional phenomenon. It forms an inductive divider on the transformer secondary that effectively reduces the size of the primary-referred flyback pulse used for feedback. This increases the output voltage target by a similar percentage. Note that unlike leakage spike behavior, this phenomenon is load independent. To the extent that the secondary leakage inductance is a constant percentage of mutual inductance (over manufacturing variations), this can be accommodated by adjusting the RFB resistor. Selecting a Current-Sense Resistor The external current-sense resistor optimizes the current limit behavior for the application under consideration. As the current-sense resistor is varied from several ohms down to tens of milliohms, peak switch current goes from a fraction of an ampere to tens of amperes. Take care to ensure proper circuit operation, especially with small current- sense resistor values. The sense resistor value is calculated using Equation 15. RSENSE = 95mV ILIM (15) For example, a peak MOSFET switch current of 5A requ ires a sense resistor of 0.019Ω. Note that the instantaneous peak power in the sense resistor is 1W, and rate it accordingly. The LT8306 has only a single sense line to this resistor. Therefore, any parasitic resistance in the ground side connection of the sense resistor increases its apparent value. In the case of a 0.025Ω sense resistor, 1mΩ of parasitic resistance causes 4% reduction in peak switch current. Therefore, do not ignore resistance of printed circuit copper traces and vias. Another issue for proper operation of the current -sense circuitry is avoiding prematurely tripping the SENSE threshold while slewing the MOSFET drain when the GATE pin goes high. The LT8306 does not begin to compare the SENSE pin voltage with the target threshold until at least 200ns has passed. This should be entirely sufficient for most

analog.com Rev A 19 of 29 applications, but premature tripping of SENSE comparator may occur in cases where MOSFET with very high Q G is used with a series resistor at the GATE pin. Output Short Circuits and SENSE Pin Over Current When the output is heavily overloaded or shorted to ground, it reflects a very low output voltage back to the primary side of the transformer, which causes the LT8306 to turn the external MOSFET on after the internal blanking time instead of the secondary current that has discharged. Under this condition, the LT8306 runs into the continuous conduction mode at maximum switching frequency. If the sampled RREF voltage is still less than 0.6V after internal soft -start, the LT8306 stops switc hing for a long time and then initiates a new soft-start cycle. If the sampled RREF voltage is larger than 0.6V after internal soft-start, the switch current may run away and the voltage at the SENSE pin exceeds the 95mV maximum current limit threshold. On ce the SENSE voltage hits 160mV over the current limit threshold, the LT8306 also stops switching for a long time and then initiates a new soft -start cycle. Under either condition, the new soft -start cycle throttles back both the switch current limit and s witch frequency. The output short -circuit protection prevents the switch current from running away and limits the average output diode current. High Drain Capacitance and Low Current Operation When designing applications with some combination of a low current limit (I LIM < 1A), a high secondary-to-primary turns ratio (N PS <1), multiple output windings, or very capacitive output diodes, it is important to minimize the capacitance reflected onto the primary winding and on the drain of the external MOSFET. After the MOSFET turns off during each switching cycle, the primary current charges that capacitance to slew the MOSFET drain until the secondary begins to deliver power, and if the drain node does not slew and remain below V IN within approximately 440ns once the GATE pin goes low and the MOSFET turns off, the LT8306 may detect that the current in the secondary is zero and turn the MOSFET back on, causing the LT8306 to switch continuously while delivering very little power to output. This results in the drop of the output voltage at lighter loads. This problem can be prevented by maximizing NPS (minimizing ratio of secondary windings to primary windings), increasing the peak drain current (minimizing RSENSE), and minimizing the output diode and transformer capacitance. Undervoltage Lockout (UVLO) A resistive divider from VIN to the EN/UVLO pin implements undervoltage lockout (UVLO). The EN/UVLO enable falling threshold is set at 1.228V with 18mV hysteresis. In addition, the EN/UVLO pin sinks 2.5μA when the voltage on the pin is below 1.228V. This current provides user programmable hysteresis based on the value of R1. The programmable UVLO thresholds are given by Equations 16 and 17. VIN(UVLO+) = 1.246V•(R1+R2) R2 + 2.5μA • R1 (16) VIN(UVLO−) = 1.228V•(R1+R2) R2 (17) Figure 27 shows the implementation of external shutdown control while still using the UVLO function. The NM OS grounds the EN/UVLO pin when turned on and puts the LT8306 in shutdown with quiescent current less than 2μA.

Figure 27. Undervoltage Lockout (UVLO) approximately 0.5% of maximum load. The minimum operating frequency at minimum load is approximately 10kHz. designing a 12V output with 4A load current and an input range from 9V to 36V. equations evaluate each of the important criteria.

9V to reduce operating stresses at higher input voltage. Table 5 shows the results of the equation in this application. efficiency) and primary side currents, and only decreases the output diode RMS current by 13% from the 1:1 case. reason, a 2:1 turns ratio is selected, easing the requirement on the output diode reverse voltage rating in process. Table 5. Voltage Stresses, Output Capability, and Diode Current vs. Turns Ratio in 36V VIN to 12V, 4A Calculate the sense resistor by Equation 24. standard 0.005Ω value and ILIM of 19A. switch-on time requirements (Equation 26). current limit is decided by the minimum demagnetize time requirement to be 3.2μH. Once the primary inductance is determined, calculate the maximum load switching frequency by Equation 28.

analog.com Rev A 22 of 29 fSW = tON+tDEMAG LPRI•ILIM VIN + LPRI•ILIM NPS•(VOUT+VF) (28) The transformer also needs to be rated for the correct saturation current level across line and load conditions. A saturation current rating larger than 19A is necessary to work in this application. The 10393-T174-VER3 from Sumida is chosen as the flyback transformer. Step 4: Select a MOSFET Switch The selected 2:1 transformer requires a nominal 60V rating on the MOSFET switch, assuming no leakage inductance. However, even a small amount of leakage inductance may cause the drain to ring to double the anticipated voltage, and generally this needs to be verified in the final design. At currents below 19A, it is easy to find a MOSFET with sufficiently low RDS(ON) to have little influence on the full load efficiency while at the sam e time having low enough QG to minimize gate driver dissipation at lighter loads. Also, while considering the efficiency gains and losses with a given MOSFET, it is important to realize that a trade-off in RDS(ON) for VDS(MAX) may backfire if a snubber needs to be added to the circuit to meet the voltage requirements and dissipates more energy than the difference in switch resistance. For that reason, an ON Semi FDMS86183 is selected to give lots of margin with its 100V rating. The RMS current in the MOSFET can be squared and multiplied by the RDS(ON) to calculate losses and the current required to drive the MOSFET at frequency can be determined by Equation 29. IMOSFET(RMS) = √ILIM 2 • D/ 3 (29) IGATE = fSW • QG (30) PGATE = IGATE • (VIN − 8V) (31) In this application, the MOSFET RMS current at maximum load is about 8.5A, which multiplied by the 0.011Ω RDS(ON) is 0.8W, or on the order of 2% loss in efficiency. Step 5: Select the Output Diode The output diode reverse voltage, as calculated earl ier, is the first important specification for the output diode. As with the MOSFET, choosing a diode with enough margin should preclude the use of a snubber. The second criterion is the power requirement of the diode, which is more difficult to correctly ascertain. Some manufacturers give direct data about power dissipation versus duty cycle, which can be used with the data from the table. To avoid using a snubber, select a diode with a 60V reverse -bias capability and minimal forward drop. In this case, th e On Semi NRVB860MFS. In this application, where maximizing efficiency is the goal, minimizing the maximum voltage requirement on VIN may allow the use of a diode with a lower reverse bias rating and a lower forward drop, which could further increase efficiency. Alternatively, if no efficient diode is available for a particular reverse bias rating, it may be more beneficial to increase the windings ratio until a diode with low forward drop can be selected and then re -evaluate whether the solution with higher RMS diode current is beneficial. Step 6: Select the Output Capacitor Choose the output capacitor to minimize the output voltage ripple while considering the increase in size and cost of a larger capacitor. Equation 32 calculates the output voltage ripple: ∆VOUT = LPRI•ILIM 2•COUT•VOUT (32)

analog.com Rev A 23 of 29 Step 7: Add Snubber Circuitry as Necessary With the primary components selected, construct the application to evaluate ringing at the drain of the MOSFET switch. A (RC + DZ) snubber is recommended for this application. For the RC snubber, use the equations from the Leakage Inductance and Snubbers section, or an estimate of component values from using the published leakage inductance of the transformer and selecting a snubber capacitor ranging from 1 to 3 times larger than the published MOSFET output capacitance. The maximum Zener breakdown voltage is set according to the maximum VIN and maximum drain voltage of MOSFET (Equation 33). VZENER(MAX) = VDS(MAX) − VIN(MAX) (33) Choose a diode that is fast and has sufficient reverse voltage breakdown. Step 8: Select the RFB Resistor Use Equation 34 to calculate the starting values for RFB. RFB = NPS•(VOUT +VF ) 100μA (34) Depending on the tolerance of standard resistor values, the precise resistor value may not exist. As discussed in the Applications Information section, adjust the final RFB value on the measured output voltage. Step 9: Select the EN/UVLO Resistors Determine the amount of hysteresis required and calculate the R1 resistor value using Equation 35. VIN(HYS) = 2.5μA • R1 (35) Determine the UVLO thresholds and calculate the R2 resistor value using Equation 36. VIN(UVLO+) = 1.246V•(R1+R2) + 2.5μA • R1 (36)

Table 6. Related Parts

Table 7. S6 Package 6-Lead Plastic TSOT-23 Figure 28. Package Drawing

Figure 31. Efficiency vs. Load Current

analog.com Rev A 28 of 29 ORDERING GUIDE Table 8. Ordering Guide

DESCRIPTION

LT8306RS6#TRMPBF LT8306RS6#TRPBF LTHNM 6-Lead Plastic TSOT-23 −40°C to 150°C AUTOMOTIVE PRODUCTS** LT8306RS6#WTRMPBF LT8306RS6#WTRPBF LTHNM 6-Lead Plastic TSOT-23 −40°C to 150°C Contact the factory for parts specified with wider operating temperature ranges. *Identify the temperature grade by a label on the shipping container. Tape and reel specifications: Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix. **Versions of this part are available with controlled manufacturing to support the quality and reliability requirements of automotive applications. These models are designated with a #W suffix. Only the automotive grade products shown are available for use in automotive applications. Contact your local Analog Devices account representative for specific product ordering information and to obtain the specific Automotive Reliability reports for these models.

ALL INFORMATION CONTAINED HEREIN IS PROVIDED “AS IS” WITHOUT REPRESENTATION OR WARRANTY. NO RESPONSIBILITY IS ASSUMED BY ANALOG DEVICES FOR ITS USE, NOR FOR ANY INFRINGEMENTS OF PATENTS OR OTHER RIGHTS OF THIRD PARTIES THAT MAY RESULT FROM ITS USE. SPECIFICATIONS ARE SUBJECT TO CHANGE WITHOUT NOTICE. NO LICENCE, EITHER EXPRESSED OR IMPLIED, IS GRANTED UNDER ANY ADI PATENT RIGHT, COPYRIGHT, MASK WORK RIGHT, OR ANY OTHER ADI INTELLECTUAL PROPERTY RIGHT RELATING TO ANY COMBINATION, MACHINE, OR PROCESS WHICH ADI PRODUCTS OR SERVICES ARE USED. TRADEMARKS AND REGISTERED TRADEMARKS ARE THE PROPERTY OF THEIR RESPECTIVE OWNERS. analog.com Rev A 29 of 29