LT7826 (Rev. 0)
Document overview
- Manufacturer or author: Analog Devices, Inc.
- PDF pages: 19
Technical content
Fully Integrated 17V/8A Switched Capacitor 2:1 Converter Configurable as a Voltage Divider, Doubler, or Inverter Rev. 0 DOCUMENT FEEDBACK TECHNICAL SUPPORT ©202 5 A n a l o g D e v i c e s , I n c . A l l r i g h t s r e s e r v e d .
FEATURES
Wide VHIGH/VLOW Voltage Range from 0V/0V to 17V/8.5V with a Startup Voltage of 3.45V Maximum Output Current 8A as a Voltage Divider Low Quiescent Current of 4µA at Shutdown Over 97% Peak Efficiency Standalone Voltage Divider (2:1), Doubler (1:2), Inverter (1:-1) Conversion Soft Startup into Steady-State Operation Inrush Current Limit and Overcurrent Protection Parallel Operation for Higher Output Power Integrated Bootstrap Diodes Available in a 3mm x 3mm LFCSP Package
APPLICATIONS
Battery System Applications Portable Consumer Electronics Industrial Applications GENERAL DESCRIPTION The LT®7826 is a fully integrated monolithic DC -to-DC converter. It achieves very high efficiency with a switched capacitor architecture in applications with an input-to-output voltage ratio of 2:1 (divider), 1:2 (doubler), or 1:1 (inverter). The LT7826 can handle a maximum voltage of 17V and provide a maximum output current of 8A, with fault protection. It features integrated bootstrap diodes and provides a compact and cost -effective solution for battery applications requiring current limit protection. The LT7826 ope rates at a fixed 500kHz switching frequency, while synchronization is available through the MODE pin for frequency tuning and interleave operation. The part is available in a 3mm x 3mm LFCSP package. TYPICAL APPLICATION Figure 1. High-Efficiency 2:1 Voltage Divider Figure 2. Efficiency vs. Load Current
analog.com Rev. 0 2 of 19 TABLE OF CONTENTS
analog.com Rev. 0 3 of 19
REVISION HISTORY
0 6/25 Initial release —
Table 1. Electrical Characteristics
analog.com Rev. 0 5 of 19 (TA = 25°C, VVHIGH = 8V, VRUN = 4V, VMODE = 4V, unless otherwise specified.) PARAMETER SYMBOL CONDITIONS COMMENTS MIN TYP MAX UNITS FAULT Leakage Current IFAULT_LEAK VRUN = 0V VFAULT = 17V 1 A VLOW Fault Threshold, Upper VVLOW_FAULT_UP VMODE = 4V VVLOW Rising VVHIGH + 0.32 V VLOW Fault Threshold, Lower VVLOW_FAULT_LOW VMODE = 4V VVLOW Falling VVHIGH - 0.32 V
1 Junction temperature (TJ) is calculated from the Ambient temperature (TA) and Power dissipation (PD)
according to the following formula: TJ = TA + (PD × JA) 2 All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to ground unless otherwise specified.
TA = 25°C unless otherwise specified. Table 2. Absolute Maximum Ratings 1 All voltages are referenced to SGND unless otherwise specified. extended periods may affect product reliability. attention to PCB thermal design is required.
Figure 3. Pin Configuration Table 3. Pin Descriptions
1 RUN
circuitry starts up, including a low-dropout regulator for INTVCC.
2 MODE
SWL waveform would be antiphase to the clock at the MODE pin.
3 FAULT
fault conditions, including UVLO and over temperature.
4 INTVCC
not use the INTVCC pin to supply power to any other IC. this pin with PGND pins on the PCB. from BSTL to SWL, and from BSTH to SWH. 9 SWL Low-side switching node. Connected to one terminal of flying capacitors.
analog.com Rev. 0 8 of 19 10, 11 VLOW Switched capacitor converter low-side voltage pin. Connect low-side capacitors from VLOW to PGND. 12 SWH High-side switching node. Connected to the other terminal of flying capacitors. 13, 14 VHIGH Switched capacitor converter high-side voltage pin. Connect high-side capacitors from VHIGH to PGND. 16 FLV Floating bias voltage for the internal driver circuit. A 0.1F~1F ceramic capacitor or other low ESR capacitor is required from this pin to the VLOW pin. 17 SWH Exposed pad is internally connected to SWH (Pin 12). 18 VLOW Exposed pad is internally connected to VLOW (Pins 10, 11). 19 SWL Exposed pad is internally connected to SWL (Pin 9).
Figure 12. LT7826 Block Diagram absolute maximum rating of 6V on this pin. INTVCC and the ground, and placed close to these pins.
analog.com Rev. 0 12 of 19 MODE Pin and Standby Mode With RUN pin voltage above 1.2V and INTVCC voltage above its UVLO threshold, LT7826 is ready for switching. However, switching will not start until the MODE pin voltage is higher than 1.2V. The MODE pin is pulled low with an internal 1.6MΩ resistor, which makes LT7826 default to not switching (standby) after power up. Connect the MODE pin to INTVCC or VHIGH to enable the LT7826 switching operation after power -up. The MODE pin can handle a maximum voltage of 12V. The MODE pin can also be used for synchronization. It responds to a clock signal with a frequency between 100kHz and 1MHz and an amplitude higher than 2.6V, which will be adopted as the switching frequency for full power operation. Phase inverting is also included in the design, causing SWL to run antiphase to the clock at the MODE pin. With this synchronization and phase inversion, interleave operation can be achieved when multiple LT7826s are connected in parallel. Pre-balance With RUN pin voltage above 1.2V, INTVCC voltage above its UVLO threshold, and MODE pin voltage above 1.2V, the LT7826 starts up and monitors the VHIGH and VLOW voltage continuously. To avoid surge current through the circuit, LT7826 enters a pre -balance mode if V VLOW is lower than V VHIGH/2 – 265mV or higher than V VHIGH/2 + 265mV. In pre - balance mode, the maximum internal power FET current is 485mA, and the switching frequency is 250kHz. When VVLOW is within the window of VVHIGH/2 ± 265mV, LT7826 exits pre-balance mode and starts full power switching. A function of enable/disable cycling over switching is included in the pre -balance mode operation in LT7826. With this function, the pre-balance switching continues for 16.4ms to charge up the flying and output capacitors. If V VLOW is still not close enough to VVHIGH/2 to activate full-power switching, LT7826 pauses switching for 49.1ms until its next switching enabled interval. This enables/disables cycling to continue as long as needed, averting over temperature if the flying or output capacitors are large, or if power pins are shorted to ground. Over Current Protection During steady-state operation, VLOW voltage drops linearly as load current increases. The overcurrent protection is implemented by monitoring the voltage difference between VVLOW and VVHIGH/2. When the difference exceeds 320mV, the LT7826 exits full power switching and reduces the maximum power Field-effect transistor (FET) current to 485mA. When overcurrent condition is removed and VVLOW returns to within the window of VVHIGH ± 265mV, LT7826 enters full power switching again. The function of enable/disable cycling over switching is also applied during overcurrent condition, as shown by the waveforms in Figure 11. FAULT Pin and Fault Response The 𝐅𝐀𝐔𝐋𝐓 pin is used for fault indication in LT7826, and is implemented with an open-drain structure. When LT7826 enters full power switching, the FAULT pin is released and may be pulled up externally to indicate the readiness of output. The FAULT pin w ould be pulled low in other situations, such as pre -balance mode, overcurrent, or overtemperature conditions. The overtemperature threshold in LT7826 is 175°C, above which all the switching stops. The die temperature must be lower than 165°C to re-start switching in LT7826.
analog.com Rev. 0 13 of 19 APPLICATIONS INFORMATION The Typical Application is an LT7826 voltage divider circuit. The converter can convert VHIGH voltage to VLOW voltage with a 2:1 step -down ratio and supply 8A load current in the steady state operation. In pre -balance or overcurrent conditions, the converter automatically limits the maximum power switch current to 485mA for thermal protection. Pre-balance Mode with Reduced Loading Capacity To avoid surge current through the circuit, after power up, LT7826 would enter a pre -balance mode if VVLOW is lower than VVHIGH/2 - 0.265V or higher than VVHIGH/2 + 0.265V. In pre-balance mode, the maximum current through the internal power switch is limited to 485mA, and LT7826 would switch at a frequency of 250kHz, or half of the default frequency of full-power switching. The flying capacitor and output capacit or would be gradually charged up by pre -balance mode operation. As VVLOW gets close to VVHIGH/2, the charging current would further reduce due to the lower overdrive voltage over the power switch inside LT7826. When VVLOW is within the window of VVHIGH/2 ± 265mV, LT7826 would exist in pre-balance mode and start full-power switching. Because of the reduced current capability during pre -balance mode, the loading current should be less than 30mA in pre-balance mode to ensure that VVLOW can get close enough to VVHIGH/2 to activate full-power switching. Effective Open-Loop Output Resistance And Load Regulation LT7826 does not regulate the output voltage through feedback closed loop system. The VLOW voltage is very close to half the VHIGH voltage in steady-state operation. As the load current increases, the output voltage decreases. The output resistance is very low, depending on the switching frequency and the capacitance of CFLY and CLOW. In many applications, multi -layer ceramic capacitors (MLCC) are selected as flying capacitors. The voltage coefficients of MLCC capacitors strongly depend on the type and size of capacitors. Normally, larger-size X7R MLCC capacitors are better than X5R in terms of voltage coefficient. The MLCCs still drop 20% to 30% capacitance with high DC bias voltage. Capacitance derating needs to be considered when estimating the output resi stance of the switched capacitor circuits. Input/Output Capacitor and Flying Capacitor Selection In switched capacitor applications, large AC currents flow through the flying capacitors and input/output capacitors. Low ESR ceramic capacitors are highly recommended for these applications. Ensure the maximum RMS capacitor current is within the spec, or higher-rated capacitors are preferred. Note that capacitor manufacturers’ ripple current ratings are often based on only 2000 hours of life. This makes it advisable to further derate the capacitor, or to choose capacitors rated at a higher temperature than required. Several capacitors may be paralleled to meet size or height requirements in the design. The LTspice® simulation tool can be used to quantify the root mean square (RMS) current. Generally, the higher the capacitance of the flying capacitor, the lower the flying capacitor voltage ripple, and the higher power efficiency the switched capacitor converter can achieve. In a voltage divider application, flying capacitor voltage ripple can be estimated with the following equation: 𝑉𝐶𝐹𝐿𝑌_𝑅𝐼𝑃𝑃𝐿𝐸 = 𝐼𝑂𝑈𝑇 2×𝑓𝑆𝑊 ×𝐶𝐹𝐿𝑌 Selecting the flying capacitor so that the ripple voltage is around 100mV at the full load condition is a good start. The input capacitor’s RMS current is approximately half of the load current. The input capacitor must be selected to accommodate the maximum load conditions. The output capacitor would largely impact the output voltage ripple at the switching frequency. The higher the capacitance at the output port, the smaller voltage ripples the output would contain.
analog.com Rev. 0 14 of 19 Voltage Doubler Applications The LT7826 may be used as a voltage doubler, with VLOW as the input and VHIGH as the output. After power up LT7826 doubler would enter pre -balance mode to gradually charge up the flying capacitor and output capacitor. When VVHIGH is higher than 2V VLOW - 530mV, the circuit would exist pre -balance mode and start full -power switching. Over current protection would be triggered when V VHIGH is lower than 2V VLOW - 640mV, and the power switch current would be limited to 485mA or less. The maximum output current a single LT7826 doubler can provide is 4A. Voltage Inverter Applications The LT7826 may be used as a voltage inverter, with the input source V IN connected between VHIGH and VLOW, and PGND as the system output referred to VLOW as system ground. After power up LT7826 inverter would enter pre-balance mode to gradually charge up the flying capacitor and output capacitor. When system output is within the window of -VIN ± 265mV, the circuit would exist pre -balance mode and start full -power switching. Overcurrent protection would be triggered when system output is out of the window of -VIN ± 320mV, and the power switch current would be limited to 485mA or less. The maximum output current a single LT7826 inverter can provide is 4A. Interleave Operation in Parallel Applications Multiple LT7826 converters can be connected in parallel in high -power applications. The synchronization function with the MODE pin can be utilized to achieve interleave operation, as shown in Figure 13. The parallel connection of LT7826s with interleave operation can also be implemented in doubler or inverter applications. PCB Layout Checklist When laying out the printed circuit board, the following checklist should be used to ensure proper operation of the IC: 1. Is the exposed pad SWH/VLOW/SWL solidly connected to the corresponding pins on the PCB? 2. Are all the capacitors CFLY/CHIGH/CLOW close to the IC? The PCB trace to those capacitors should be wide enough to handle large load currents. 3. Is the INTVCC bypassing capacitor connected close to the IC, between the INTVCC and the ground plane? 4. Are the bootstrap capacitors connected close to the IC, between the BSTH and SWH, and the BSTL and SWL? 5. Are the PCB traces to VHIGH/VLOW/PGND wide enough to handle large load currents? 6. In the cases of a multilayer board, are there enough thermal vias on the VHIGH/VLOW/PGND plane? For more information, refer to the Evaluation board design for the PCB layout examples.
Figure 15. High-Efficiency 7.4V (VIN) to 3.7V (VOUT), 16A Voltage Divider with Interleave Operation
analog.com Rev. 0 17 of 19 OUTLINE DIMENSIONS
Table 4. Ordering Guide
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