LT6023

LT6023/LT6023-1 – Dual Micropower, 1V/µs Precision Rail-to-Rail Output Amplifier

Document overview

• Manufacturer or author: Linear Technology Corporation
• PDF pages: 22

Technical content

60231faFor more information www.linear .com/L T6023 TYPICAL APPLICATION FEATURES DESCRIPTION Dual Micropower, 1.4V/µs Precision Rail-to-Rail Output Amplifier The LT®6023 is a low power, enhanced slew rate, precision operational amplifier. The proprietary circuit topology of this amplifier gives excellent slew rate at low quiescent power dissipation without compromising precision or settling time. In addition, proprietary input stage circuitry allows the input impedance to remain high during input voltage steps as large as 5V. The combination of preci- sion specs along with fast settling makes this part ideal for MUX applications. The low quiescent current of the LT6023 along with its ability to operate on supplies as low as 3V make it useful in portable systems. The LT6023-1 features a shutdown mode which reduces the typical supply current to 800nA. The LT6023 is available in the small 8-lead DFN and 8-lead MSOP packages. The LT6023-1 is available in a 10-lead DFN package. ±13.6V Input Range MUX Buffer MUX Buffer Response, 12V Step

APPLICATIONS

n Precision Signal Processing n DAC Amplifier n Multiplexed ADC Applications n Low Power Portable Systems n Low Power Wireless Sensor Networks L, LT, LT C, LT M, Linear Technology, SmartMesh and the Linear logo are registered trademarks and SoftSpan is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. Patent Pending. n Excellent Slew Rate to Power Ratio n Slew Rate: 1.4V/μs n Maximum Supply Current: 20μA/Amplifier n Maximum Offset Voltage: 30μV n High Dynamic Input Impedance n Fast Recovery from Shutdown n Maximum Input Bias Current: 3nA n No Output Phase Inversion n Gain Bandwidth Product: 40kHz n Wide Specified Supply Range: 3V to 30V n Operating Temperature Range: –40°C to 125°C n Rail-to-Rail Outputs n DFN and MS8 Packages

60231 TA01a

–15V 15V IN1 IN2 GND 15V –15V VIN1 –6V VIN2 6V – 1/2 LT6023 2V/DIV 20µs/DIV 60231 TA01b

60231fa For more information www.linear .com/L T6023 PIN CONFIGURATION ABSOLUTE MAXIMUM RATINGS Input Voltage (DGND, EN, +IN, –IN) (Note 1) TOP VIEW DD PACKAGE 8-LEAD (3mm × 3mm) PLASTIC DFN

1 OUTA

–INA +INA V OUTB –INB +INB A B θJA = 43°C/W, θJC = 5.5°C/W EXPOSED PAD (PIN 9) IS CONNECTED TO V– (PIN 4) (PCB CONNECTION OPTIONAL) TOP VIEW DD PACKAGE 10-LEAD (3mm × 3mm) PLASTIC DFN 1 V+ OUTB –INB +INB EN OUTA –INA +INA V DGND A B θJA = 43°C/W, θJC = 5.5°C/W EXPOSED PAD (PIN 11) IS CONNECTED TO V– (PIN 4) (PCB CONNECTION OPTIONAL) OUTA –INA +INA V OUTB –INB +INB TOP VIEW MS8 PACKAGE 8-LEAD PLASTIC MSOP A B θJA = 163°C/W, θJC = 40°C/W ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT6023IDD#PBF LT6023IDD#TRPBF LGRS 8-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT6023HDD#PBF LT6023HDD#TRPBF LGRS 8-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT6023IDD-1#PBF LT6023IDD-1#TRPBF LGRV 10-Lead (3mm × 3mm) Plastic DFN –40°C to 85°C LT6023HDD-1#PBF LT6023HDD-1#TRPBF LGRV 10-Lead (3mm × 3mm) Plastic DFN –40°C to 125°C LT6023IMS8#PBF LT6023IMS8#TRPBF L TGRT 8-Lead Plastic MSOP –40°C to 85°C LT6023HMS8#PBF LT6023HMS8#TRPBF L TGRT 8-Lead Plastic MSOP –40°C to 125°C Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Operating and Specified Temperature Range

60231faFor more information www.linear .com/L T6023

ELECTRICAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage DD Packages l 20 70 160 µV µV l 5 30 160 µV µV ∆VOSI ∆Temp Input Offset Voltage Drift (Note 2) DD Packages l –3.5 ±0.9 3.5 µV/°C ∆VOSI ∆Time Long Term Input Offset Voltage Stability ±0.2 µV/Mo IB Input Bias Current T A = –40° to 85°C TA = –40° to 125°C l l –10 ±0.1 3 nA nA nA I OS Input Offset Current T A = –40° to 85°C TA = –40° to 125°C l l ±0.1 nA nA nA Input Noise Voltage 0.1Hz to 10Hz 3 µV P-P en Input Noise Voltage Density f = 1Hz f = 1kHz 132 132 nV/√Hz nV/√Hz i n Input Noise Current Density f = 1kHz 12.1 fA/√Hz CIN Input Capacitance Common Mode Differential Mode 1.5 2.5 pF pF R IN Input Resistance Common Mode Differential Mode 140 330 GΩ MΩ V ICM Common Mode Input Range l V– + 1.2 V+ – 1.4 V CMRR Common Mode Rejection Ratio VCM = –13.8V to 13.6V l 120 116 136 dB dB PSRR Supply Rejection Ratio V S = 3V to 30V l 120 110 140 dB dB AVOL Large-Signal Voltage Gain RL = 10kΩ, VOUT = ±14V l 110 100 114 dB dB R L = 100kΩ, VOUT = ±14.5V l 126 116 134 dB dB V OL Output Swing Low (VOUT – V–) RL = 10kΩ TA = –40° to 85°C TA = –40° to 125°C l l 180 300 380 430 mV mV mV V OH Output Swing High (V+ – VOUT) RL = 10kΩ TA = –40° to 85°C TA = –40° to 125°C l l 115 140 165 190 mV mV mV ISC Short-Circuit Current VOUT = 0V, Sourcing TA = –40° to 85°C TA = –40° to 125°C l l 2.5 5.25 mA mA mA V OUT = 0V, Sinking TA = –40° to 85°C TA = –40° to 125°C l l 6.5 4.5 15 mA mA mA The l denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V. DGND and EN specifications only apply to the LT6023-1.

60231fa For more information www.linear .com/L T6023 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS SR Slew Rate AVCL = 1, 10V Step TA = –40° to 85°C TA = –40° to 125°C l l 0.85 0.7 0.6

1.4 V/μs

V/μs V/μs A VCL = 1, 5V Step TA = –40° to 85°C TA = –40° to 125°C l l 0.3 0.25 0.2

0.65 V/μs

V/μs V/μs GBW Gain-Bandwidth Product f = 1kHz l 29 40 kHz Minimum Supply Voltage Guaranteed by PSRR l 3 V IS Supply Current per Amplifier T A = –40° to 85°C TA = –40° to 125°C l l 18 20 μA μA μA Supply Current in Shutdown V EN = 0.8V TA = –40° to 85°C TA = –40° to 125°C l l 0.8 3 3.2 3.6 μA μA μA t s Settling Time (AV = 1) 0.1% 5V Output Step 0.01% 5V Output Step 0.0015% 5V Output Step 0.0015% 10V Output Step 124 132 μs μs μs μs t ON Enable Time AV = 1 480 µs VDGND DGND Pin Voltage Range l V– V+ – 3 V IDGND DGND Pin Current l –200 nA IEN EN Pin Current l –200 nA VENL EN Pin Input Low Voltage Relative to DGND l 0.8 V VENH EN Pin Input High Voltage Relative to DGND l 1.7 V The l denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C, VS = ±15V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 5V. DGND and EN specifications only apply to the LT6023-1.

60231faFor more information www.linear .com/L T6023 SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VOS Input Offset Voltage DD Packages l 20 100 190 µV µV l 5 45 175 µV µV ∆VOSI ∆Temp Input Offset Voltage Drift (Note 2) DD Packages l –3.5 ±0.9 3.5 µV/°C ∆VOSI ∆Time Long Term Input Offset Voltage Stability ±0.2 µV/Mo IB Input Bias Current ±1 nA IOS Input Offset Current ±0.1 nA Input Noise Voltage 0.1Hz to 10Hz 3 µVP-P en Input Noise Voltage Density f = 1Hz f = 1kHz 132 132 nV/√Hz nV/√Hz i n Input Noise Current Density f = 1kHz 12.1 fA/√Hz CIN Input Capacitance Common Mode Differential Mode 1.5 2.5 pF pF R IN Input Resistance Common Mode Differential Mode 140 400 G Ω MΩ VICM Common Mode Input Range l V– + 1.2 V+ – 1.4 V CMRR Common Mode Rejection Ratio VCM = 1.2V to 1.6V 125 dB PSRR Supply Rejection Ratio VS = 3V to 30V l 120 110 140 dB dB A VOL Large-Signal Voltage Gain RL = 10kΩ, VOUT = 0.5V to 2.5V l 108 dB dB R L = 100kΩ, VOUT = 0.5V to 2.5V 136 dB VOL Output Swing Low (VOUT – V–) RL = 10kΩ TA = –40° to 85°C TA = –40° to 125°C l l 60 100 150 170 mV mV mV V OH Output Swing High (V+ – VOUT) RL = 10kΩ TA = –40° to 85°C TA = –40° to 125°C l l 60 80 100 mV mV mV ISC Short-Circuit Current VOUT = 1.5V, Sourcing TA = –40° to 85°C TA = –40° to 125°C l l 2.5 2.25 3.5 mA mA mA V OUT = 1.5V, Sinking TA = –40° to 85°C TA = –40° to 125°C l l 3.5 5 mA mA mA SR Slew Rate (Note 3) A VCL = –1, 2V Step 0.05 V/μs GBW Gain-Bandwidth Product f = 1kHz 40 kHz Minimum Supply Voltage Guaranteed by PSRR l 3 V The l denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C, VS = 3V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 3V. DGND and EN pin specifications only apply to the LT6023-1.

60231fa For more information www.linear .com/L T6023 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: Guaranteed by design. Note 3: The slew rate of the LT6023 increases with the size of the input step. At lower supplies, the input step size is limited by the input common mode range. This trend can be seen in the Typical Performance Characteristics. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IS Supply Current per Amplifier TA = –40° to 85°C TA = –40° to 125°C l l 15 20 μA μA μA Supply Current in Shutdown V EN = 0.8V TA = –40° to 85°C TA = –40° to 125°C l l 0.2 1.1 1.5 μA μA μA t s Settling Time (AV = –1) 0.1% 2.4V Output Step 0.01% 2.4V Output Step 0.0015% 2.4V Output Step 100 250 μs μs μs t ON Enable Time AV = 1 580 µs VDGND DGND Pin Voltage Range l V– V+ – 3 V IDGND DGND Pin Current –75 nA IEN EN Pin Current –75 nA VENL EN Pin Input Low Voltage Relative to DGND l 0.8 V VENH EN Pin Input High Voltage Relative to DGND l 1.7 V The l denotes the specifications which apply over the specified temperature range, otherwise specifications are at TA = 25°C, VS = 3V, VCM = VOUT = Mid-Supply, VDGND = 0V, VEN = 3V. DGND and EN pin specifications only apply to the LT6023-1.

60231faFor more information www.linear .com/L T6023 TYPICAL PERFORMANCE CHARACTERISTICS Offset Voltage vs Supply Voltage Offset Voltage vs Input Common Mode Voltage TA = 25°C, VS = ±15V, RL = 100kΩ, unless otherwise specified. MS8 PACKAGE

1386 AMPLIFIERS

INPUT OFFSET VOL TAGE (µV) –30 –20 –10 100 200 300 400 500 600 700 800 NUMBER OF AMPLIFIERS Offset Voltage Typical Distribution of Input

6023 G01

2870 AMPLIFIERS

INPUT OFFSET VOL TAGE (µV) –80 –60 –40 –20 200 400 600 800 1000 NUMBER OF AMPLIFIERS Offset Voltage Typical Distribution of Input

6023 G02

215 AMPLIFIERS

INPUT OFFSET VOL TAGE DRIFT (µV/°C) 100 120 140 160 NUMBER OF AMPLIFIERS Offset Voltage Drift Typical Distribution of Input

6023 G03

INPUT OFFSET VOL TAGE DRIFT (µV/°C) NUMBER OF AMPLIFIERS Offset Voltage Drift Typical Distribution of Input

6023 G04

210 AMPLIFIERS

80 AMPLIFIERS

INPUT OFFSET VOL TAGE SHIFT (µV) –10 NUMBER OF AMPLIFIERS IR Reflow Offset Voltage Shift vs Lead Free

6023 G05

TOTAL SUPPL Y VOL TAGE (V) OFFSET VOL TAGE (µV) –40 –20 –10 –30 –50 2012 28

6023 G07

3 TYPICAL UNITS

INPUT COMMON MODE VOL TAGE (V) –15 OFFSET VOL TAGE (µV) –20 –40 –5 5

6023 G08

15–10 100

10 TYPICAL UNITS

TEMPERATURE (°C) –50 –25 100 125 –160 –120 –80 –40 120 160 INPUT OFFSET VOL TAGE (µV) vs Temperature Typical Input Offset Voltage

6023 G06

60231fa For more information www.linear .com/L T6023 TYPICAL PERFORMANCE CHARACTERISTICS Slew Rate vs Temperature (5V Step) Slew Rate vs Temperature (10V Step) TA = 25°C, VS = ±15V, RL = 100kΩ, unless otherwise specified. Slew Rate vs Input Step TEMPERATURE (°C) –50 SLEW RATE (V/µs) 0.75 0.5 0.25 25 75

6023 G15

125–25 0 10050 FALLING EDGE RISING EDGE Input Bias Current vs Temperature Input Bias Current vs Differential Input Voltage 0.1Hz to 10Hz Voltage Noise Voltage Noise Density vs Frequency Large-Signal T ransient Response (5V Step) Maximum Undistorted Output Amplitude vs Frequency TEMPERATURE (°C) –50 INPUT BIAS CURRENT (nA) 25 75

6023 G09

125–25 0 10050 1µV/DIV 1s/DIV

6023 G11

FREQUENCY (Hz) VOL TAGE NOISE DENSITY (nV/√Hz)

6023 G12

0.01 0.1 1 1k 10k100 10 VS = ±5V 2V/DIV 50µs/DIV

6023 G14

10V STEPAV = 1 5V STEP TEMPERATURE (°C) –50 SLEW RATE (V/µs) 1.5 0.5 25 75

6023 G16

125–25 0 10050 FALLING EDGE RISING EDGE INPUT STEP SIZE (VP–P) SLEW RATE (V/µs) 3.5 2.5 1.5 0.5 15 25

6023 G17

DIFFERENTIAL INPUT VOL TAGE (V) –0.75 –0.5 –0.25 0.25 0.5 0.75 INPUT BIAS CURRENT (µA)

6023 G10

FREQUENCY (kHz) MAXIMUM UNDISTORTED OUTPUT VOL TAGE (VP–P)

6023 G13

0.1 1 10 THD < 40dBc AV = 1

60231faFor more information www.linear .com/L T6023 Small-Signal T ransient Response Overshoot vs Capacitive Load TYPICAL PERFORMANCE CHARACTERISTICS PSRR vs Frequency CMRR vs Frequency Open-Loop Gain and Phase vs Frequency Open Loop Gain vs Load Output Impedance vs Frequency TA = 25°C, VS = ±15V, RL = 100kΩ unless otherwise specified. LOAD CURRENT (mA) OPEN LOOP GAIN (dB)

6023 G24

0.01 0.1 101 VOUT = ±14.5V 2mV/DIV 50µs/DIV

6023 G18

AV = 1 100pF 330pF CAPACITIVE LOAD (pF) OVERSHOOT (%) 600

6023 G19

VS = ±1.5V VS = ±15V FREQUENCY (Hz) POWER SUPPL Y REJECTION RATIO (dB)

6023 G20

10m 100m 1 1k 100k 10k100 10 +PSRR –PSRR FREQUENCY (Hz) COMMON MODE REJECTION RATIO (dB)

6023 G21

FREQUENCY (Hz) OPEN LOOP GAIN (dB) OPEN LOOP PHASE (°)

6023 G22

–20 –45 –135 –90 –180 –225 100m 1 1k 100k 10k100 10 VS = ±15V V S =±15V C L =100p, A V C L =330p, A V C L =330p, A V =–1 FREQUENCY (Hz) 100 10k 100k –12 GAIN (dB) Gain vs Frequency

6023 G23

FREQUENCY (Hz) OUTPUT IMPEDANCE (/uni03A9)

6023 G25

0.1 0.01 10 100 1k 10k 1M100k AV = 1

60231fa For more information www.linear .com/L T6023 TYPICAL PERFORMANCE CHARACTERISTICS Negative Output Overdrive Recovery Positive Output Overdrive RecoveryCrosstalk vs Frequency TA = 25°C, VS = ±15V, RL = 100kΩ unless otherwise specified. Supply Current vs Supply Voltage Shutdown Supply Current vs Temperature Start-Up Response Enable/Disable Response Output Saturation Voltage vs Sink Current (Output Low) Output Saturation Voltage vs Source Current (Output High) TOTAL SUPPL Y VOL TAGE (V) SUPPY CURRENT PER AMPLIFIER (µA)

6023 G26

125°C 85°C 25°C –40°C TEMPERATURE (°C) –50 SHUTDOWN SUPPL Y CURRENT (µA) 1.5 0.5 25 75

6023 G27

125–25 0 10050 VS = ±15V VS = ±1.5V 0mA 200µs/DIV

6023 G28

VS = ±10V AV = 1 VIN = 1V VS 20V/DIV VOUT 2V/DIV 5mA/DIV 0µA 500µs/DIV

6023 G29

40µA/DIV LOAD CURRENT (mA) OUTPUT LOW SATURATION VOL TAGE (V)

6023 G30

0.1 0.01 0.1 1 10 TA = 125°C TA = 85°C TA = 25°C TA = –40°C LOAD CURRENT (mA) OUTPUT HIGH SATURATION VOL TAGE (V)

6023 G31

0.1 0.01 0.1 1 10 TA = 125°C TA = 85°C TA = 25°C TA = –40°C FREQUENCY (Hz) CROSSTALK (dB)

6023 G32

–20 –40 –60 –80 –100 –120 –140 10 1k 100 10k 100k 1M 2ms/DIV

6023 G33

AV = 100 INPUT 200mV/DIV OUTPUT 5V/DIV 2ms/DIV

6023 G34

AV = 100 INPUT 200mV/DIV OUTPUT 5V/DIV

60231faFor more information www.linear .com/L T6023 PIN FUNCTIONS OUT: Amplifier Output. –IN: Inverting Input of the Amplifier. +IN: Noninverting Input of the Amplifier. V –: Negative Power Supply. A bypass capacitor should be used between supply pins and ground. Additional bypass capacitance may be used between the power supply pins. DGND (LT6023-1 Only): Reference for EN Pin. It is normally tied to ground. DGND must be in the range from V– to V+ –3V. If grounded, V+ must be ≥ 3V. The EN pin threshold is specified with respect to the DGND pin. DGND cannot be floated. EN (LT6023-1 Only): Enable Input. This pin must be connected high, normally to V+, for the amplifiers to be functional. EN is active high with the threshold approxi- mately two diodes above DGND. EN cannot be floated. The shutdown threshold voltage is specified with respect to the voltage on the DGND pin. V +: Positive Power Supply. A bypass capacitor should be used between supply pins and ground. Additional bypass capacitance may be used between the power supply pins. SIMPLIFIED SCHEMATIC 60231 SS +IN –IN OUT EN LT6023-1 ONLY DGND LOAD CLASS AB DRIVE

Figure 1. Settling Time Is Essentially Flat rate more common in traditional micropower amplifiers. phisticated than that shown in the Simplified Schematic. fied input bias current may flow in or out of the input pins.

60231 F01

ensure that the low power operation is preserved. fier is forcing the two inputs to be at the same potential. output and overdriving the input.

Figure 2. Some Op Amp Configurations Do Not Require Rail-to-Rail Inputs to Achieve Rail-to-Rail Outputs

60231 F02

contribute only negligibly to error. the specified input voltage range as shown in Figure 4. Figure 4. No Phase Inversion

60231 F04

Figure 3. Extreme Inverting Case: Circuit Operates Properly

60231 F03

whether or not the op amp must have rail-to-rail inputs.

Figure 5. Increased Ib Beyond VICM

60231 F05

as the input voltage does not exceed the supply voltage. also generate temperature differentials. feedback resistor values as well as the loads on the device. in Figure 6 will eliminate any ringing or oscillation. Figure 6. Stability with Parasitic Input Capacitance

Figure 7. LT6023-1 Enable Pin Control Examples

60231 F07

powered back down to save power.

60231fa For more information www.linear .com/L T6023 TYPICAL APPLICATIONS

60231 F02a

4.7pF LOAD

60231 F02b

High Open-Loop Gain Composite Amplifier Parallel Amplifiers Achieves 93nV/√Hz Noise, Doubles Output Drive and Lowers Offset

60231faFor more information www.linear .com/L T6023 Micropower Reference Divider/Buffer TYPICAL APPLICATIONS

60231 F02c

49.9/uni03A9 0.1µF 10µF 49.9k 49.9/uni03A9 R2* 100k 0.1µF R3* 100k 10µF 1µF 0.1µF R1* 100k R4* 100k LT6656-4.096 IN OUT GND 4.096V 2.048V *LT5400-2

60231fa For more information www.linear .com/L T6023 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1) 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.125 TYP 2.38 ±0.10 PIN 1 TOP MARK (NOTE 6)

0.200 REF

0.00 – 0.05 (DD8) DFN 0509 REV C 0.25 ±0.05 2.38 ±0.05 RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 1.65 ±0.05 (2 SIDES)2.10 ±0.05 0.50 BSC 0.70 ±0.05 3.5 ±0.05 PACKAGE OUTLINE 0.25 ±0.05

0.50 BSC

8-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1698 Rev C)

60231faFor more information www.linear .com/L T6023 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. 3.00 ±0.10 (4 SIDES) NOTE: 1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2). CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ±0.10 BOTTOM VIEW—EXPOSED PAD 1.65 ±0.10 (2 SIDES) 0.75 ±0.05 R = 0.125 TYP 2.38 ±0.10 (2 SIDES) 106 PIN 1 TOP MARK (SEE NOTE 6) 0.00 – 0.05 (DD) DFN REV C 0310 0.25 ±0.05 2.38 ±0.05 (2 SIDES) RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS 1.65 ±0.05 (2 SIDES)2.15 ±0.05 0.50 BSC 0.70 ±0.05 3.55 ±0.05 PACKAGE OUTLINE 0.25 ±0.05 10-Lead Plastic DFN (3mm × 3mm) (Reference LTC DWG # 05-08-1699 Rev C) PIN 1 NOTCH R = 0.20 OR 0.35 × 45° CHAMFER

60231fa For more information www.linear .com/L T6023 PACKAGE DESCRIPTION Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. MSOP (MS8) 0213 REV G 0.53 ±0.152 (.021 ±.006) SEATING PLANE NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.18 (.007) 0.254 (.010) 1.10 (.043) MAX 0.22 – 0.38 (.009 – .015) TYP 0.1016 ±0.0508 (.004 ±.002) 0.86 (.034) REF 0.65 (.0256) BSC 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 1 2 3 4 4.90 ±0.152 (.193 ±.006) 8 7 6 5 3.00 ±0.102 (.118 ±.004) (NOTE 3) 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.52 (.0205) REF 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.42 ± 0.038 (.0165 ±.0015) TYP 0.65 (.0256) BSC 8-Lead Plastic MSOP (Reference LTC DWG # 05-08-1660 Rev G)

60231faFor more information www.linear .com/L T6023 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 04/15 Updated typical slew rate to be consistent throughout the data sheet Corrected negative supply voltage on front page circuit Corrected Input Bias Current vs. Differential Input Voltage graph 1, 4

60231fa For more information www.linear .com/L T6023 Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417  LINEAR TECHNOLOGY CORPORATION 2015 LT 0415 REV A • PRINTED IN USA (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com/L T6023 RELATED PARTS TYPICAL APPLICATION PART NUMBER DESCRIPTION COMMENTS LT6004 2kHz, 1µA RRIO Op Amp VOS: 500µV, GBW: 2kHz, SR: 0.8V/ms, en: 325nV/√Hz, Is: 1µA LT1490A 200kHz, 50µA RRIO Op Amp VOS: 500µV, GBW: 200kHz, SR: 0.06V/µs, en: 50nV/√Hz, Is: 50µA LTC6256 6.5MHz, 65µA RRIO Op Amp VOS: 350µV, GBW: 6.5MHz, SR: 1.8V/µs, en: 20nV/√Hz, Is: 65µA LT6020 400kHz, 100µA, 5V/µs Op Amp VOS: 30µV, GBW: 400kHz, SR: 5V/µs, en: 46nV/√Hz, Is: 100µA LTC2055 500kHz, 150µA Zero-Drift Op Amp VOS: 3µV, GBW: 500kHz, SR: 0.5V/µs, Is: 150µA LT1783 1.2MHz, 230µA Over-The-Top RRIO Op Amp VOS: 600µV, GBW: 1.2MHz, SR: 0.4V/µs, en: 20nV/√Hz, Is: 230µA LT1352 3MHz. 200V/µs Op Amp VOS: 600µV, GBW: 3MHz, SR: 200V/µs, en: 14nV/√Hz, Is: 330µA LT1492 5MHz, 3V/µs Op Amp VOS: 180µV, GBW: 5MHz, SR: 3V/µs, en: 16.5nV/√Hz, Is: 550µA LTC5800 SmartMesh® Wireless Sensor Network IC Wireless Mesh Networks LT5400 Quad Matched Resistor Network 0.01% Matching 16-Bit DAC with ±10V Output Swing 20V Output Step Response Improved Load Drive CapabilityGain of 11 Instrumentation Amplifier

60231 TA03b

60231 TA03d

200µs/DIV VOUT

60231 TA03c

1µF RFB INV 16-BIT DAC CONTROL LOGIC – +CS DIN CLR SCLK 16-BIT DATA LATCH 16-BIT SHIFT REGISTER 0.1µF 3.8VDC TO 5.5VDC 0.1µF 15V –15V LT5400-2 100k/uni03A9 MATCHED RESISTOR NETWORK 1/2 LT6023 1/2 LT6023 VOUT POWER-ON RESET LTC6652-2.5 IN OUT GND

60231 TA03a

R1 TO R4: FOR HIGH DC CMRR USE LT5400-3 VINP 1/2 LT6023 1/2 LT6023 R1, 100k –3dB BW = 6kHz R2, 10k VOUT R3, 10kR4, 100k