LT5514

LT5514 - Ultralow Distortion IF Amplifier/ADC Driver with Digitally Controlled Gain

Document overview

• Manufacturer or author: Linear Technology Corporation
• PDF pages: 20

Technical content

n Output IP3 at 100MHz: 47dBm n Maximum Output Power: 21dBm n Bandwidth: LF to 850MHz n Propagation Delay: 0.8ns n Maximum Gain: 33dB n Noise Figure: 7.3dB (Max Gain) n Gain Control Range: 22.5dB n Gain Control Step: 1.5dB n Gain Control Settling Time: 500ns n Output Noise Floor: –134dBm/Hz (Max Gain) n Reverse Isolation: –80dB n Single Supply: 4.75V to 5.25V n Low Power Mode n Shutdown Mode n Enable/Disable Time: 1ms n Differential I/O Interface n 20-Lead TSSOP Package n High Linearity ADC Driver n IF Sampling Receivers n VGA IF Power Amplifier n 50W Driver n Instrumentation Applications , LTC and LT are registered trademarks of Linear Technology Corporation. DESCRIPTIO UFEATURES APPLICATIO SU The LT 5514 is a programmable gain amplifier (PGA) with bandwidth extending from low frequency (LF) to 850MHz. It consists of a digitally controlled variable attenuator, followed by a high linearity amplifier. The amplifier is configured with two identical transconductance amplifi- ers, hard wired in parallel with individual dedicated enable pins. When both amplifiers are enabled (Standard mode), the LT5514 offers an OIP3 of +47dBm (at 100MHz). Power dissipation can be reduced when a single amplifier is enabled (Low Power mode). Four parallel digital inputs control the gain over a 22.5dB range with 1.5dB step resolution. An on-chip power supply regulator/filter helps isolate the amplifier signal path from external noise sources. The LT5514’s open-loop architecture offers stable opera- tion for any practical load conditions, including peaking- free AC response when driving capacitive loads, and excellent reverse isolation. The LT5514 may be operated broadband, where the out- put differential RC time constant sets the bandwidth, or it may be used as a narrowband driver with the appropriate output filter. TYPICAL APPLICATIO U FREQUENCY (MHz) 150

5514 TA02

OIP3 (dBm) ROUT = 200Ω ROUT = 100ΩLT5514 ADC 0.1µF 0.1 µF 100Ω CHOKE GAIN CONTROL CHOKE 0.1µF

5514 TA01

0.1µF IF AMP IF BPF LO RF INPUT

4 LINES

(Standard Mode)

(Notes 1, 2) Control Input Voltage (ENA, ENB, PGAx) .. –0.5V to VCC Operating Ambient Temperature Range .. – 40°C to 85°C LT5514EFE TJMAX = 150°C, qJA = 38°C/W EXPOSED PAD (PIN 21) IS GND MUST BE SOLDERED TO PCB ABSOLUTE MAXIMUM RATINGSW WW U PACKAGE/ORDER INFORMATIONW UU Consult LTC Marketing for parts specified with wider operating temperature ranges. TOP VIEW ENA V CC1 GND GND IN IN– GND GND PGA0 PGA1 ENB V CC2 GND GND OUT OUT+ GND GND PGA3 PGA2 FE PACKAGE 20-LEAD PLASTIC TSSOP ODES OF OPERATIO UW MODES ENA ENB AMP A AMP B LT5514 STATE

1 Full Power (Standard) High High On On Enable Amp A and Amp B

2 Low Power A High Low On Off Enable Amp A

3 Low Power B Low High Off On Enable Amp B

4 Shutdown Low Low Off Off Sleep, All Amps Disabled

ATTENUATION STEP POWER GAIN RELATIVE TO MAX GAIN PGA0 PGA1 PGA2 PGA3 STANDARD MODE* LOW POWER MODE** 1 0dB High High High High 33.0dB 30.0dB 2 –1.5dB Low High High High 31.5dB 28.5dB 3 –3.0dB High Low High High 30.0dB 27.0dB 4 –4.5dB Low Low High High 28.5dB 25.5dB 5 –6.0dB High High Low High 27.0dB 24.0dB 6 –7.5dB Low High Low High 25.5dB 22.5dB 7 –9.0dB High Low Low High 24.0dB 21.0dB 8 –10.5dB Low Low Low High 22.5dB 19.5dB 9 –12.0dB High High High Low 21.0dB 18.0dB 10 –13.5dB Low High High Low 19.5dB 16.5dB 11 –15.0dB High Low High Low 18.0dB 15.0dB 12 –16.5dB Low Low High Low 16.5dB 13.5dB 13 –18.0dB High High Low Low 15.0dB 12.0dB 14 –19.5dB Low High Low Low 13.5dB 10.5dB 15 –21.0dB High Low Low Low 12.0dB 9.0dB 16 –22.5dB Low Low Low Low 10.5dB (Note 3) 7.5dB (Note 3) *ROUT = 200W **ROUT = 400W PROGRA ABLE GAI SETTI GS U UWW

VCC = 5V, VCCO = 5V, ENA = ENB = 3V, TA = 25°C, unless otherwise noted. (Note 7) (Test circuits shown in Figures 9 and 10) DC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Normal Operating Conditions VCC Supply Voltage (Pins 2, 19) (Note 4) 4.75 5 5.25 V VCCO OUT+, OUT– Output Pin DC Common Mode Voltage OUT +, OUT– Connected to VOSUP via 3 5 6 V Choke Inductors or Resistors (Note 5) VOUT OUT+, OUT– Pin Instantaneous Voltage with Min/Max Limits Apply 2 8 V Respect to GND Shutdown DC Characteristics, ENA = ENB = 0.6V VIN(BIAS) IN+, IN– Bias Voltage Max Gain (Note 6) 1.15 1.3 1.5 V IIL(PGA) PGAO, PGA1, PGA2, PGA3 Input Current V IN = 0.6V 20 mA IIH(PGA) PGAO, PGA1, PGA2, PGA3 Input Current V IN = 5V 20 mA IOUT OUT+, OUT– Current All Gain Settings 20 mA ICC VCC Supply Current All Gain Settings (Note 4) 44 100 mA Enable and PGA Inputs DC Characteristics VIL ENA, ENB and PGAx Input Low Voltage x = 0, 1, 2, 3 0.6 V VIH ENA, ENB and PGAx Input High Voltage x = 0, 1, 2, 3 3 V IIL(PGA) PGAO, PGA1, PGA2, PGA3 Input Current V IN = 0.6V 20 mA IIH(PGA) PGAO, PGA1, PGA2, PGA3 Input Current V IN = 3V and 5V 15 30 mA IIL(EN) ENA, ENB Input Current V IN = 0.6V 4 20 mA IIH(EN) ENA, ENB Input Current V IN = 3V 18 mA VIN = 5V 38 100 mA Standard Mode DC Characteristics, ENA = ENB = 3V VIN(BIAS) IN+, IN– Bias Voltage Max Gain (Note 6) 1.34 1.49 1.65 V RIN Input Differential Resistance All Gain Settings (DC) 108 W gm Amplifier Transconductance Max Gain 0.3 S IOUT OUT+, OUT– Quiescent Current All Gain Settings, V OUT = 5V 33 40 47 mA IOUT(OFFSET) Output Current Mismatch All Gain Settings, IN +, IN– Open 200 mA ICC VCC1 + VCC2 Supply Current Max Gain (Note 4) 64 75 mA Min Gain (Note 4) 68 80 mA ICC(TOTAL) Total Supply Current I CC + 2 • IOUT (Max Gain) 148 174 mA Low Power Mode DC Characteristics, ENA = O.6V, ENB = 3V or ENA = 3V, ENB = 0.6V VIN(BIAS) IN+, IN– Bias Voltage Max Gain (Note 6) 1.34 1.48 1.65 V RIN Input Differential Resistance All Gain Settings (DC) 122 W gm Amplifier Transconductance Max Gain 0.15 S IOUT OUT+, OUT– Quiescent Current All Gain Settings, V OUT = 5V 17 20 24 mA IOUT(OFFSET) Output Current Mismatch All Gain Settings, IN +, IN– Open 100 mA ICC VCC1 + VCC2 Supply Current Max Gain (Note 4) 34 40 mA Min Gain (Note 4) 36 43 mA ICC(TOTAL) Total Supply Current I CC + 2 • IOUT (Max Gain) 76 91 mA

(Standard Mode) VCC = 5V, VCCO = 5V, ENA = ENB = 3V, TA = 25°C, ROUT = 200W . Maximum gain specifications are with respect to differential inputs and differential outputs, unless otherwise noted. (Note 7) (Test circuits shown in Figures 9 and 10) AC ELECTRICAL CHARACTERISTICS SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Dynamic Performance BW Large-Signal –3dB Bandwidth All Gain Settings (Note 8) ROUT = 100W LF to 850 MHz ROUT = 200W ; L1, L2 = 33nH (Figure 9) LF to 500 MHz POUT(MAX) Clipping Limited Maximum Sinusoidal All Gain Settings, Single Tone, R OUT = 150W 21 dBm Output Power f IN = 100MHz (Note 10) gm Amplifier Transconductance Max Gain, f IN = 100MHz 0.30 S PGA1 = Low, fIN = 100MHz 0.21 S S12 Reverse Isolation f IN = 100MHz (Note 9) –92 dB fIN = 400MHz (Note 9) –78 dB tr, tf Step Response Rise and Fall Time All Gain Settings, 10% to 90%, R OUT = 100W 500 ps Group Delay All Gain Settings, R OUT = 100W 800 ps Group Delay Variation 30MHz to 300MHz Frequency Range, –50 ps ROUT = 100W PGA Settling Time 500 ns Enable/Disable Time 600 ns Distortion and Noise OIP3 Output Third Order Intercept Point for P OUT = 9dBm (Each Tone), 200kHz Tone Spacing PGA0 = High (PGA1, PGA2, PGA3 Any State) f IN = 100MHz +47.0 dBm fIN = 200MHz +40.5 dBm Output Third Order Intercept Point for P OUT = 9dBm (Each Tone), 200kHz Tone Spacing PGA0 = Low (PGA1, PGA2, PGA3 Any State) f IN = 100MHz +42.0 dBm fIN = 200MHz +37.5 dBm HD2 Second Harmonic Distortion P OUT = 11dBm (Single Tone), fIN = 50MHz –82 dBc HD3 Third Harmonic Distortion P OUT = 11dBm (Single Tone), fIN = 50MHz –72 dBc NFLOOR Output Noise Floor PGA1 = High, f IN = 100MHz –134 dBm/Hz (PGAO, PGA2, PGA3 Any State) PGA1 = Low, f IN = 100MHz –136 dBm/Hz NF Noise Figure Max Gain, f IN = 100MHz 7.4 dB –3dB Step, fIN = 100MHz 7.7 dB Amplifier Power Gain and Gain Step GMAX Maximum Gain f IN = 20MHz and 200MHz 33 dB GMIN Minimum Gain f IN = 20MHz and 200MHz 10.5 dB GSTEP Gain Step Size f IN = 20MHz and 200MHz 1.05 1.5 1.95 dB Gain Step Accuracy f IN = 20MHz and 200MHz –0.1 dB Amplifier I/O Impedance (Parallel Values Specified Differentially) RIN Input Resistance f IN = 100MHz 108 W CIN Input Capacitance f IN = 100MHz 2.8 pF RO Output Resistance f IN = 100MHz 3.4 k W CO Output Capacitance f IN = 100MHz 1.9 pF

(Low Power Mode) VCC = 5V, VCCO = 5V, ENA = 3V, ENB = 0.6V, TA = 25°C, ROUT = 200W . Maximum gain specifications are with respect to differential inputs and differential outputs, unless otherwise noted. (Note 7) (Test circuits shown in Figures 9 and 10) AC ELECTRICAL CHARACTERISTICS Note 1: Absolute Maximum Ratings are those values beyond which the life of the device may be impaired. Note 2: All voltage values are with respect to ground. Note 3: Default state for open PGA inputs. Note 4: VCC1 and VCC2 (Pins 2 and 19) are internally connected. Note 5: External VOSUP is adjusted such that VCCO output pin common mode voltage is as specified when resistors are used. For choke inductors or transformer, VOSUP = VCCO = 5V typ. Note 6: Internally generated common mode input bias voltage requires capacitive or transformer coupling to the signal source. Note 7: Specifications over the –40°C to 85°C operating temperature range are assured by design, characterization and correlation with statistical process controls. Gain always refers to power gain. Input matching is assumed. PIN is the available input power. POUT is the power into the external load, ROUT, as seen by the LT5514 differential outputs. All dBm figures are with respect to 50W . Note 8: High frequency operation is limited by the RC time constants at the input and output ports. The low frequency (LF) roll-off is set by I/O interface choice. Note 9: Limited by package and board isolation. Note 10: See “Clipping Free Operation” in the Applications Information section. Refer to Figure 7. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Dynamic Performance BW Large-Signal –3dB Bandwidth All Gain Settings (Note 8), ROUT = 100W LF to 540 MHz POUT(MAX) Clipping Limited Maximum Sinusoidal All Gain Settings, Single Tone, 16 dBm Output Power f IN = 100MHz (Note 10) gm Amplifier Transconductance Max Gain, f IN = 100MHz 0.15 S S12 Reverse Isolation f IN = 100MHz (Note 9) –92 dB Distortion and Noise OIP3 Output Third Order Intercept Point for P OUT = 4dBm (Each Tone), 200kHz Tone Spacing, PGA0 = High (PGA1, PGA2, PGA3 Any State) f IN = 100MHz +40 dBm Output Third Order Intercept Point for P OUT = 4dBm (Each Tone), 200kHz Tone Spacing, PGA0 = Low (PGA1, PGA2, PGA3 Any State) f IN = 100MHz +36 dBm HD2 Second Harmonic Distortion P OUT = 5dBm (Single Tone), fIN = 50MHz –76 dBc HD3 Third Harmonic Distortion P OUT = 5dBm (Single Tone), fIN = 50MHz –72 dBc NFLOOR Output Noise Floor PGA1 = High, f IN = 100MHz –138 dBm/Hz (PGAO, PGA2, PGA3 Any State) PGA1 = Low, f IN = 100MHz –140 dBm/Hz NF Noise Figure Max Gain Setting, f IN = 100MHz 8.6 dB Amplifier Power Gain and Gain Step GMAX Maximum Gain f IN = 20MHz and 200MHz 27 dB GMIN Minimum Gain f IN = 20MHz and 200MHz 4.5 dB GSTEP Gain Step Size f IN = 20MHz and 200MHz 1.05 1.5 1.95 dB Gain Step Accuracy f IN = 20MHz and 200MHz –0.1 dB Amplifier I/O Impedance RIN Input Resistance f IN = 100MHz, Parallel Values Specified 122 W Differentially CIN Input Capacitance f IN = 100MHz, Parallel Values Specified 2 pF Differentially RO Output Resistance f IN = 100MHz, Parallel Values Specified 5 k W Differentially CO Output Capacitance f IN = 100MHz, Parallel Values Specified 1.7 pF Differentially

TYPICAL PERFOR A CE CHARACTERISTICS UW Frequency Response for All Gain Steps, ROUT = 100W Frequency Response for All Gain Steps, ROUT = 200W (Standard Mode) TA = 25°C, VCC = 5V, VCCO = 5V, ENA = ENB = 3V, control input levels VIL = 0.6V, VIH = 3V unless otherwise noted. (Test circuit shown in Figure 9) Frequency Response at 3dB Attenuation Step with COUT as Parameter, ROUT = 200W Max Gain Frequency Response with COUT as Parameter, ROUT = 200W Gain Error vs Attenuation at 25MHz, ROUT = 200W Gain Error vs Attenuation at 100MHz, ROUT = 200W FREQUENCY (MHz) POWER GAIN (dB)12 100 1000

5514 G01

FREQUENCY (MHz) POWER GAIN (dB)12 100 1000

5514 G02

FREQUENCY (MHz) POWER GAIN (dB) 100 1000

5514 G03

COUT = OPEN COUT = 2.2pF COUT = 4.7pF COUT = 10pF COUT = 22pF FREQUENCY (MHz) POWER GAIN (dB) 100 1000

5514 G04

COUT = OPEN COUT = 2.2pF COUT = 4.7pF COUT = 10pF COUT = 22pF ATTENUATION STEP (dB) GAIN ERROR (dB) 0.2 0.4 0.6

1544 G05

–0.2 –0.8 369 12 15 18 0.8 –0.4 –0.6 25°C –40°C 85°C ATTENUATION STEP (dB) GAIN ERROR (dB) 0.2 0.4 0.6

1544 G06

–0.2 –0.8 369 12 15 18 0.8 –0.4 –0.6 25°C –40°C 85°C FREQUENCY (MHz) POWER GAIN (dB)30 100 1000

5514 G07

25°C –40°C 85°C ROUT = 200Ω ROUT = 100Ω FREQUENCY (MHz) POWER GAIN (dB)7 100 1000

5514 G08

25°C –40°C 85°C ROUT = 200Ω ROUT = 100Ω PIN (dBm) –31 POUT (dBm) –25 –19 –13 –7

5514 G09

–28 –22 –16 –10 STANDARD ROUT = 200Ω STANDARD ROUT = 100Ω LOW POWER ROUT = 200Ω Minimum Gain vs Frequency, ROUT = 100W and 200W Maximum Gain vs Frequency, ROUT = 100W and 200W POUT vs PIN at 50MHz, Max Gain

TYPICAL PERFOR A CE CHARACTERISTICS UW Harmonic Distortion vs Attenuation Step at POUT = 7dBm, Freq = 50MHz, ROUT = 200W Harmonic Distortion vs POUT at 50MHz, Max Gain, ROUT = 200W (Standard Mode) TA = 25°C, VCC = 5V, VCCO = 5V, ENA = ENB = 3V, control input levels VIL = 0.6V, VIH = 3V unless otherwise noted. (Test circuit shown in Figure 9) Harmonic Distortion vs POUT at 50MHz, Max Gain, ROUT = 100W Minimum Gain vs VCC at 120MHz, ROUT = 100W Harmonic Distortion vs Attenuation Step at POUT = 7dBm, Freq = 50MHz, ROUT = 200W VCC (V) 4.5 7.4 7.6 7.8 5.3

5514 G10

7.2 7.0 4.7 4.9 5.1 5.5 6.8 6.6 6.4 GAIN (dB) 25°C 85°C –40°C Maximum Gain vs VCC at 120MHz, ROUT = 100W VCC (V) 4.5 30.0 30.2 30.4 5.3

5514 G11

29.8 29.6 4.7 4.9 5.1 5.5 29.4 29.2

29.0 GAIN (dB)

25°C 85°C –40°C ATTENUATION STEP (dB) HD (dBc) –78 –75 –72 91 5

5514 G12

–81 –84 36 12 18 21 –87 –90 HD2 FIGURE 10 TEST CIRCUIT HD3 PGA0 = LOW HD3 PGA0 = HIGH ATTENUATION STEP (dB) HD (dBc) –78 –75 –72 91 5 –81 –84 36 12 18 21 –87 –90 HD2 HD3 PGA0 = LOW HD3 PGA0 = HIGH POUT (dBm) HD (dBc) –70 –55 –50

5514 G14

–75 –80 –100 3 9 150 6 12 18 –90 –40 –45 –60 –65 –85 –95 HD2 HD3 HD4HD5 POUT (dBm) HD (dBc) –70 –55 –50

5514 G15

–75 –80 –100 1 7 13–2 4 10 16 –90 –40 –45 –60 –65 –85 –95 HD2 HD3 HD4HD5 FREQUENCY (MHz) 6.0 NF (dB) 6.5 7.0 7.5 8.0 100 200 300 400

5514 G16

8.5 9.0 50 150 250 350 MAX GAIN FIGURE 10 TEST CIRCUIT 1.5dB ATTENUATION STEP (PGA0 = LOW) 3dB ATTENUATION STEP (PGA1 = LOW) ATTENUATION STEP (dB) NF (dB)

5514 G17

ATTENUATION STEP (dB) –139 NOISE FLOOR (dBm/Hz) –138 –137 –136 –135 –133 3 69 1 2

5514 G18

–134 PGA1 = HIGH FIGURE 10 TEST CIRCUIT PGA1 = LOW NF vs Attenuation Step at Freq = 100MHz Output Noise Floor vs Attenuation Step, Freq = 100MHz, ROUT = 200WNoise Figure vs Frequency

ATTENUATION STEP (dB) CURRENT (mA)39 3 69 1 2

5514 G25

85°C 25°C –40°C OIP3 vs Frequency at PIN = –23dBm Max Gain, ROUT = 200W OIP3 vs Attenuation Step at Freq = 100MHz, PIN = –23dB, ROUT = 200W ICC Shutdown Current vs VCC, ENA = ENB = 0.6V OIP3 vs Frequency at PIN = –23dBm Max Gain, ROUT = 100W OIP3 vs Frequency at PIN = –23dBm Max Gain and 1.5dB Attenuation Step, ROUT = 200W Total ICC vs Attenuation Step TYPICAL PERFOR A CE CHARACTERISTICS UW (Standard Mode) Two tones, 200kHz spacing, TA = 25°C, ENA = ENB = 5V, VCC = 5V, VCCO = 3V, control input levels VIL = 0.6V, VIH = 3V unless otherwise noted. (Test circuit shown in Figure 10) FREQUENCY (MHz) 150

5514 G19

OIP3 (dBm) 25°C –40°C 85°C FREQUENCY (MHz) 150

5514 G20

OIP3 (dBm) 25°C –40°C 85°C FREQUENCY (MHz) 150

5514 G21

OIP3 (dBm) MAX GAIN 1.5dB ATTENUATION STEP ATTENUATION STEP (dB) OIP3 (dBm)

1544 G22

(PGA0 = HIGH) 1.5dB ATTENUATION STEP (PGA0 = LOW) INPUT VCC (V) 4.5 25°C 85°C –40°C 5.3

5514 G23

4.7 4.9 5.1 5.5 CURRENT (µA) ATTENUATION STEP (dB) 130 CURRENT (mA) 135 140 145 150 160 3 69 1 2

5514 G24

85°C 25°C –40°C Single-Ended Output Current vs Attenuation Step ATTENUATION STEP (dB)

1.40 VIN(BIAS) (V)

1.50 1.45 1.55 1.60 3 69 1 2

5514 G26

85°C 25°C –40°C VIN(BIAS) vs Attenuation Step

TYPICAL PERFOR A CE CHARACTERISTICS UW Total ICC vs VCC Single-Ended Output Current vs Attenuation Step (Low Power Mode) TA = 25°C, VCC = 5V, VCCO = 5V, ENA = 3V, ENB = 0.6V or ENA = 0.6V, ENB = 3V, control input levels VIL = 0.6V, VIH = 3V unless otherwise noted. (Test circuit shown in Figure 10) VIN(BIAS) vs Attenuation Step Noise Figure vs Frequency Harmonic Distortion vs POUT at 50MHz, Max Gain, ROUT = 200W OIP3 vs Frequency at Pin = –23dBm, Max Gain and 1.5dB Attenuation Step, ROUT = 200W FREQUENCY (MHz) OIP3 (dBm) 200

5514 G34

1.5dB ATTENUATION STEP MAX GAIN POUT (dBm) HD(dBc) –80 –50 –45 –40 0 6 9

5514 G35

–90 –60 –70 –85 –55 –100 –95 –65 –75 –3 3 12 15 HD2HD3 HD4HD5 FREQUENCY (MHz) 7.0 NF (dB) 7.5 8.0 8.5 9.0 100 200 300 400

5514 G36

9.5 10.0 50 150 250 350 MAX GAIN 1.5dB ATTENUATION STEP (PGA0 = LOW) 3dB ATTENUATION STEP (PGA1 = LOW) NF vs Attenuation Step at Freq = 100MHz ATTENUATION STEP (dB) NF (dB)

5514 G37

Output Noise Floor vs Attenuation Step, Freq = 100MHz, ROUT = 200W ATTENUATION STEP (dB) –142 NOISE FLOOR (dBm/Hz) –141 –140 –139 –138 –136 3 69 1 2

5514 G38

–137 PGA1 = HIGH PGA1 = LOW Pulse Response vs Output Level at Max Gain. Indicated Voltage Levels are into 50W External Load 2ns/DIV 5514 G39 2VP-P 1.5VP-P 1VP-P INPUTS COUT = 0.82pF ATTENUATION STEP (dB) CURRENT (mA) 3 69 1 2

5514 G40

78 85°C 25°C –40°C ATTENUATION STEP (dB)

19.0 CURRENT (mA)

20.0 19.5 20.5 21.0 3 69 1 2

5514 G41

85°C 25°C –40°C ATTENUATION STEP (dB) 1.50 1.45 1.55 1.60 3 69 1 2

5514 G42

85°C 25°C –40°C

for example) may be required in some applications. 1.5dB Attenuation Step (see Programmable Gain table). pin is internally pulled to ground if not connected. 3dB Attenuation Step (see Programmable Gain table). pin is internally pulled to ground if not connected. 6dB Attenuation Step (see Programmable Gain table). pin is internally pulled to ground if not connected. is internally pulled to ground if not connected. mended to source the DC quiescent current. mended to source the DC quiescent current.

5514 F01

Figure 1. Functional Block Diagram

• An input variable attenuator “gain-control” block with 100W input impedance
• Two parallel, differential transconductance amplifiers, each with independent enable inputs
• An internal bias block with internal voltage regulator
• A gain control logic block The LT5514 amplifier provides amplification with very low distortion using a linearized open-loop architecture. In contrast with high linearity amplifiers employing negative feedback, the LT5514 offers:
• Stable operation for any practical load
• A capacitive output reactance (not inductive) that pro- vides peaking free AC response to capacitive loads
• Exceptional reverse isolation of –100dB at 50MHz and –78dB at 300MHz (package and board leakage limited) The LT5514 is a transconductance amplifier and its opera- tion can be understood conceptually as consisting of two steps: First, the input signal voltage is converted to an output current. The intermodulation distortion (in dBc) of the LT5514 output current is determined by the input signal level, and is almost independent of the output load conditions. Thus, the LT5514’s input IP3 is also nearly independent of the output load. Next, the external output load (R OUT) converts the output current to output voltage (or power). The LT5514’s volt- age and power gain both increase with increasing R OUT. Accordingly, the output power and output IP3 also im- prove with increasing R OUT. The actual output linearity performance in the application will thus be set by the choice of output load, as well as by the output network. Maximum Gain Calculation The maximum power gain (with the 0dB attenuation step) is: GPWR(dB) = 10 • log(gm2 • RIN • ROUT) where: gm is the LT5514 transconductance = 0.3S in Standard mode (0.15S in Low Power mode). RIN is the LT5514 differential input impedance @ 108W in Standard mode (122W in Low Power mode). Input impedance matching is assumed. ROUT is the external differential output impedance as seen by the LT5514’s differential outputs. ROUT should be distinguished from the actual load impedance, RLOAD, which will typically be coupled to the LT5514 output by an impedance transformation network. The power gain as a function of ROUT is plotted in Figure␣ 2. The ideal curves are straight lines. The curved lines indicate the roll-off due to the finite (noninfinite) output resistance of the LT5514. ROUT (W ) GAIN (dB) 100 1000 2000

5514 F02

10 STANDARD MODE

Figure 2. Power Gain as a Function of ROUT

• The insertion loss of the output impedance transforma- tion network (for example the transformer insertion loss in Figure 6)
• About –3dB loss if a matching resistor (R MATCH in Figure 6) is used to provide output load impedance back-matching (for example when driving transmis- sion lines)

sion applies to standard mode operation at maximum gain. PIN(MAX) = –10.8dBm (assuming RIN = 108W ). 20.8dBm. This calculation applies for a sinusoidal signal. unloaded, with instability as the undesirable consequence. The LT5514 has about 30GHz gain-bandwidth product. Figure 7. Maximum Output Power as a Function of ROUT

5514 F07

gain output amplifier. The overall gain of the LT5514 is digitally controlled by means of four gain control pins with internal pull-down. Minimum gain is programmed when the gain control pins are set low or left floating. In shutdown mode, these PGA inputs draw <10 mA leakage current, regardless of the applied voltage. The 6dB and 12dB attenuation steps (PGA2 and PGA3) are implemented by switching the amplifier inputs to an input attenuator tap. The 3dB attenuation step (PGA1) changes the amplifier transconductance. The output IP3 is approxi- mately independent of the PGA1, PGA2 and PGA3 gain settings. However, the 1.5dB attenuation step utilizes a current steering technique that disables the internal linear- ity compensation circuit, and the OIP3 can be reduced by as much as 6dB when PGA0 is low. Therefore, to achieve the LT5514’s highest linearity performance, the PGA0 pin should be set high. The LT5514 noise figure is 7.3dB in the maximum gain state. For the –3dB attenuation setting, the NF is 7.6dB. The noise figure increases in direct proportion to the amount of pro- grammed gain reduction for the 1.5dB, 6dB and 12dB steps. The output noise floor is proportional to the output load impedance, R OUT. It is almost constant for PGA1 = high and for any PGA0, PGA2, PGA3 state. When PGA1 = low, the output noise floor is 2.7dB lower (see Typical Perfor- mance Characteristics). Other Linearity Considerations LT5514 linearity is a strong function of signal frequency. OIP3 decreases about 13dB for every octave of frequency increase above 100MHz. As noted in the Circuit Operation section, at any given frequency and input level, the LT5514 provides a current output with fairly constant intermodulation distortion fig- ure in dBc, regardless of the output load value. For higher R OUT values, more gain and output power is available, and better OIP3 figures can be achieved. However, high ROUT values are not easily implemented in practice, limited by the availability of high ratio output impedance transforma- tion networks. Linearity can also be limited by the output RC time con- stant (bandwidth limitations), particularly for high R OUT values. A solution is outlined in the Bandpass Applications section. The LT5514 linearity degrades when common mode sig- nal is present. The input transformer center tap should be decoupled to ground to provide a balanced input differen- tial signal and to avoid linearity degradation for high attenuation steps. When the signal frequency is lower than 50MHz, and there is significant common mode signal, then high attenuation settings may result in degraded linearity. At signal frequencies below 100MHz, the LT5514’s inter- nal linearity compensation circuitry may provide “sweet spots” with very high OIP3, in excess of +60dBm. This almost perfect distortion correction cannot be sustained over the full operating temperature range and with varia- tions of the LT5514 output load (complex impedance Z OUT). Users are advised to rely on data shown in the Typical Performance Characteristics curves to estimate the dependable linearity performance. Wideband Applications At low frequencies, the value of the decoupling capacitors, choke inductors and choice of transformer will set the minimum frequency of operation. Output DC coupling is possible, but this typically reduces the LT5514’s output DC bias voltage, and thus the output swing and available power. At high frequencies, the output RC time constants set an upper limit to the maximum frequency of operation in the case of the wideband output networks presented so far. For example the LT5514 output capacitance, C OUT = 1.9pF, and a pure resistive load, ROUT = 200W , will set the –3dB bandwidth to about 400MHz. In an actual application, the RLOAD • CLOAD product may be even more restrictive. The use of wideband output networks will not only limit the bandwidth, but will also degrade linearity because part of the available power is wasted driving the capacitive load. The LT5514’s output reactance is capacitive. Therefore improved AC response is possible by using external series output inductors. When driving purely resistive loads, an inductor in series with the LT5514 output may help to achieve maximally flat AC response as exemplified in the characterization setup schematic (Figure 9). APPLICATIO S I FOR ATIOWU UU

but it provides no improvement in linearity performance. peaking due to the capacitive load can be removed. mation ratio is more flexible than in the wideband case. destabilized by reactive loading. OIP3 degradation may occur (e.g., 4dB to 6dB at 200MHz). gain is the only way to reduce the output noise floor. reduction in the output noise floor with no loss of linearity.

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Figure 8. Bandpass Output Transformation Network Example

for an output impedance transformation network. refers to circuit operation with only a single block enabled. while RIN and ROUT are the same) and 6dB lower OIP3.

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Figure 9. Characterization Board (Simplified Schematic)

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Figure 10. Output Transformer Application Board (Simplified Schematic)

ROUT = 100W , presented to the LT5514. both cases, ROUT = 100W and 200W , is shown in Figure 12.

5514 F11

Figure 11. Wideband Differential Output Application Board (Simplified Schematic)

5514 F12

Figure 12. Typical OIP3 for Transformer Board

APPLICATIO S I FOR ATIOWU UU Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. At high frequency, the difference between the top and bottom curves in Figure 12 is simply power loss. Starting from the LT5514 intrinsic performance at R OUT = 200W (top curve), the next lower curve takes into account the transformer insertion loss. The next curve below this shows the LT5514 OIP3 with R OUT = 100W . The bottom curve in the plot includes the effects of transformer insertion loss, with ROUT = 100W , and the additional effect of loss due to RMATCH. The transformer board can provide a differential output when Jumper J2 is removed. The Wideband Differential Output Application Board (Fig- ure 11) is an example of direct coupling (no transformer) to the load, and has wider output bandwidth. This board gives direct access to the LT5514’s output pins, and was used for stability tests. Higher V OSUP (7V) is required to compensate for the DC voltage drop on R1 and R2. Use TP2, TP3 to monitor the actual LT5514 output bias volt- age. By replacing R1 and R2 with inductors, this board can operate with a 5V supply. However, this may limit the minimum signal frequency. For example, an 820nH choke inductor will limit the lowest signal frequency to 40MHz. UPACKAGE DESCRIPTIO 20-Lead Plastic TSSOP (4.4mm) (Reference LTC DWG # 05-08-1663) Exposed Pad Variation CB FE20 (CB) TSSOP 0204 0.09 – 0.20 (.0035 – .0079) 0° – 8° 0.25 REF RECOMMENDED SOLDER PAD LAYOUT 0.50 – 0.75 (.020 – .030) 4.30 – 4.50* (.169 – .177) 13 4 5 6 7 89 1 0 111214 13 6.40 – 6.60* (.252 – .260) 3.86 (.152) 2.74 (.108) 20 1918 17 16 15 1.20 (.047) MAX 0.05 – 0.15 (.002 – .006) 0.65 (.0256) BSC 0.195 – 0.30 (.0077 – .0118) TYP 2.74 (.108) 0.45 –0.05

0.65 BSC

4.50 –0.10 6.60 –0.10 1.05 –0.10 3.86 (.152) MILLIMETERS (INCHES) *DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.150mm (.006") PER SIDE NOTE: 1. CONTROLLING DIMENSION: MILLIMETERS 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE SEE NOTE 4 4. RECOMMENDED MINIMUM PCB METAL SIZE FOR EXPOSED PAD ATTACHMENT 6.40 (.252) BSC

ª LINEAR TECHNOLOGY CORPORATION 2004 LT/TP 0504 1K • PRINTED IN THE USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 l FAX: (408) 434-0507 l www.linear.com RELATED PARTS PART NUMBER DESCRIPTION COMMENTS Infrastructure LT5511 High Linearity Upconverting Mixer RF Output to 3GHz, 17dBm IIP3, Integrated LO Buffer LT5512 DC-3GHz High Signal Level Downconverting Mixer DC to 3GHz, 21dBm IIP3, Integrated LO Buffer LT5515 1.5GHz to 2.5GHz Direct Conversion Quadrature Demodulator 20dBm IIP3, Integrated LO Quadrature Generator LT5516 0.8GHz to 1.5GHz Direct Conversion Quadrature Demodulator 21.5dBm IIP3, Integrated LO Quadrature Generator LT5517 40MHz to 900MHz Quadrature Demodulator 21dBm IIP3, Integrated LO Quadrature Generator LT5519 0.7GHz to 1.4GHz High Linearity Upconverting Mixer 17.1dBm IIP3 at 1GHz, Integrated RF Output Transformer with 50 W Matching, Single-Ended LO and RF Ports Operation LT5520 1.3GHz to 2.3GHz High Linearity Upconverting Mixer 15.9dBm IIP3 at 1.9GHz, Integrated RF Output Transformer with 50 W Matching, Single-Ended LO and RF Ports Operation LT5522 600MHz to 2.7GHz High Signal Level Downconverting Mixer 4.5V to 5.25V Supply, 25dBm IIP3 at 900MHz, NF = 12.5dB, 50W Single-Ended RF and LO Ports RF Power Detectors LT5504 800MHz to 2.7GHz RF Measuring Receiver 80dB Dynamic Range, Temperature Compensated, 2.7V to 5.25V Supply LTC 5505 RF Power Detectors with >40dB Dynamic Range 300MHz to 3GHz, Temperature Compensated, 2.7V to 6V Supply LTC5507 100kHz to 1000MHz RF Power Detector 100kHz to 1GHz, Temperature Compensated, 2.7V to 6V Supply LTC5508 300MHz to 7GHz RF Power Detector 44dB Dynamic Range, Temperature Compensated, SC70 Package LTC5509 300MHz to 3GHz RF Power Detector 36dB Dynamic Range, Low Power Consumption, SC70 Package LTC5530 300MHz to 7GHz Precision RF Power Detector Precision V OUT Offset Control, Shutdown, Adjustable Gain LTC5531 300MHz to 7GHz Precision RF Power Detector Precision V OUT Offset Control, Shutdown, Adjustable Offset LTC5532 300MHz to 7GHz Precision RF Power Detector Precision V OUT Offset Control, Adjustable Gain and Offset Low Voltage RF Building Blocks LT5500 1.8GHz to 2.7GHz Receiver Front End 1.8V to 5.25V Supply, Dual-Gain LNA, Mixer, LO Buffer LT5502 400MHz Quadrature IF Demodulator with RSSI 1.8V to 5.25V Supply, 70MHz to 400MHz IF, 84dB Limiting Gain, 90dB RSSI Range LT5503 1.2GHz to 2.7GHz Direct IQ Modulator and 1.8V to 5.25V Supply, Four-Step RF Power Control, Upconverting Mixer 120MHz Modulation Bandwidth LT5506 500MHz Quadrature IF Demodulator with VGA 1.8V to 5.25V Supply, 40MHz to 500MHz IF, –4dB to 57dB Linear Power Gain, 8.8MHz Baseband Bandwidth LT5546 500MHz Ouadrature IF Demodulator with 17MHz Baseband Bandwidth, 40MHz to 500MHz IF, 1.8V to 5.25V VGA and 17MHz Baseband Bandwidth Supply, –7dB to 56dB Linear Power Gain