LT4363

LT4363 DS – High Voltage Surge Stopper with Current Limit

Document overview

• Manufacturer or author: Analog Devices, Inc.
• PDF pages: 24

Technical content

Rev. CFor more information www.analog.comDocument Feedback 100ms/DIV

4363 TA01b

80V INPUT SURGE CTMR = 6.8µF ILOAD = 500mA 27V ADJUSTABLE CLAMP 12V 12V The LT®4363 surge stopper protects loads from high voltage transients. It regulates the output during an overvoltage event, by controlling the gate of an external N-channel MOSFET . The output is limited to a safe value allowing the loads to continue functioning. The L T4363 also monitors the voltage drop between the SNS and OUT pins to protect against overcurrent faults. An internal amplifier limits the voltage across the current sense resistor to 50mV . In either fault condition, a timer is started inversely proportional to MOSFET stress. Before the timer expires, the F LT pin pulls low to warn of an impending power down. If the condition persists, the MOSFET is turned off. The L T4363-1 remains off until reset whereas the L T4363-2 restarts after a cool down period. T wo precision comparators can monitor the input supply for overvoltage (OV) and undervoltage (UV) conditions. When the potential is below the UV threshold, the external MOSFET is kept off. If the input supply voltage is above the OV threshold, the MOSFET is not allowed to turn back on. Back-to-back MOSFETs can be used in lieu of a Schottky diode for reverse input protection, reducing voltage drop and power loss. A shutdown pin reduces the quiescent current to less than 7µA during shutdown. TYPICAL APPLICATION FEATURES DESCRIPTION High Voltage Surge Stopper with Current Limit 4A, 12V Overvoltage Output Regulator with 150V Surge Protection Overvoltage Protector Regulates Output at 27V During T ransient

APPLICATIONS

n Withstands Surges Over 100V with VCC Clamp n Wide Operating Voltage Range: 4V to 80V n Adjustable Output Clamp Voltage n Fast Overcurrent Limit: Less Than 5µs n Reverse Input Protection to –60V n Adjustable UV/OV Comparator Thresholds n Low 7µA Shutdown Current n Shutdown Pin Withstands –60V to 100V n Adjustable Fault Timer n Controls N-Channel MOSFET n Less Than 1% Retry Duty Cycle During Faults, L T4363-2 n Available in 12-Pin (4mm × 3mm) DFN, 12-Pin MSOP and 16-Pin SO Packages n Avionic/Industrial Surge Protection n Hot Swap™/Live Insertion n High Side Switch for Battery Powered Systems n Intrinsic Safety Applications All registered trademarks and trademarks are the property of their respective owners. 0.1µF 10/uni03A9 10m/uni03A9FDB33N25VIN 12V

4363 TA01

22µF 0.1µF VCC DC/DC CONVERTER GNDSHDN VCC 4.99k 127k 49.9k 57.6k

Rev. C For more information www.analog.com LT4363 ABSOLUTE MAXIMUM RATINGS (Notes 1, 2) L T4363-1 L T4363-1 L T4363-1 GND TMR ENOUT FLT GND UV GND FB OUT SNS GATE VCC SHDN TOP VIEW DE PACKAGE 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB OPTIONAL FB OUT SNS GATE VCC SHDN TMR ENOUT FLT GND UV GND TOP VIEW MS PACKAGE 12-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 135°C/W TOP VIEW S PACKAGE 16-LEAD PLASTIC SO OUT SNS NC GATE NC VCC NC SHDN FB TMR NC ENOUT FLT GND UV GND TJMAX = 125°C, θJA = 80°C/W L T4363-2 L T4363-2 L T4363-2 GND TMR ENOUT FLT GND UV OV FB OUT SNS GATE VCC SHDN TOP VIEW DE PACKAGE 12-LEAD (4mm × 3mm) PLASTIC DFN TJMAX = 125°C, θJA = 43°C/W EXPOSED PAD (PIN 13) IS GND, CONNECTION TO PCB OPTIONAL FB OUT SNS GATE VCC SHDN TMR ENOUT FLT GND UV OV TOP VIEW MS PACKAGE 12-LEAD PLASTIC MSOP TJMAX = 125°C, θJA = 135°C/W TOP VIEW S PACKAGE 16-LEAD PLASTIC SO OUT SNS NC GATE NC VCC NC SHDN FB TMR NC ENOUT FLT GND UV OV TJMAX = 125°C, θJA = 80°C/W PIN CONFIGURATION Operating Temperature Range Storage Temperature Range Lead Temperature (Soldering, 10 sec)

Rev. CFor more information www.analog.com LT4363 ORDER INFORMATION LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE L T4363CDE-1#PBF L T4363CDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C L T4363IDE-1#PBF L T4363IDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C L T4363HDE-1#PBF L T4363HDE-1#TRPBF 43631 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C L T4363CDE-2#PBF L T4363CDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN 0°C to 70°C L T4363IDE-2#PBF L T4363IDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN –40°C to 85°C L T4363HDE-2#PBF L T4363HDE-2#TRPBF 43632 12-Lead (4mm × 3mm) Plastic DFN –40°C to 125°C L T4363CMS-1#PBF L T4363CMS-1#TRPBF 43631 12-Lead Plastic MSOP 0°C to 70°C L T4363HMS-1#PBF L T4363HMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 125°C L T4363IMS-1#PBF L T4363IMS-1#TRPBF 43631 12-Lead Plastic MSOP –40°C to 85°C L T4363MPMS-1#PBF L T4363MPMS-1#TRPBF 43631 12-Lead Plastic MSOP –55°C to 125°C L T4363CMS-2#PBF L T4363CMS-2#TRPBF 43632 12-Lead Plastic MSOP 0°C to 70°C L T4363HMS-2#PBF L T4363HMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 125°C L T4363IMS-2#PBF L T4363IMS-2#TRPBF 43632 12-Lead Plastic MSOP –40°C to 85°C L T4363MPMS-2#PBF L T4363MPMS-2#TRPBF 43632 12-Lead Plastic MSOP –55°C to 125°C L T4363CS-1#PBF L T4363CS-1#TRPBF L T4363S-1 16-Lead Plastic SO 0°C to 70°C L T4363HS-1#PBF L T4363HS-1#TRPBF L T4363S-1 16-Lead Plastic SO –40°C to 125°C L T4363IS-1#PBF L T4363IS-1#TRPBF L T4363S-1 16-Lead Plastic SO –40°C to 85°C L T4363MPS-1#PBF L T4363MPS-1#TRPBF L T4363S-1 16-Lead Plastic SO –55°C to 125°C L T4363CS-2#PBF L T4363CS-2#TRPBF L T4363S-2 16-Lead Plastic SO 0°C to 70°C L T4363HS-2#PBF L T4363HS-2#TRPBF L T4363S-2 16-Lead Plastic SO –40°C to 125°C L T4363IS-2#PBF L T4363IS-2#TRPBF L T4363S-2 16-Lead Plastic SO –40°C to 85°C L T4363MPS-2#PBF L T4363MPS-2#TRPBF L T4363S-2 16-Lead Plastic SO –55°C to 125°C Consult L TC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container . Consult L TC Marketing for information on non-standard lead based finish parts. For more information on lead free part marking, go to: https://www.analog.com/en/about-adi/quality-reliability/material-declarations.html For more information on tape and reel specifications, go to: https://www.analog.com/media/en/package-pcb-resources/package/tape-reel-rev-o.pdf ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V , unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Operating Voltage Range L T4363 l 4 80 V ICC VCC Supply Current SHDN Open, OUT = SNS = 12V SHDN = 0V , OUT = SNS = 0V l l 0.7 1.2 mA µA µA IR Reverse Input Current VCC = –60V , SHDN, UV , OV Open VCC = SHDN = UV = OV = –60V l l –0.5 –10 mA mA ΔVGATE GATE Drive ΔVGATE = (GATE – SNS);VCC = OUT VCC = 4V; IGATE = –0.5µA, 0µA 9V ≤ VCC ≤ 80V; IGATE = –1µA, 0µA l l 4.5 V V IGATE(UP) GATE Pull-Up Current VCC = GATE = OUT = 12V VCC = GATE = OUT = 48V l l –15 –20 –30 –40 –45 –65 µA µA IGATE(DN) GATE Pull-Down Current Overvoltage: FB = 1.5V , GATE = 12V , OUT = 5V Overcurrent: ΔVSNS = 150mV , VGATE = 10V , OUT = 0V Shutdown/UV Mode: SHDN = 0V , GATE = 10V UV = 1V , GATE = 10V l l l l 200 150 100 1000 1000 mA mA µA µA VFB FB Servo Voltage GATE = 12V; OUT = 8V l 1.25 1.275 1.3 V

Rev. C For more information www.analog.com LT4363 Note 2: All currents into device pins are positive, all currents out of device pins are negative. All voltages are referenced to GND unless otherwise specified. Note 3: An internal clamp limits the GATE pin to a minimum of 10V above the OUT pin. Driving this pin to voltages beyond the clamp may damage the device. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS IFB FB Input Current VFB = 1.275V l ±0.2 ±1 µA ΔVSNS Current Limit Sense Voltage ΔVSNS = (SNS – OUT) VCC = 12V , OUT = 3V to 12V VCC = 48V , OUT = 3V to 48V l l mV mV Current Limit Foldback VCC = 12V , OUT = 0V to 1V VCC = 48V , OUT = 0V to 1V l l mV mV ISNS SNS Input Current OUT = SNS = 3V to 80V OUT = SNS = 0V l l –10 –15 µA µA ITMR TMR Pull-up Current, Overvoltage TMR = 1V , FB = 1.5V , ΔVDS = 0.5V TMR = 1V , FB = 1.5V , ΔVDS = 75V l l –1.7 –42 –50 –58 µA µA TMR Pull-up Current, OV Warning TMR = 1.325V , FB = 1.5V , ΔVDS = 0.5V l –3 –5 –7 µA TMR Pull-up Current, Overcurrent TMR = 1V , ΔVSNS = 100mV , ΔVDS = 0.5V TMR = 1V , ΔVSNS = 100mV , ΔVDS = 80V l l –190 –250 –13 –310 µA µA TMR Pull-up Current, Cool Down TMR = 3V , FB = 1.5V , ΔVSNS = 0V , ΔVDS = 0V l –1 –2.3 –3.5 µA TMR Pin Pull-down Current, Cool Down VTMR = 3V , FB = 1.5V , ΔVSNS = 0V , ΔVDS = 0V l 1 2 4 µA VTMR(F) VTMR(G) VTMR(R) TMR Fault Threshold TMR Gate Off Threshold TMR Restart Threshold TMR Rising TMR Rising TMR Falling, L T4363-2 l l l 1.235 1.335 0.47 1.275 1.375 0.5 1.31 1.41 0.53 V V V ΔVTMR Early Warning Window VTMR(G) – VTMR(F) l 80 100 120 mV VTMR(H) TMR Cool Down High Threshold VCC = 7V to 80V , TMR Rising l 3.5 4.3 5.4 V VUV UV Input Threshold UV Rising l 1.24 1.275 1.31 V VUV(HYST) UV Input Hysteresis 12 mV VOV OV Input Threshold OV Rising l 1.24 1.275 1.31 V VOV(HYST) OV Input Hysteresis 7.5 mV IIN UV , OV Input Current UV = 1.275V UV = –60V l l ±0.2 µA mA ILEAK F LT, ENOUT Leakage Current F LT, ENOUT = 80V l ±0.5 ±2.5 µA VOL F LT, ENOUT Output Low ISINK = 0.1mA ISINK = 2mA l l 300 800 mV V ΔVOUT(TH) OUT High Threshold ΔVOUT = VCC – VOUT, ENOUT From Low to High l 0.25 0.5 0.75 V ΔVOUT(RST) OUT Reset Threshold ENOUT From High to Low l 1.8 2.7 3.6 V IOUT OUT Input Current VCC = OUT = 12V , SHDN Open VCC = OUT = 12V , SHDN = 0V l l 0.25 0.25 0.5 mA mA VSHDN SHDN Threshold VCC = 4V to 80V l 0.6 0.4 1.4 1.7 2.1 V V VSHDN(Z) SHDN Open Voltage VCC = 4V to 80V l 2.2 V ISHDN SHDN Current SHDN = 0.4V l –1 –4 –8 µA tRESET SHDN Reset Time SHDN ≤ 0.4V; L T4363-1 l 100 µs D Retry Duty Cycle; Overvoltage VCC = 80V , OUT = 16V , FB = 1.5V; L T4363-2 l 1 2 % Retry Duty Cycle; Output Short VCC = 12V , OUT = 0V , ∆VSNS = 100mV; L T4363-2 l 0.76 1 % tOFF(UV) Undervoltage Turn Off Propagation Delay UV Steps from 1.5V to 1V l 2 5 µs tOFF(OV) Overvoltage Turn Off Propagation Delay FB Steps from 0V to 1.5V; OUT = 0V l 0.25 1 µs tOFF(OC) Overcurrent Turn Off Propagation Delay ∆VSNS Steps from 0V to 150mV; OUT = 0V l 1 2.5 µs Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 12V , unless otherwise noted.

Rev. CFor more information www.analog.com LT4363 Specifications are at VCC = 12V , TA = 25°C, unless otherwise noted. TYPICAL PERFORMANCE CHARACTERISTICS SHDN Current vs Temperature GATE Pull-Up Current vs VCC GATE Pull-Up Current vs Temperature GATE Pull-Down Current vs Temperature: Overcurrent GATE Pull-Down Current vs Temperature: Overvoltage Gate Drive Voltage vs Gate Pull-Down Current ΔVGATE vs IGATE Supply Current vs Supply Voltage (ICC vs VCC) Supply Current During Shutdown vs Temperature (ICC(SHDN) vs Temperature) Supply Current During Shutdown vs Supply Voltage (ICC(SHDN) vs VCC) VCC (V) ICC (µA) 1000 800 600 400 200

4363 G01

VCC (V) ICC (µA)

4363 G03

OUT = SNS = 0V TEMPERATURE (°C) –50 ICC (µA) 0 50–25 25 100

4363 G02

OUT = SNS = 0V TEMPERATURE (°C) –50 ICC(SHDN) (µA) 3.0 2.5 1.5 2.0 0.5 1.0 0 50–25 25 100

4363 G04

SHDN = 0V SHDN = 0.4V TEMPERATURE (°C) –50 0 50–25 25 100 12575 IGATE(DN,OC) (mA) 200 125 100 175 150

4363 G07

∆VSNS = 150mV OUT = 0V GATE = 10V TEMPERATURE (°C) –50 0 50–25 25 100 12575 IGATE(DN,OV) (mA) 200 125 100 175 150

4363 G08

SNS = OUT = 5V GATE = 12V FB = 1.5V VCC (V) IGATE(UP) (µA) –50 –30 –40 –20 –10

4363 G05

IGATE (µA) ∆VGATE (V)

4363 G09

–10–8–4–2 VCC = SNS = OUT TEMPERATURE (°C) –50 0 50–25 25 10075 125 IGATE(UP) (µA) –30 –35 –25 –20 –15

4363 G06

Rev. C For more information www.analog.com LT4363 TYPICAL PERFORMANCE CHARACTERISTICS Overvoltage TMR Current vs (VCC – VOUT) Overcurrent TMR Current vs (VCC – VOUT) Warning Period TMR Current vs VCC TMR Pull-Down Current vs Temperature TMR Pull-Up Current (Cool Down) vs Temperature Output Low Voltage vs Current Gate Drive vs Temperature (ΔVGATE vs Temperature) Gate Drive vs Supply Voltage (ΔVGATE vs VCC) TMR High Threshold vs Supply Voltage Specifications are at VCC = 12V , TA = 25°C, unless otherwise noted. TEMPERATURE (°C) –50 ∆VGATE (V) 0 50–25 25 100

4363 G10

VCC = SNS = OUT IGATE = –1µA IGATE = 0µA VCC (V) ∆VGATE (V)

4363 G11

VCC = SNS = OUT IGATE = 0µA IGATE = 1µA VCC (V) VTMR (V)

4363 G12

TEMPERATURE (°C) –50 ITMR(DN) (µA) 2.4 2.0 1.2 1.6 0.4 0.8 0 50–25 25 100

4363 G16

TMR = 1V ISINK (mA) VOL (V)

4363 G18

OUT = SNS = 3V VCC – VOUT (V) ITMR(UP,OV) (µA) –50 –40 –30 –20 –10

4363 G13

TMR = 1V VCC (V) ITMR(OV,EW) (µA)

4363 G15

∆VDS = 0.5V TEMPERATURE (°C) –50 ITMR(UP,COOL) (µA) –3.0 –2.5 –1.5 –2.0 –0.5 –1.0 0 50–25 25 100

4363 G17

TMR = 3V VCC – VOUT (V) ITMR(UP,OC) (µA) –260 –220 –160 –120 –80 –40

4363 G14

TMR = 1V

Rev. CFor more information www.analog.com LT4363 TYPICAL PERFORMANCE CHARACTERISTICS Reverse Current vs Reverse Voltage Current Limit Foldback (ΔVSNS vs OUT) Overvoltage Turn-Off Time vs Temperature Overcurrent Turn-Off Time vs Temperature Specifications are at VCC = 12V , TA = 25°C, unless otherwise noted. TEMPERATURE (°C) –50 0 50–25 25 100 12575 tOFF(OV) (ns) 350 200 100 300 150 250

4363 G19

TEMPERATURE (°C) –50 0 50–25 25 100 12575 tOFF(OC) (µs) 1.4 0.8 0.4 1.2 0.6 1.0 0.2

4363 G20

OUT = 0V ∆VSNS = 150mV OUT = 3V ∆VSNS = 300mV VCC (V) IGND (mA)

4363 G21

VCC = SHDN OUT (V) ∆VSNS (mV)

4363 G22

Rev. C For more information www.analog.com LT4363 PIN FUNCTIONS ENOUT : Open Collector Enable Output. The ENOUT pin goes high impedance when the voltage at the OUT pin is within 0.5V of V CC and 3V above GND, indicating the external MOSFET is fully on. The state of the pin is latched until the OUT pin voltage drops below 2V , resetting the latch. The internal NPN is capable of sinking up to 2mA of current. Exposed Pad (DFN Package Only): Exposed pad may be left open or connected to device ground (GND). FB: Voltage Regulator Feedback Input. Connect this pin to the center tap of the resistive divider connected between the OUT pin and ground. During an overvoltage condition, the GATE pin is controlled to maintain a 1.275V threshold at the FB pin. Connect to GND to disable the OV clamp. F LT: Open Collector Fault Output. This pin pulls low after the voltage at the TMR pin has reached the fault threshold of 1.275V . It indicates the pass transistor is about to turn off because either the supply voltage has stayed at an elevated level for an extended period of time (voltage fault) or the device is in an overcurrent condition (current fault). The internal NPN is capable of sinking up to 2mA of current. GATE: N-Channel MOSFET Gate Drive Output. The GATE pin is pulled up by an internal charge pump current source to 13V above the OUT pin. A 14V protection clamp limits this voltage during faults. Both voltage and current amplifiers control the GATE pin to regulate the output voltage and limit the current through the MOSFET . GND: Device Ground. OUT : Output Voltage Sense Input. This pin senses the voltage at the source of the external N-channel MOSFET . The voltage difference between VCC and OUT sets the fault timer current. When this difference drops below 0.5V , the EN pin goes high impedance. OV (L T4363-2): Overvoltage Comparator Input. When OV is above its threshold of 1.275V , the fault retry function is inhibited even when the TMR pin voltage has reached its retry threshold. As soon as the voltage at OV pin falls below its lower threshold the GATE pin is allowed to turn back on. Connect to GND if unused. SHDN: Shutdown Control Input. The L T4363 can be shutdown to a low current mode by pulling the SHDN pin below the threshold of 0.4V . Pull this pin above 2.1V or disconnect it to allow the internal current source to turn the part back on. The leakage current to ground at the pin should be limited to no more than 1µA if no external pull up is used to turn the part on. The SHDN pin can be pulled up to 100V or below GND by 60V without damage. SNS: Current Sense Input. Connect this pin to the input of the current sense resistor . The current limit circuit controls the GATE pin to limit the sense voltage between SNS and OUT pins to 50mV . This is reduced to 25mV in a severe fault when OUT is below 2V . When in current limit mode, a current source charges up the TMR pin. The voltage difference with the OUT pin must be limited to less than 30V . Connect to OUT pin if unused. TMR: Fault Timer Input. Connect a capacitor between this pin and ground to set the times for early fault warning, fault turn-off, and cool down periods. The current charg- ing up this pin during fault conditions depends on the voltage difference between the VCC and OUT pins. When TMR reaches 1.275V , the F LT pin pulls low to indicate the detection of a fault condition. If the condition persists, the pass transistor turns off when TMR reaches the threshold of 1.375V . A 2µA current source then continues to pull the TMR up. When TMR reaches 4.3V , the 2µA current reverses direction and starts to pull the TMR pin low. When TMR reaches the retry threshold of 0.5V , the GATE pin pulls high turning back on the pass transistor for the L T4363-2 version. The GATE pin latches low after fault time out for the L T4363-1. A minimum of 10nF capacitor is needed to compensate the loop. UV: Undervoltage Comparator Input. When UV falls below its threshold of 1.275V , the GATE is pulled down with a 1mA current. When UV rises above 1.275V plus the hys- teresis, the pull down current disappears and the GATE pin is pulled up by the internal charge pump. If unused, connect to VCC. VCC: Positive Supply Voltage Input. The positive supply input ranges from 4V to 80V for normal operation. It can also be pulled below ground by up to 60V during a reverse battery condition, without damaging the part. Shutting down the L T4363 by pulling the SHDN pin to ground will reduce the supply current to 7µA.

Rev. CFor more information www.analog.com LT4363 BLOCK DIAGRAM + – SNSVCC SHDN OV (LT4363-2 ONLY) IA 50mV/ 25mV 2µA 1.375V 14V 1.275V 1.275V 4.3V 1.275V 0.5V OUT TMR GND GATE UV 4363 BD VCC ITMR FLT ENOUT FB+ CHARGE PUMP CONTROL LOGIC GATEOFF FLT VA SHDN RETRY UV

Rev. C For more information www.analog.com LT4363 OPERATION Some power systems must cope with high voltage surges of short duration such as those in vehicles. Load circuitry must be protected from these transients, yet high availability systems must continue operating during these events. The L T4363 is an overvoltage protection regulator that drives an external N-channel MOSFET as the pass transistor . It operates from a wide supply voltage range of 4V to 80V . It can also be pulled below ground potential by up to 60V without damage. The internal charge pump turns on the N-channel MOSFET to supply current to the loads with very little power loss. T wo MOSFETs can be connected back to back to replace an inline Schottky diode for reverse input protection. This improves the efficiency and increases the available supply voltage level to the load circuitry. Normally, the pass transistor is fully on, powering the loads with very little voltage drop. When the supply voltage surges too high, the voltage amplifier (VA) controls the gate of the MOSFET and regulates the voltage at the OUT pin to a level that is set by the external resistive divider from the OUT pin to ground and the internal 1.275V reference. A current source starts charging up the capacitor connected at the TMR pin to ground. If the TMR voltage reaches 1.275V , the F LT pin pulls low to indicate impending turn-off due to the overvoltage condition. The pass transistor stays on until TMR reaches 1.375V , at which point the GATE pin pulls low turning off the MOSFET . A current continues to pull the TMR pin up until it reaches about 4.3V , at which point the current reverses direction and pulls the TMR pin down. For the L T4363-2 version, when the voltage at the TMR pin reaches 0.5V the GATE pin begins rising, turning on the MOSFET . The F LT pin will then return to a high impedance state. For the latch-off version, L T4363-1, both the GATE and F LT pins remain low even after TMR has reached the 0.5V threshold. Allow sufficient time for TMR to discharge to 0.5V and for the MOSFET to cool before attempting to reset the part. To reset, pull the SHDN pin low for at least 100µs, then pull high with a slew rate of at least 10V/ms. The fault timer allows the load to continue functioning during short transient events while protecting the MOSFET from being damaged by a long period of supply overvolt- age. The timer period varies with the voltage across the MOSFET . A higher voltage corresponds to a shorter fault timer period, helping to keep the MOSFET within its safe operating area (SOA). The L T4363 senses an overcurrent condition by monitor- ing the voltage across an optional sense resistor placed between the SNS and OUT pins. An active current limit circuit (IA) controls the GATE pin to limit the sense volt- age to 50mV , if the OUT pin potential is above 2V . In the case of a severe output short that brings OUT below 2V , the servo sense voltage is reduced to 25mV to reduce the stress on the pass transistor . During current limit, the current charging the TMR capacitor is about 5 times the current during an overvoltage event. The F LT pin pulls low when the TMR voltage reaches 1.275V and the MOSFET is turned off when it reaches 1.375V . The MOSFET turns back on and the F LT pin returns to a high impedance state after TMR has reached the 0.5V threshold for the L T4363-2 version. For the latch-off version, L T4363-1, both the GATE and F LT pins remain low even after TMR has reached the 0.5V threshold. Reset the part in the same way as in overvoltage time-out case. An accurate undervoltage comparator keeps the GATE pin low until the voltage at the UV pin is above the 1.275V threshold. An overvoltage comparator prevents the MOSFET from turning on after fault time-out while the voltage at the OV pin is still above 1.275V for the L T4363-2. The SHDN pin turns off the pass transistor and all the internal circuitry, reducing the supply current to a mere 7µA.

Rev. CFor more information www.analog.com LT4363 APPLICATIONS INFORMATION The L T4363 limits the voltage and current delivered to the load during supply transient or output overload events. The total fault timer period is set to ride through short-duration faults, while longer events cause the output to shut off and protect the MOSFET pass device from damage. The MOSFET provides a low resistance path from the input to the load during normal operation, while in fault conditions it operates as a series regulator . Overvoltage Fault The L T4363 limits the voltage at the output during an overvoltage at the input. An internal amplifier regulates the GATE pin to maintain 1.275V at the FB pin. During this interval the MOSFET is on and supplies current to the load. This allows uninterrupted operation during short overvoltage events. If the overvoltage condition persists, the timer causes the MOSFET to turn off. Overcurrent Fault The L T4363 features and adjustable current limit that pro- tects against output short circuits or excessive load current. During an overcurrent event, the GATE pin is regulated to limit the current sense voltage across the SNS and OUT pins to 50mV . In the case of a severe short at the output, where OUT is less than 2V , the current sense voltage is reduced to 25mV to further reduce power dissipation in the MOSFET . If the overcurrent condition persists, the timer causes the MOSFET to turn off. Fault Timer Overview Overvoltage and overcurrent conditions are limited in duration by an adjustable timer . A capacitor at the TMR pin sets the delay time before a fault condition is reported at the F LT pin as well as the overall delay before the MOSFET is turned off. The same capacitor also sets the cool down time before the MOSFET is allowed to turn back on. When either an overvoltage or overcurrent fault condition occurs, a current source charges the TMR pin capacitor . The exact current level varies as a function of the type of fault and the VDS voltage drop across the MOSFET . This scheme takes better advantage of the MOSFET’s available Safe Operating Area (SOA) than would a fixed timer current. The TMR pin is biased to 0.5V under normal operating conditions. In the presence of a fault the timer first charges to 1.275V , and then enters the early warning phase of operation. At this point the F LT pin pulls low and after charging to 1.375V , the timer shuts off the MOSFET . The warning phase is indicated by F LT low and gives time for the load to perform house-keeping chores such as data storage in anticipation of impending power loss. After faulting off, the timer enters the cool down phase. At the end of the cool down period the L T4363-1 remains off until reset, while the L T4363-2 automatically restarts. For the L T4363-2 retry is inhibited if the OV pin is greater than 1.275V . This prevents motorboating in the event there is a sustained input overvoltage condition. Fault Timer Operation in Overvoltage In the presence of an overvoltage condition when the L T4363 regulates the output voltage, the timer charges from 0.5V to 1.275V with a current that varies as a func- tion of VDS (see Figure 1). VDS is inferred from the drop across VCC and OUT . The timer current increases linearly from around 4µA with VDS ≤ 0.5V , to 50µA with VDS = 75V . Because VDS is measured indirectly, clamping or filtering at the VCC pin affects the timer current response. A graph of Overvoltage TMR Current vs (VCC – VOUT) is shown in the Typical Performance Characteristics. When TMR reaches 1.275V , the F LT pin is latched low as an early warning of impending shutdown. The timer cur- rent is cut to a fixed value of 6µA and continues to run until TMR reaches 1.375V , producing a fixed early warning period given by: CTMR = tWARNING • 6µA 100mV When TMR reaches 1.375V , the MOSFET is turned off and allowed to cool for an extended period. The total elapsed time between the onset of output regulation and turn-off is given by: tREG =CTMR • 0.775V ITMR + 100mV 6µA Because ITMR is a function of VCC – VOUT, the exact time in regulation depends upon the input waveform and the time required for the output voltage to come into regulation.

4363 F01

time required for the output current to come into regulation. and in response to the SHDN pin is entirely different. L T4363-1 will restart when SHDN goes high. Figure 1. Overvoltage Fault Timer Current Figure 2. Overcurrent Fault Timer Current

0.50 TIME

4363 F02

integrate the charging and discharging currents. V(BR)DSS, the threshold voltage, and the SOA. voltage will appear across the MOSFET . drive can be as low as 4.5V . the selection of the fault timer capacitor . nentially decaying back to VIN with a time constant of τ. Figure 3. Prototypical T ransient Waveform

4363 F03tr

type, and rises to infinity under DC operating conditions. P2t is not the same for all combinations of I D and V DS. absorbing energy above a certain voltage. stress level of the MOSFET .

2 VPK – VREG( )

and overcurrent faults coexist.

• tTMR [W2s] Where ∆VDS is the voltage across the MOSFET , and ∆VSNS is the SNS pin threshold, and tTMR is the overcurrent timer interval. For VIN = 15V , ∆VDS = 13V (V OUT = 2V), ∆VSNS = 50mV , RSNS = 12mΩ and C TMR = 100nF , P2t is 6.3W 2s – less than the transient SOA calculated in the previous example. Nevertheless, to account for circuit tolerances this figure should be doubled to 12.6W2s. APPLICATIONS INFORMATION

Figure 4. Safe Operating Area Required to Survive Prototypical

4363 F04

4363 F06

Figure 6. Overvoltage Regulator with N-channel MOSFET Figure 5. External GATE network the inrush current at the expense of slower turn-off time.

• CL The L T4363 does not need extra compensation compo- nents at the GATE pin for stability during an overvoltage or overcurrent event. With transient input voltage slew rates faster than 5V/µs, a gate capacitor , C1, to ground is needed to prevent self enhancement of the N-channel MOSFET . The extra gate capacitance slows down the turn off time during fault conditions and may allow excessive current during an output short event. An extra resistor , R1, in series with the gate capacitor can improve the turn off time. A diode, D1, should be placed across R1 with the cathode connected to C1 as shown in Figure 5. threshold during a fault. The pass transistor is not allowed to turn back on even after the cool down period has finished. This prevents the pass transistor from cycling between ON and OFF states when the input voltage stays at an elevated level for a long period of time, reducing the stress on the N-channel MOSFET . For the latch-off version, L T4363-1, the overvoltage comparator function is not available. Reverse Input Protection A blocking diode is commonly employed to protect the load when reverse input is possible. This diode causes extra power loss, generates heat, and reduces the available supply voltage range. The L T4363 is designed to withstand reverse voltage with- out damage to itself. The VCC, SHDN, UV , and OV pins can withstand up to 60V of DC voltage below the GND potential. Back-to-back MOSFETs must be used to block the current path through Q1’s body diode (Figure 6). Figure 7 shows the approach with a P-channel MOSFET in place of Q2. Undervoltage/Overvoltage Comparators The L T4363 has both undervoltage and overvoltage com- parators that can be used to sense the input supply volt- age. When the voltage at the UV pin is below the 1.275V threshold, the GATE pin is held low to keep the external MOSFET off. The supply voltage at the VCC pin should be at least 4V for the UV comparator to function. The overvoltage comparator prevents the L T4363-2 from restarting if the voltage at the OV pin is above the 1.275V

4363 F05

7µA with internal circuitry turned off. device is used to help turn it on. transients above 100V may cause permanent damage. will clamp the voltage spikes. Figure 8. The Zener diode limits the voltage at the pin while supply current of the L T4363 and the leakage current of D1. input of the DC/DC converter . temperature. 0.03" per amp or wider is recommended. Figure 8. Overvoltage Regulator with Input Voltage Detection

4363 F08

4363 F07

5 FB 1

Figure 7. Overvoltage Regulator with P-channel MOSFET

Rev. CFor more information www.analog.com LT4363 APPLICATIONS INFORMATION significantly by locating resistive dividers close to the pins with short VCC and GND traces. Design Example As a design example, take an application with the follow- ing specifications: VCC = 8V to 14V DC with a transient of 150V and decay time constant (τ) of 400ms, VOUT ≤ 27V , current limit (ILIM) at 5A, low battery detection of 6V , input overvoltage level at 60V , and 1ms of overvoltage early warning (Figure 8). Selection of SMAJ58A for D1 will limit the voltage at the VCC pin to less than 71V during 150V surge. The minimum required voltage at the V CC pin is 4V when V IN is at 8V; the supply current for L T4363 is 1.5mA. The maximum value for R7 to ensure proper operation is: R7 = 8V – 4V 1.5mA =2.67kΩ Select 1kΩ for R7 to accommodate all conditions. The maximum current through R7 into D1 is then calcu- lated as: ID1 = 150V – 64V 1kΩ =86mA which is easily handled by the SMAJ58A for more than 500ms. With 0.1µF of bypass capacitance, C2, along with 1k of R7, high voltage transients up to 200V with a pulse width less than 10µs are filtered out at the VCC pin. Next, calculate the resistive divider value to limit VOUT to 27V during an overvoltage event: VREG = 1.275V • R1+R2( ) R2 =27V Set the current through R1 and R2 during the overvoltage condition to 250µA. R2= 1.275V 250µA =5kΩ Choose 4.99kΩ for R2. 1.275V =100.7kΩ The nearest standard value for R1 is 100kΩ. Next calculate the sense resistor , RSNS, value: RSNS = 50mV ILIM = 50mV 5A =10mΩ C TMR is then chosen for 1ms of early warning time: CTMR = 1ms•6µA 100mV = 60nF The nearest standard value for CTMR is 47nF . Finally, calculate R4, R5, and R6 for 6V low battery detec- tion and 60V input overvoltage level: 6V • R5+R6 R4+R5+R6 =1.275V 60V • R6 R4+R5+R6 =1.275V Choose 10kΩ for R6. R4+R5= 60V •10kΩ 1.275V –10kΩ = 460.6kΩ R5=1.275V • 460.6kΩ+10kΩ 6V –10kΩ = 90kΩ R4 = 460.6kΩ – 90kΩ = 370.6kΩ Select 90.9kΩ for R5 and 374kΩ for R4. The pass transistor , Q1, should be chosen to withstand a short-circuit with VCC = 14V . In the case of a severe output short where VOUT = 0V , the total overcurrent fault time is: tOC = 47nF •0.875V 45.5µA = 0.904ms

Rev. C For more information www.analog.com LT4363 TYPICAL APPLICATIONS Overvoltage Regulator with Output Keep Alive During Shutdown APPLICATIONS INFORMATION The power dissipation in Q1 is: P = 14V •25mV 10mΩ = 35W During an output overload or soft short, the voltage at the OUT pin could stay at 2V or higher . The total overcurrent fault time when VOUT = 2V is: tOC = 47nF •0.875V 40µA =1.028ms The power dissipation in Q1 is: P = 14V – 2V( )•50mV 10mΩ = 60W These conditions are well within the Safe Operating Area of the FDB33N25. CTMR 0.1µF RSNS 10m/uni03A9 IRLR2908 VIN VOUT 12V, 4A REGULATED AT 16V

4363 TA02

D1* SMAJ58A 24.9k 287k GATE VCC 10/uni03A9 1k, 1W *DIODES INC. SANYO 25CE22GA SHDN6 UV8 OV7 FLT ENOUT CL 22µF 30.1k 10k 147k 0.1µF 1N4746A 18V UV = 6V OV = 24V 47nF

Rev. CFor more information www.analog.com LT4363 TYPICAL APPLICATIONS 2.5A, 48V Hot Swap with Overvoltage Output Regulation at 72V 2.5A, 28V Hot Swap with Overvoltage Output Regulation at 36V CTMR 0.1µF RSNS 15m/uni03A9 FDB3632 VIN VOUT 48V, 2.5A

4363 TA03

D1* SMAT70A R2 4.02k 221k GATE 10/uni03A9 SHDN6 UV *DIODES INC. UV = 35V OV = 80V VCC OV7 FLT ENOUT CL 300µF 13k 10k 604k 47nF 0.1µF CTMR 0.1µF RSNS 15m/uni03A9 IRLR2908VIN 28V VOUT 28V, 2.5A

4363 TA04

D1* SMAJ58A R2 4.02k 110k GATE 10/uni03A9 SHDN6 UV *DIODES INC. UV = 18V OV = 36V VCC OV7 FLT ENOUT CL 300µF 10k 10k 261k 47nF 0.1µF

Rev. C For more information www.analog.com LT4363 TYPICAL APPLICATIONS Overvoltage Regulator with Reverse Input Protection Up to –80V Overvoltage Regulator with 250V Surge Protection CTMR 0.1µF RSNS 10m/uni03A9 IRLR2908VIN 12V VOUT 12V, 3A CLAMPED AT 16V

4363 TA05

4.99k 57.6k GATE VCC 10/uni03A9 *DIODES INC. SANYO 25CE22GA *OPTIONAL COMPONENT FOR REDUCED STANDBY CURRENT SHDN6 UV8 OV7 FLT ENOUT CL** 22µF IRLR2908 D1* SMAJ58CA 10k 2N3904 1N4148 D3** 1N4148 10/uni03A9 47nF CTMR 0.1µF 10/uni03A9 RSNS 10m/uni03A9 FDB33N25 MPS-A42 VIN 12V

4363 TA07

D1* SMAJ58A *DIODES INC. CL 22µF 0.1µF VCC DC/DC CONVERTER GNDSHDN VCCR2 4.99k 127k 49.9k 57.6kC1 47nF 49.9k 9 12 7 10

Rev. CFor more information www.analog.com LT4363 PACKAGE DESCRIPTION Refer to https://www.analog.com/en/design-center/packaging-quality-symbols-footprints.html for the most recent package drawings. DE/UE Package 12-Lead Plastic DFN (4mm × 3mm) (Reference L TC DWG # 05-08-1695 Rev D) 4.00 ±0.10 (2 SIDES) 3.00 ±0.10 (2 SIDES) NOTE: 1. DRAWING PROPOSED TO BE A VARIATION OF VERSION (WGED) IN JEDEC PACKAGE OUTLINE M0-229 2. DRAWING NOT TO SCALE 3. ALL DIMENSIONS ARE IN MILLIMETERS 4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE 5. EXPOSED PAD SHALL BE SOLDER PLATED 6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE 0.40 ± 0.10 BOTTOM VIEW—EXPOSED PAD 1.70 ± 0.10 0.75 ±0.05 R = 0.115 TYP R = 0.05 TYP

2.50 REF

R = 0.20 OR 0.35 × 45° CHAMFER PIN 1 TOP MARK (NOTE 6)

0.200 REF

0.00 – 0.05 (UE12/DE12) DFN 0806 REV D RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS APPLY SOLDER MASK TO AREAS THAT ARE NOT SOLDERED 2.20 ±0.05 0.70 ±0.05 3.60 ±0.05 PACKAGE OUTLINE 3.30 ±0.10 0.25 ± 0.05

0.50 BSC

1.70 ± 0.05 3.30 ±0.05 0.25 ± 0.05

Rev. C For more information www.analog.com LT4363 PACKAGE DESCRIPTION Refer to https://www.analog.com/en/design-center/packaging-quality-symbols-footprints.html for the most recent package drawings. 12-Lead Plastic MSOP (Reference L TC DWG # 05-08-1668 Rev A) MSOP (MS12) 0213 REV A 0.53 ±0.152 (.021 ±.006) SEATING PLANE 0.18 (.007) 1.10 (.043) MAX 0.22 –/uni00A00.38 (.009 – .015) TYP 0.86 (.034) REF 0.650 (.0256) BSC 12 11 10 9 8 7 NOTE: 1. DIMENSIONS IN MILLIMETER/(INCH) 2. DRAWING NOT TO SCALE 3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS. INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE 5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX 0.254 (.010) 0° – 6° TYP DETAIL “A” DETAIL “A” GAUGE PLANE 5.10 (.201) MIN 3.20 – 3.45 (.126 – .136) 0.889 ±0.127 (.035 ±.005) RECOMMENDED SOLDER PAD LAYOUT 0.42 ±0.038 (.0165 ±.0015) TYP 0.65 (.0256) BSC 4.039 ±0.102 (.159 ±.004) (NOTE 3) 0.1016 ±0.0508 (.004 ±.002) 1 2 3 4 5 6 3.00 ±0.102 (.118 ±.004) (NOTE 4) 0.406 ±0.076 (.016 ±.003) REF 4.90 ±0.152 (.193 ±.006) .016 – .050 (0.406 – 1.270) .010 – .020 0° – 8° TYP .008 – .010 (0.203 – 0.254) N 2 3 4 5 6 7 8 N/2 .150 – .157 (3.810 – 3.988) NOTE 3 16 15 14 13 .386 – .394 (9.804 – 10.008) NOTE 3 .228 – .244 (5.791 – 6.197) 12 11 10 9 S16 REV G 0212 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC .245 MIN N 1 2 3 N/2 .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE S Package 16-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610 Rev G)

Rev. CFor more information www.analog.com LT4363

REVISION HISTORY

REV DATE DESCRIPTION PAGE NUMBER A 3/12 Add 57.6k resistor to Typical Application 24 B 6/13 Added H and MP temperature grades to Order Information Operating Voltage Range for all temperature grades is 4V to 80V Reverse Input Current maximum changed to –4mA from –3mA IGATE(UP): At 12V , changed from [–10, –20, –35]µA to [–15, –30, –45]µA. At 48V , changed from [–10, –25, –40]µA Current Limit Sense Voltage: At 12V , improved from 43mV — 58mV to 45mV — 55mV . At 48V , improved from 45mV — 59mV to 48mV — 58mV ISNS maximum changed from 30µA to 40µA VTMR(H) range changed from 3.7V — 5V to 3.5V — 5.4V OUT Reset Threshold minimum changed from 1.9V to 1.8V Updated curves in graphs G05, G06 and G09 Corrected Y-axis numbers in Warning Period TMR Current, graph G15 Replaced Current Limit at Supply Voltage graph with Current Limit Foldback GATE Pin Description: Added information on 14V protection clamp TMR Pin Description: Added 10nF minimum capacitor requirement Changed GATE to SNS clamp in Block Diagram to 14V from 13V Added 0.1µF C2 to Typical Application circuits 18, 19 C 1/24 Updated Applications Section Updated Description Section Updated Operation Section Updated Applications Information Section 13, 15 Information furnished by Analog Devices is believed to be accurate and reliable. However , no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Rev. C  ANALOG DEVICES, INC. 2011-2024 www.analog.com RELATED PARTS TYPICAL APPLICATION Overvoltage Regulator with Ideal Diode Reverse Voltage Protection PART NUMBER DESCRIPTION COMMENTS L TC1696 Overvoltage Protection Controller ThinSOT™ Package, 2.7V to 27V L TC2909 T riple/Dual Inputs UV/OV Negative Monitor Pin Selectable Input Polarity Allows Negative and OV Monitoring L TC2912/L TC2913 Single/Dual UV/OV Voltage Monitor Ads UV and OV T rip Values, ±1.5% Threshold Accuracy L TC2914 Quad UV/OV Monitor For Positive and Negative Supplies L TC3827/L TC3827-1 Low IQ, Dual, Synchronous Controller 4V ≤ VIN ≤ 36V, 0.8V ≤ VOUT ≤ 10V , 80µA Quiescent Current L TC3835/L TC3835-1 Low IQ, Synchronous Step-Down Controller Single Channel L TC3827/L TC3827-1 L T3845 Low IQ, Synchronous Step-Down Controller 4V ≤ VIN ≤ 60V, 1.23V ≤ VOUT ≤ 36V, 120µA Quiescent Current L T3850 Dual, 550kHz, 2-Phase Synchronous Step-Down Controller Dual 180° Phased Controllers, VIN 4V to 24V, 97% Duty Cycle, 4mm × 4mm QFN-28, SSOP-28 Packages L TC3890 Low IQ, Dual 2-Phase, Synchronous Step-Down Controller 4V ≤ VIN ≤ 60V, 0.8V ≤ VOUT ≤ 24V , 50µA Quiescent Current L T4256-1 Positive 48V Hot Swap Controller with Open-Circuit Detect Foldback Current Limiting, Open-Circuit and Overcurrent Fault Output, Up to 80V Supply L TC4260 Positive High Voltage Hot Swap Controller with 8-Bit ADC and I2C Wide Operating Range 8.5V to 80V L TC4352 Ideal MOSFET ORing Diode External N-Channel MOSFETs Replace ORing Diodes, 0V to 18V L TC4354 Negative Voltage Diode-OR Controller Controls T wo N-Channel MOSFETs, 1µs Turn-Off, 80V Operation L TC4355 Positive Voltage Diode-OR Controller Controls T wo N-Channel MOSFETs, 0.3µs Turn-Off, 80V Operation L T4356-1 High Voltage Surge Stopper 100V Overvoltage and Overcurrent Protection, Latch-Off and Auto-Retry Options L TC4364 Surge Stopper with Ideal Diode 4V to 80V Operation; –40V Reverse Input, –20V Reverse Output Protection L TC4365 Window Passer - OV , UV and Reverse Supply Protection Controller 2.5V to 34V Operation, Protects 60V to –40V 0.1µF 10m/uni03A9IRLR2908 OUTPUT CLAMP AT 16V

4363 TA06

4.99k 57.6kGATEVCC 10/uni03A9 –60V TO 75V DC PROTECTION 100V TRANSIENT MAXIMUM UV = 4.5V SHDN UV DC/DC CONVERTER GND SHDN VCC FLT FAULT ENOUT 22µF 49.9k 127k L TC4357 GND IN OUT VDD GATE FDB3632VIN 12V MMBD1205 DCLAMP SMAT70A