LT4256-1/LTC4256-2 - Positive High Voltage Hot Swap Controllers

Document overview

  • Manufacturer or author: Linear Technology Corporation
  • PDF pages: 16

Technical content

FEATURES

4256-1/LT4256-2 are high voltage Hot Swap TM controllers that allow a board to be safely inserted and removed from a live backplane. An internal driver drives an external N-channel MOSFET switch to control supply voltages ranging from 10.8V to 80V. The LT4256-1/LT4256-2 features an adjustable analog foldback current limit. If the supply remains in current limit for more than a programmable time, the N-channel MOSFET shuts off and the PWRGD output asserts low. The LT4256-2 automatically restarts after a time-out delay. The LT4256-1 latches off until the UV pin is cycled low. The PWRGD output indicates when the output voltage rises above a programmed level. An external resistor string from V CC provides programmable undervoltage protection. The LT4256 can be used as an upgrade to LT1641 designs. See Table 1 on page 14 for upgraded specifications. The LT4256-1 and LT4256-2 are available in an 8-pin SO package that is pin compatible with the LT1641. ■ Hot Board Insertion ■ Electronic Circuit Breaker/Power Bussing ■ Industrial High Side Switch/Circuit Breaker ■ 24V/48V Industrial/Alarm Systems ■ Ideally Suited for 12V, 24V and 48V Distributed Power Systems ■ 48V Telecom Systems , LTC and LT are registered trademarks of Linear Technology Corporation. ■ Allows Safe Board Insertion and Removal from a Live Backplane ■ Controls Supply Voltage from 10.8V to 80V ■ Foldback Current Limiting ■ Overcurrent Fault Detection ■ Drives an External N-Channel MOSFET ■ Programmable Supply Voltage Power-Up Rate ■ Undervoltage Protection ■ Latch Off Operation Mode (LT4256-1) ■ Automatic Retry (LT4256-2) ■ Available in an 8-Pin SO Package Positive High Voltage Hot Swap Controllers Hot Swap is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners.

4256 TA01

0.02Ω LT4256-1/ LT4256-2 SENSE VCC GATE FB PWRGD UV TIMER GND VIN 48V GND (SHORT PIN) IRF530 CMPZ5241B 11V 8.06k 64.9k 100Ω 4.02k 10Ω 36.5k PWRGD VOUT 48V 27k CL 33nF 0.1µF 10nF SMAT70A UV = 36V PWRGD = 40V 48V, 2A Hot Swap Controller PWRGD 50V/DIV VOUT 50V/DIV INRUSH CURRENT 500mA/DIV VIN 50V/DIV 2.5ms/DIV 4256 TA02 LT4256 Start-Up Behavior CL = 225µF

Order Options Tape and Reel: Add #TR Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF Lead Free Part Marking: http://www.linear.com/leadfree/ (Note 1) Operating Temperature ABSOLUTE AXI U RATI GSW WW U Consult LTC Marketing for parts specified with wider operating temperature ranges. PACKAGE/ORDER I FOR ATIOUU W ORDER PART NUMBER S8 PART MARKING 42561 42561I 42562 42562I LT4256-1CS8 LT4256-1IS8 LT4256-2CS8 LT4256-2IS8 TJMAX = 125°C, θJA = 110°C/W ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 48V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VCC Operating Voltage ● 10.8 80 V ICC Operating Current 1.8 3.9 mA VUVLH Undervoltage Threshold V CC Low-to-High Transition ● 3.96 4 4.04 V VUVHYS Hysteresis 0.25 0.4 0.55 V IINUV UV Input Current UV ≥ 1.2V –0.1 –1 µA UV = 0V –1.5 –3 µA VUVRTH Fault Latch Reset Threshold Voltage ● 0.4 0.85 1.2 V VSENSETRIP SENSE Pin Trip Voltage (VCC – VSENSE) FB = 0V ● 5.5 14 22 mV FB ≥ 2V ● 45 55 65 mV IINSNS SENSE Pin Input Current V SENSE = VCC 40 70 µA IPU GATE Pull-Up Current Charge Pump On, ∆VGATE = 7V ● –16 –32 –63 µA IPD GATE Pull-Down Current Any Fault, V GATE = 3V 40 62 80 mA ∆VGATE External N-Channel Gate Drive (Note 2) V GATE – VCC, 10.8V ≤ VCC ≤ 20V ● 4.5 8.8 12.5 V 20V ≤ VCC ≤ 80V ● 10 11.6 12.8 V VFB FB Voltage Threshold FB High-to-Low Transition ● 3.95 3.99 4.03 V FB Low-to-High Transition ● 4.2 4.45 4.65 V VFBHYS FB Hysteresis Voltage 0.3 0.45 0.6 V VOLPGD PWRGD Output Low Voltage I O = 1.6mA 0.25 0.4 V IO = 5mA 0.6 1 V IPWRGD PWRGD Pin Leakage Current V PWRGD = 80V 0.1 1 µA IINFB FB Input Current FB = 4.5V –0.1 –1 µA ITIMERPU TIMER Pull-Up Current TIMER = 3V, During Fault ● – 63 –105 –147 µA ITIMERPD TIMER Pull-Down Current TIMER = 3V ● 1.5 3 5 µA VTHTIMER TIMER Shut-Down Threshold C TIMER = 10nF ● 4.3 4.65 5 V DTIMER Duty Cycle (RETRY Mode) ● 1.5 3 4.5 % TOP VIEW VCC SENSE GATE TIMER UV FB PWRGD GND S8 PACKAGE 8-LEAD PLASTIC SO

tPHLUV UV Low to GATE Low 1.7 3 µs tPLHUV UV High to GATE High C GATE = 0 6 9 µs tPHLFB FB Low to PWRGD Low 0.8 2 µs tPLHFB FB High to PWRGD High 3.2 5 µs tPHLSENSE (VCC – VSENSE) High to GATE Low V CC – VSENSE = 275mV 1 3 µs ELECTRICAL CHARACTERISTICSThe ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCC = 48V unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS Note 1: Absolute Maximum Ratings are those values beyond which the life of a device may be impaired. Note 2: An internal clamp limits the GATE pin to a minimum of 10V above VCC. Driving this pin to a voltage beyond the clamp voltage may damage the part. TYPICAL PERFOR A CE CHARACTERISTICS UW ICC vs Temperature PWRGD Thresholds vs Temperature PWRGD Output Voltage vs I PWRGD ICC vs VCCUV Thresholds vs Temperature SENSE Pin Regulation Voltage vs Temperature TEMPERATURE (°C) –50 3.5 3.6 UV THRESHOLDS (V)3.7 3.8 3.9 4.1 –25 02 5 5 0

4256 G01

4.0 H-L THRESHOLD L-H THRESHOLD TEMPERATURE (°C) SENSE PIN REGULATION VOLTAGE (mV)

4256 G02

FB = 0V FB > 2V –50 –25 0 2 55 07 5 1 0 0 VCC (V) 2.0 2.5 3.5 40 60

4256 G03

1.5 1.0 20 30 50 70 80 0.5 3.0 ICC (mA) TEMPERATURE (°C) ICC (mA) 0.5 1.0 1.5 2.5

4256 G04

2.0 VCC = 48V –50 –25 0 2 55 07 5 1 0 0 TEMPERATURE (°C) 3.9 4.0 PWRGD THRESHOLDS (V) 4.1 4.2 4.3 4.5

4256 G05

4.4 H-L THRESHOLD L-H THRESHOLD –50 –25 0 2 55 07 5 1 0 0 IPWRGD (mA) VPWRGD (V) 2 468

4256 G06

Specifications are at TA = 25°C unless otherwise noted.

TYPICAL PERFOR A CE CHARACTERISTICS UW GATE Pin Pull-Up Current vs Temperature GATE Pin Pull-Down Current vs Temperature UV Pin Current vs UV Pin Voltage V GATE – VCC Voltage vs Temperature TIMER Pin Currents vs Temperature VGATE – VCC Voltage vs Temperature TIMER Pin Currents vs VCC Timer Shutdown Threshold vs Temperature TEMPERATURE (°C) –40 GATE PIN PULL-UP CURRENT (µA) –35 –30 –20

4256 G07

–10 –25 –15 –50 –25 0 2 55 07 5 1 0 0 TEMPERATURE (°C) GATE PIN PULL-DOWN CURRENT (mA)57

4256 G08

–50 –25 0 2 55 07 5 1 0 0 VUV (V) –1.4 IUV (µA) –1.2 –0.8 –0.6 –0.4 20 30 40 0.4

4256 G09

–1.0 12 4 35 0 –0.2 0.2 TEMPERATURE (°C) VGATE – VCC VOLTAGE (V)

4256 G10

VCC = 10.8V VCC = 12V VCC = 18V –50 –25 0 25 50 75 100 TEMPERATURE (°C)

10.0 VGATE – VCC VOLTAGE (V)

10.5 11.0 12.0 14.0

4256 G11

13.0 13.5 11.5 12.5 VCC = 80V VCC = 48V VCC = 20V –50 –25 0 25 50 75 100 VCC (V) ITIMER (µA) 2.5 5.0 40 60

4256 G13

–80 –100 20 30 50 70 80 –120 –140 PULL-UP CURRENT PULL-DOWN CURRENT TEMPERATURE (°C) TIMER SHUTDOWN THRESHOLD (V)4.2 4.4 4.8 5.4

4256 G14

5.2 4.6 5.0 –50 –25 0 25 50 75 100 Specifications are at TA = 25°C unless otherwise noted. TEMPERATURE (°C) –50 –140 ITIMER (µA) –120 –100 –80 –25 02 5 5 0

4256 G12

5 PULL-DOWN CURRENT

TYPICAL PERFOR A CE CHARACTERISTICS UW FB Pin Current vs FB Pin Voltage Gate Pull-Down Capability vs VCC Below Minimum Operating Voltage VFB (V) –0.4 IFB (µA) –0.3 –0.2 –0.1 0.1 0.2 10 20 30 40

4256 G15

VCC (V) IGATE (mA ) 2 468

4256 G16

Specifications are at TA = 25°C unless otherwise noted.

UV (Pin 1): Undervoltage Sense. UV is an input that enables the output voltage. When UV is driven above 4V, GATE will start charging and the output turns on. When UV goes below 3.6V, GATE discharges and the output shuts off. Pulsing UV low for a minimum of 5µs after a current limit fault cycle resets the fault latch (LT4256-1) and allows the part to turn back on. This command is only accepted after TIMER has discharged below 0.65V. To disable UV sens- ing, connect UV to a voltage beween 5V and 44V. FB (Pin 2): Power Good Comparator Input. FB monitors the output voltage through an external resistive divider. When the voltage on FB is lower than the high-to-low threshold of 3.99V, PWRGD is pulled low and released when FB is pulled above the 4.45V low-to-high threshold. The voltage present on FB affects foldback current limit (see Figure 7 and related discussion). PWRGD (Pin 3): Power Good Output. PWRGD is pulled low whenever the voltage on FB falls below the 3.99V high- to-low threshold voltage. It goes into a high impedance state when the voltage on FB exceeds the low-to-high threshold voltage. An external pull-up resistor can pull PWRGD to a voltage higher or lower than V CC. GND (Pin 4): Device Ground. This pin must be tied to a ground plane for best performance. TIMER (Pin 5): Timing Input. An external timing capacitor from TIMER to GND programs the maximum time the part is allowed to remain in current limit. When the part goes into current limit, a 105µA pull-up current source starts to charge the timing capacitor. When the voltage on TIMER reaches 4.65V (typ), GATE pulls low; the TIMER pull-up current will be turned off and the capacitor is discharged by a 3µA pull-down current. When TIMER falls below 0.65V (typ), GATE turns on again for the LT4256-2. UV must be cycled low after TIMER has discharged below 0.65V (typ) to reset the LT4256-1. If UV is not cycled low (LT4256-1), GATE remains latched off and TIMER is discharged to near GND. Under an output short-circuit condition, the LT4256-2 cycles on and off with a 3% duty cycle. GATE (Pin 6): High Side Gate Drive for the External N- Channel MOSFET. An internal charge pump guarantees at least 10V of gate drive for V CC supply voltages above 20V and 4.5V of gate drive for V CC supply voltages between 10.8V and 20V. The rising slope of the voltage on GATE is set by an external capacitor connected from GATE to GND and an internal 32 µA pull-up current source from the charge pump output. If the current limit is reached, the GATE voltage is adjusted to maintain a constant voltage across the sense resistor while the timing capacitor starts to charge. If the TIMER voltage ever exceeds 4.65V, GATE is pulled low. GATE is also pulled to GND whenever UV is pulled low, the V CC supply voltage drops below the externally programmed undervoltage threshold, or VCC drops below the internal UVLO threshold (9.8V). GATE is clamped internally to a maximum voltage of 11.6V (typ) above VCC under normal operating conditions. Driv- ing this pin beyond the clamp voltage may damage the part. A Zener diode is needed between the gate and source of the external MOSFET to protect its gate oxide under instantaneous short-circuit conditions. See Applications Information. SENSE (Pin 7): Current Limit Sense Input. A sense resistor is placed in the supply path between V CC and SENSE. The current limit circuit regulates the voltage across the sense resistor (VCC – SENSE) to 55mV while in current limit when FB is 2V or higher. If FB drops below 2V, the regulated voltage across the sense resistor de- creases linearly to 14mV when FB is 0V. To defeat current limit, connect SENSE to VCC. VCC (Pin 8): Input Supply Voltage. The positive supply input ranges from 10.8V to 80V for normal operation. I CC is typically 1.8mA. An internal circuit disables the LT4256-1/LT4256-2 for inputs less than 9.8V (typ).

108µA VP VP LOGIC 14mV ~ 55mV 9.8V 4V VCC INTERNAL UV TIMER LOW TIMER HIGH GND 0.65V 4.65V 3.99V3.99V PWRGD TIMER 4256 BD VCC SENSE VP GEN FB 3µA UV GATE CHARGE PUMP AND GATE DRIVER REF GEN 8 7 CURRENT LIMIT FOLDBACK UV

Figure 2. UV to GATE Timing Figure 3. VOUT to PWRGD Timing Figure 4. SENSE to GATE Timing

4256 F02

4256 F04

currents from the backplane power bus as they charge. boards in the system to reset. when the output supply voltage is ready with a high output. detection and capacitor C1 controls the GATE slew rate. R6 prevents high frequency oscillations in Q1.

4256 F03

Figure 5. 1600mA, 48V Application Figure 6. Start-Up Waveforms where CL is the total load capacitance. the sense resistor and TIMER begins to charge. low until UV goes above 4V again.

4256 F05

4256 F06

Figure 7. Current Limit Sense Voltage vs Feedback Pin Voltage Figure 8. Response Time to Overcurrent where R5 is the sense resistor. constant at 55mV (see Figure 7). tion of the overdrive at SENSE.

  • == µ25 105 46 5 (6) 14mV 0V 2V FB

4256 F07

high impedance current source to a low impedance. it is discharged rapidly, turning off the external MOSFET. typical threshold, to prevent overheating transistor Q1). fault. These waveforms are shown in Figure 10. the capacitor C2 at the TIMER pin will begin to charge. Figure 9. LT4256-1 Current Limit Waveforms Figure 10. LT4256-2 Current Limit Waveforms

4256 F09

4256 F10

Figure 12. Active Low Enable PWRGD Application

4256 F11

pable of operating from a pull-up as high as 80V. Figure 11. How to Use a Logic Signal to Control LT4256 Turn-On/-Off

Figure 13. ∆VGATE vs VCC to be safe from damage with supply voltages up to 80V. ring below ground (due to the parasitic trace inductance).

4256 F13

but it may not be enough for some applications. charged through the LT4256-1/LT4256-2.

Figure 14. Negative Output Voltage Protection Diode Application

4256 F14

for if using the LT4256 in an LT1641 application. Table 1. Differences Between LT1641 and LT4256

8-Lead Plastic Small Outline (Narrow .150 Inch) (Reference LTC DWG # 05-08-1610) .016 – .050 (0.406 – 1.270) .010 – .020 0°– 8° TYP .008 – .010 (0.203 – 0.254) SO8 0303 .053 – .069 (1.346 – 1.752) .014 – .019 (0.355 – 0.483) TYP .004 – .010 (0.101 – 0.254) .050 (1.270) BSC 1 2 3 4 .150 – .157 (3.810 – 3.988) NOTE 3 8 7 6 5 .189 – .197 (4.801 – 5.004) NOTE 3 .228 – .244 (5.791 – 6.197) .245 MIN .160 ±.005 RECOMMENDED SOLDER PAD LAYOUT .045 ±.005 .050 BSC .030 ±.005 TYP INCHES (MILLIMETERS) NOTE: 1. DIMENSIONS IN 2. DRAWING NOT TO SCALE 3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .006" (0.15mm) Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Figure 15. High dV/dT MOSFET Turn-On Protection Circuit

4256 TA03