LT4180 - Virtual Remote Sense Controller
Document overview
- Manufacturer or author: Linear Technology Corporation
- PDF pages: 18
Technical content
For more information www.linear .com/4180 Typical applicaTion FeaTures DescripTion Virtual Remote Sense Controller The LT®4180 solves the problem of providing tight load regulation over long, highly resistive cables without requiring an additional pair of remote sense wires. This Virtual Remote Sense™ device continuously interrogates the line impedance and corrects the power supply output voltage via its feedback loop to maintain a steady voltage at the load regardless of current changes. The LT4180 is a full-featured controller with 5mA opto- isolator sink capability, under /overvoltage lockout , soft-start and a ±1% internal voltage reference. The Virtual Remote Sense feature set includes user-program- mable dither frequency and optional spread spectrum dither. The LT4180 works with any topology and type of isolated or nonisolated power supply, including DC/DC converters and adjustable linear regulators. The LT4180 is available in a 24-lead, SSOP package. Isolated Power Supply with Virtual Remote Sense
applicaTions
n Tight Load Regulation with Highly Resistive Cables without Requiring Remote Sense Wiring n Compatible with Isolated and Nonisolated Power Supplies n ±1% Internal V oltage Reference n 5mA Sink Current Capability n Soft-Correct Reduces Turn-On T ransients n Undervoltage and Overvoltage Protection n Pin-Programmable Dither Frequency n Optional Spread Spectrum Dither n Wide VIN Range: 3.1V to 50V n 24-Lead SSOP Package n 12V High Intensity Lamps n 28V Industrial Systems n High Power (>40 Watts) CAT5 Cable Systems n Wiring Drop Cancellation for Notebook Computer Batter y Charging n AC and DC Adaptors n Well-Logging and Other Remote Instrumentation n Surveillance Equipment L, LT, LT C, LT M, Linear Technology and the Linear logo are registered trademarks and Virtual Remote Sense is a trademark of Linear Technology Corporation. All other trademarks are the property of their respective owners. VLOAD vs VWIRE CAT5E CABLE LINE LINE OVFB DIV0 DIV1VIN COSCCOMP DRAIN SENSE DIV2 SPREAD CHOLD1 CHOLD2 CHOLD3 CHOLD4
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– L T4180 VIRTUAL REMOTE SENSE CL RL RSENSE VWIRING (V) VLOAD (V) 4.97 4.98 4.99 4.96 4.95 0.5 1.5 1 2 2.5 3 4.92 4.91 4.94 5.00 4.93
4180 TAO1b
For more information www.linear .com/4180 pin conFiguraTionabsoluTe MaxiMuM raTings INTVCC, RUN, FB, OV, ROSC, OSC, DIV0, DIV1, DIV2, SPREAD, CHOLD1, CHOLD2, CHOLD3, CHOLD4, DRAIN, COMP, IN 10mA 3mA 5°C Operating Junction Temperature Range (Note 2) E-, 40°C to 125°C MP-Gr 55°C to 125°C 65°C to 125°C (Note 1) TOP VIEW GN PACKAGE 24-LEAD NARROW PLASTIC SSOP INTV CC DRAIN COMP CHOLD1 GUARD2 CHOLD2 GUARD3 CHOLD3 GUARD4 CHOLD4 FB GND VIN VPP SENSE RUN OV SPREAD DIV0 DIV1 DIV2 OSC ROSC COSC TJMAX = 150°C, θJA = 85°C/W orDer inForMaTion LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE LT4180EGN#PBF LT4180EGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –40°C to 125°C LT4180IGN#PBF LT4180IGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –40°C to 125°C LT4180MPGN#PBF LT4180MPGN#TRPBF LT4180GN 24-Lead Narrow Plastic SSOP –55°C to 125°C Consult LT C Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container. For more information on lead free part marking, go to: http://www.linear.com/leadfree/ For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
elecTrical characTerisTics
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VIN Operating Supply Voltage l 3.10 50 V IVIN Input Quiescent Current ROSC Open, COSC Open, SENSE = VIN l 1 2 mA VREF Reference Voltage VCHOLD2 = VCHOLD3 = 1.2V, Measured at CHOLD4 During T rack ∆VOUT Clock Phase l 1.209 1.197 1.221 1.221 1.233 1.245 V V I LIM Open-Drain Current Limit With FB = VREF + 200mV, OSC Stopped with Voltage Feedback Loop Closed 5 12 17 mA VOL DRAIN Low Voltage VIN = 3V 0.3 V VINTVCC LDO Regulator Output Voltage V IN = 5V 3.15 V The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted.
For more information www.linear .com/4180 Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2. The LT4180E is guaranteed to meet performance specifications from 0°C to 125°C junction temperature. Specifications over the –40°C The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C, VIN = SENSE = 5V, unless otherwise noted. SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS VINTVCC LDO Regulator Output Voltage in Dropout VIN = 2.5V 2.2 V VOV Overvoltage Threshold Rising 1.21 V VOHYST Overvoltage Input Hysteresis V RISING – VFALLING 15 80 mV VRUN Run Threshold Falling 1.21 V VRHYST Run Input Hysteresis VRISING – VFALLING 15 80 mV IFB Input Bias Current –0.2 0.2 µA AV(RATIO) Current Amplifier Gain Ratio A VL/AVH, AV Measured in V/V 0.891 0.9 0.909 ISENSE Current Amplifier Input Bias Current Measured at SENSE with SENSE = V IN –1 1 µA AV ∆VFB Amplifier Gain 9.7 10 10.3 V/V ICHOLD1 T rack/Hold Charging Current Measured at CHOLD1 with V CHOLD1 = 1.2V ±60 µA ICHOLD2 T rack/Hold Charging Current Measured at CHOLD2 with V CHOLD2 = 1.2V ±25 µA ICHOLD3 T rack/Hold Charging Current Measured at CHOLD3 with V CHOLD3 = 1.2V ±25 µA ICHOLD4 T rack/Hold Charging Current Measured at CHOLD4 with V CHOLD4 = 1.5V, VCHOLD2 = 1V, VCHOLD3 = 1.2V 10 µA Measured at CHOLD4 with VCHOLD4 = 1.5V, VCHOLD2 = 1.4V, VCHOLD3 = 1.2V –200 µA ISC Soft-Correct Current Measured at CHOLD4 ±1.5 µA ILKG1 T rack/Hold Leakage Current Measured at CHOLD1 with VCHOLD1 = 1.2V ±1 µA ILKG2 T rack/Hold Leakage Current Measured at CHOLD2 with VCHOLD2 = 1.2V ±1 µA ILKG3 T rack/Hold Leakage Current Measured at CHOLD3 with VCHOLD3 = 1.2V ±1 µA ILKG4 T rack/Hold Leakage Current Measured at CHOLD4 with VCHOLD4 = 1.2V ±1 µA fOSC Oscillator Frequency ROSC = 20k, COSC = 1nF 170 200 230 kHz gmFB Voltage Error Amplifier T ransconductance Measured from FB to COMP, V COMP = 2V, OSC Stopped with Voltage Feedback Loop Closed 120 µmho gmIAMP Current Amplifier T ransconductance Measured from SENSE to COMP, V COMP = 2V, OSC Stopped with Current Feedback Loop Closed 700 µmho to 125°C operating junction temperature range are assured by design characterization and correlation with statistical process controls. The LT4180I is guaranteed over the full –40°C to 125°C operating junction temperature range. The LT4180MP is guaranteed over the full –55°C to 125°C operating junction temperature range. Note 3. Positive current is defined as flowing into a pin.
For more information www.linear .com/4180 Typical perForMance characTerisTics IDRAIN vs VDRAIN Normal Timing Spread Spectrum Timing VLOAD vs VWIRE Load Step in 12V Linear Application Load Step in Buck Application VREF vs Temperature INTVCC vs Temperature Oscillator Frequency vs Temperature VWIRING (V) VLOAD (V) 4.97 4.98 4.99 4.96 4.95 0.5 1.5 1 2 2.5 3 4.92 4.91 4.94 5.00 4.93
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200mA TO 500mA LOAD TRANSIENT 100µF LOAD CAP VSENSE 2V/DIV VLOAD 2V/DIV ILOAD 200mA/DIV
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RWIRE = 8/uni03A9 5µs/DIV TRIGGERED ON CHOLD1 500mV/DIV CHOLD1 WITH 15k PULL-DOWN 2V/DIV OSC
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1µs/DIV TRIGGERED ON OSC 500mV/DIV CHOLD1 WITH 15k PULL-DOWN 2V/DIV OSC
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1.5A RWIRE = 2.5/uni03A9 500mA TO 1.5A LOAD TRANSIENT 470µF LOAD CAP TEMPERATURE (°C) –55 VREF (V) 1.2205 1.2210 1.2215 105 1.2200 1.2195 1.2190 –35 –15 5 25 45 65 85 125
4108 G01
TEMPERATURE (°C) –55 INTVCC (V) 3.150 3.160 3.155 3.165 105 3.145 3.140 3.135 –35 –15 5 25 45 65 85 125
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TEMPERATURE (°C) –55 FREQUENCY (kHz) 203.0 203.5 204.0 105 202.5 202.0 201.5 –35 –15 5 25 45 65 85 125
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ROSC = 20k COSC = 1nF VDRAIN (V) IDRAIN (mA)8 0.7
4180 G04
capacitor provides decoupling and output compensation. on the regulator control pin. additional compensation. It must be left open if unused. GUARD2 (Pin 5): Guard Ring Drive for CHOLD2. GUARD3 (Pin 7): Guard Ring Drive for CHOLD3. GUARD4 (Pin 9): Guard Ring Drive for CHOLD4. should be no greater than 0.1 times the dither frequency. For example, with fDITHER = 1kHz, t = 0.1ms. curacy, the minimum recommended capacitance is 100pF. frequency is set by this resistor and COSC. also be used with this output. DIV2 (Pin 16): Dither Division Ratio Programming Pin. DIV1 (Pin 17): Dither Division Ratio Programming Pin. DIV0 (Pin 18): Dither Division Ratio Programming Pin. Table 1. Programming the Dither Division Ratio (fOSC/fDITHER) ming the start-up threshold for the line drop corrector. to the current sense resistor. Kelvin connect to RSENSE. VPP (Pin 23): Connect this pin to INTVCC. this pin and minimize interconnect resistance.
For more information www.linear .com/4180 block DiagraM 4180 BD CORRECTED _REF GM2 OV UV + – GM1 TRACK/ HOLD + – IAMP TRACK/ HOLD INST AMP TRACK/ HOLD TRACK/ HOLD TRACK_HI_FB TRACK_LOW_FB TRACK_DEL TA_FB REF REF REF_OK CHOLD2 FB GUARD2 GUARD3 GUARD4
12 GND
4 CHOLD1
3 COMP
2 DRAIN
21 RUN
TRACK_HI_I FB_SELECT OVERVOL TAGE UNDERVOL TAGE BANDGAP SENSE INTVCC24 VIN LDO VPP TRIM CIRCUIT HI_GAIN RLIM 19SPREAD 18DIV0 17DIV1 16DIV2 15OSC SPREAD SPECTRUM CLOCK GENERATOR OSC MOD CLK
measure at the load, which may not always be practical. the regulator and looking at the resulting voltage change. since the AC resistance at the load is very low. There are four sample-and-hold capacitors in the LT4180. change is amplified by a factor of 10. drops is dependent upon the accuracy of the computations. The LT4180 can correct better than 50 to 1 for line drops. Figure 1. T raditional Remote Sensing Figure 2. Virtual Remote Sensing
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and provides best control loop response. Figure 4. Nonisolated Regulator Interface as the ITH pin voltage is made more positive. Figure 5. Isolated Power Supply Interface Figure 6. Cascoded DRAIN Pin for Isolated Supplies
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of load regulation and the dither frequency of the LT4180. this information is also stored in the Virtual Remote Sense.
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MOSFET for the cascode transistor. for voltage drops due to wiring resistance.
For more information www.linear .com/4180 applicaTions inForMaTion DESIGN PROCEDURE The first step in the design procedure is to determine whether the LT4180 will control a linear or switching supply/ regulator. If using a switching power supply or regulator, it is recommended that the supply be synchronized to the LT4180 by connecting the OSC pin to the SYNC pin (or equivalent) of the supply. If the power supply is synchronized to the LT4180, the power supply switching frequency is determined by: fOSC = 4 ROSC • COSC Recommended values for ROSC are between 20k and 100k (with 30.1k the optimum for best accuracy) and greater than 100pF for COSC. COSC may be reduced to as low as 50pF, but oscillator frequency accuracy will be somewhat degraded. The following example synchronizes a 250kHz switching power supply to the LT4180. In this example, start with R OSC = 30.1k: COSC = 4 250kHz • 30.1k = 531pF This example uses 470pF. For 250kHz: ROSC = 4 250kHz • 470pF = 34.04k The closest standard 1% value is 34k. The next step is to determine the highest practical dither frequency. This may be limited either by the response time of the power supply or regulator, or by the propaga- tion time of the wiring connecting the load to the power supply or regulator. First determine the settling time (to 1% of final value) of the power supply. The settling time should be the worst-case value (over the whole operating envelope: V IN, ILOAD, etc.). F1 = 1 2 • tSETTLING Hz For example, if the power supply takes 1ms to settle (worst-case) to within 1% of final value: F1 = 1 2 • 1e – 3= 500Hz Next, determine the propagation time of the wiring. In order to ignore transmission line effects, the dither period should be approximately twenty times longer than this. This will limit dither frequency to: F2 = VF 20 • 1.017ns/ft • L Hz Where VF is the velocity factor (or velocity of propagation), and L is the length of the wiring (in feet). For example, assume the load is connected to a power supply with 1000ft of CAT5 cable. Nominal velocity of propagation is approximately 70%. F2 = 0.7 20 • 1.017e– 9 • 1000 = 34.4kHz The maximum dither frequency should not exceed F1 or F2 (whichever is less): fDITHER < min (F1, F2). Continuing this example, the dither frequency should be less than 500Hz (limited by the power supply). With the dither frequency known, the division ratio can be determined: DRATIO = fOSC fDITHER = 250,000 500 = 500 The nearest division ratio is 512 (set DIV0 = L, DIV1 = DIV2 = H). Based on this division ratio, nominal dither frequency will be: fDITHER = fOSC DRATIO = 250,000 512 = 488Hz After the dither frequency is determined, the minimum load decoupling capacitor can be determined. This load capacitor must be sufficiently large to filter out the dither signal at the load.
For more information www.linear .com/4180 applicaTions inForMaTion CLOAD = 2.2 RWIRE • 2 • fDITHER Where CLOAD is the minimum load decoupling capacitance, RWIRE is the minimum wiring resistance of one conduc- tor of the wiring pair, and fDITHER is the minimum dither frequency. Continuing the example, our CAT5 cable has a maximum 9.38Ω/100m conductor resistance. Maximum wiring resistance is: RWIRE = 2 • 1000ft • 0.305m/ft • 0.0938Ω/m RWIRE = 57.2Ω With an oscillator tolerance of ±15%, the minimum dither frequency is 414.8Hz, so the minimum decoupling capacitance is: CLOAD = 2.2 57.2Ω • 2 • 414.8Hz = 46.36µF This is the minimum value. Select a nominal value to ac- count for all factors which could reduce the nominal, such as initial tolerance, voltage and temperature coefficients and aging. CHOLD Capacitor Selection and Compensation CHOLD1 A 47nF capacitor will suffice for most applications. A smaller value might allow faster recovery from a sudden load change, but care must be taken to ensure full load p-p ripple at this node is kept within 5mV: CHOLD2 = CHOLD3 = 2.5nF fDITHER (kHz) For a dither frequency of 488Hz: CHOLD2 = CHOLD3 = 2.5nF 0.488(kHz) = 5.12nF NPO ceramic or other capacitors with low leakage and di- electric absorption should be used for all HOLD capacitors. Set CHOLD4 to 1µF. This value will be adjusted later. Compensation Start with a 47pF capacitor between the COMP and DRAIN pins of the LT4180. Add an RC network in parallel with the 47pF capacitor, 10k and 10nF are good starting values. Once the output voltage has been confirmed to regulate at the desired level at no load, increase the load current to the 100% level and monitor the wire current (dither current) with a current probe. Verify the dither current resembles a square wave with the desired dither frequency. If the output voltage is too low, increase the value of the 10k resistor until some overshoot is observed at the leading edge of the dither current waveform. If the output voltage is still too low, decrease the value of the 10nF capacitor and repeat the previous step. Repeat this process until the full load output voltage increases to within 1% below the no load level. Refer to Figures 7a, 7b and 7c, which show compensation of the 12V 1.5A buck regulator Typical Ap- plication on the data sheet. Check for proper voltage drop correction over the load range. The dither current should have good half-wave symmetry. Namely, the waveform should have similar rise and fall times, enough settling time at top and bottom and minimum to no over/undershoot. 20µs/DIV VLOAD 11.2V IDITHER 50mA/DIV
4180 F07a
Figure 7a. Dither Current and VOUT with 10nF, 10k Compensation 1.5A Load
For more information www.linear .com/4180 applicaTions inForMaTion 20µs/DIV VLOAD 11.9V
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Figure 7b. Dither Current and VOUT with 10nF, 37k Compensation 1.5A Load Figure 8a. 500mA to 1A T ransient Response Test with CHOLD4 = 25nF CHOLD4 Too Small Figure 7c. Dither Current and VOUT with 3.3nF, 28k Compensation 1.5A Load Figure 8b. 500mA to 1A T ransient Response Test with CHOLD4 = 47nF Nicely Damped Behavior 20µs/DIV VLOAD 11.9V
4180 F07c
Set the minimum value for CHOLD4, by performing a transient load test of 30% to 60% of the load and set the value of CHOLD4 to where a nicely damped waveform is observed. Refer to Figures 8a and 8b for an illustration. 10ms/DIV VLOAD 1V/DIV
4180 F08a
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After all the CHOLD values have been finalized, check for proper voltage drop correction and converter behavior (start-up, regulation, etc.), over the load and input volt- age ranges. Setting Output Voltage, Undervoltage and Overvoltage Thresholds The RUN pin has accurate rising and falling thresholds which may be used to determine when Virtual Remote Sense operation begins. Undervoltage threshold should never be set lower than the minimum operating voltage of the LT4180 (3.1V). The overvoltage threshold should be set slightly greater than the highest voltage which will be produced by the power supply or regulator: VOUT(MAX) = VLOAD(MAX) + VWIRE(MAX) VOUT(MAX) should never exceed 1.5 • VLOAD Since the RUN and OV pins connect to MOSFET input comparators, input bias currents are negligible and a com- mon voltage divider can be used to set both thresholds (Figure 9).
Figure 9. Voltage Divider for Output Voltage, UVL and OVL IES). This resistance will determine the RUN voltage level. nominal output voltage desired. VIN and SENSE should be Kelvin connected to this resistor. Figure 10. Soft-Correct Operation, CHOLD4 = 1µF
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initiated whenever an overvoltage condition occurs.
sources on the CHOLD pins should be minimized. respective guard ring drivers. thereby reducing leakage current on the hold capacitor. Figure 12. Clock Interface for Synchronization
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Figure 11. Simplified Leakage Models
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broadband noise, reducing its effect. (for isolated power supplies).
For more information www.linear .com/4180 Typical applicaTions 12V, 500mA Linear Regulator 12V, 500mA Boost Regulator R11 15k 1% 5.36k OV FB DIV0 DIV1V IN INTVCC INTVCC VPP COMP GND DRAIN DIV2 CHOLD1 CHOLD2GUARD2 GUARD3 GUARD4 CHOLD3 CHOLD4 C12 47nF
4180 TA03
4.7µH OUTPUT TO WIRING AND LOAD (100mA MINIMUM) 500mA, 6/uni03A9 MAX R WIRE 100µF LOAD CAPACITANCEVISHAY IHLP2525CZ-11 1µF R12 41.7k 10nF 3.65k 61.9k R13 1.5k 1µF 0.2/uni03A9 OSC GND VIN 0.1µF R10 84.5k FAULT SHDN VCC SYNC RT SS CLKOUT GND GATE SW1 SW1 SW1 SW2 SW2 SW2 FB VC L T3581EMSE 191k 24.3k 10k 100k 10µF 25V 4.7µF 16V 200k OV FB DIV0 DIV1VIN INTVCC INTVCC VPP COMP GND DRAIN DIV2 CHOLD1 CHOLD2GUARD2 GUARD3 GUARD4 CHOLD3 CHOLD4 C10 33nF
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2.2k SENSE SPREADU2 L T4180EGN C11 470pF 470pF 470pF 47nF IRLZ440 OUTPUT TO WIRING AND LOAD 500mA 8/uni03A9 MAX R WIRE 100µF LOAD CAPACITANCE 1µF 41.7k 3.74k 63.4k 1µF 0.2/uni03A9 OSCGND VIN 20V 27k 10µF 25V 4.7µF 25V 5.36k INTVCC 330pF VN2222 10k
For more information www.linear .com/4180 Typical applicaTions 3.3V Isolated Flyback Regulator R17 10.7k R13 5.36k OV FB DIV0 DIV1V IN VOUT SS VIN VINVIN INTVCC INTVCC2 VPP COMP GND DRAIN DIV2 PULSE ENGINEERING PA1277NL PA1277NL CHOLD1 CHOLD2GUARD2 GUARD3 GUARD4 CHOLD3 CHOLD4 C15 0.1µF
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2.74k SENSE SPREADU1 L T4180EGN C16 470pF C14 470pF C13 470pF C12 47nF C11 47pF BAV21W BAS516 Si4848DY PS2801-1 OUTPUT TO WIRING AND LOAD 3.3V , 3A 0.4/uni03A9 MAX R WIRE 4 × 470µF , AUX TPSE 477M010R0050 LOAD CAPACITANCE 1µF R15 41.2k C17 15nF 523/uni03A9 13.3k 1µF 0.033 RT FB SHDN/ UVLO SYNC GND GATEVC VC VC SENSE 0.1µF R16 36.5k 105k INTVCC2 INTVCC R14 8.66k OSC OSC VIN 18V TO 72V GND 1 2 3 5 6 7 8 5 6 7 8 3 2 UPS840 100µF 10V 100µF 10V 10k 4700pF CIN2 1µF 100V CIN1 1µF 100VR6 9.1k L T3758 EMSE R12 100/uni03A9 4.7µF 50V C18 2200pF 250V VIN 51.1 1% R7, 1/uni03A9 0.01µF R11 1.3k C10 (OPT .) RCS1 0.033/uni03A9
For more information www.linear .com/4180 package DescripTion Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings. .337 – .344* (8.560 – 8.738) GN24 REV B 0212/uni00A0 1 2 3 4 5 6 7 8 9 10 11 12 .229 – .244 (5.817 – 6.198) .150 – .157** (3.810 – 3.988) 16 17 18 19 20 21 22 23 2415 1413 .016 – .050 (0.406 – 1.270) .015 ±.004 (0.38 ±0.10) × 45° 0° – 8° TYP.0075 – .0098 (0.19 – 0.25) .0532 – .0688 (1.35 – 1.75) .008 – .012 (0.203 – 0.305) TYP .004 – .0098 (0.102 – 0.249) .0250 (0.635) BSC .033 (0.838) REF .254 MIN RECOMMENDED SOLDER PAD LAYOUT .150 – .165 .0250 BSC.0165 ±.0015 .045 ±.005 * DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE ** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE INCHES (MILLIMETERS) NOTE: 1. CONTROLLING DIMENSION: INCHES 2. DIMENSIONS ARE IN 3. DRAWING NOT TO SCALE 4. PIN 1 CAN BE BEVEL EDGE OR A DIMPLE 24-Lead Plastic SSOP (Narrow .150 Inch) (Reference LTC DWG # 05-08-1641 Rev B)
For more information www.linear .com/4180 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa- tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
revision hisTory
REV DATE DESCRIPTION PAGE NUMBER A 6/11 Revised Typical Applications drawings Revised Electrical Characteristics Replaced curves G08 and G09 in Typical Performance Characteristics Replaced text for CHOLD Capacitor Selection and Compensation section and deleted Power Supply Current Limiting paragraph in Applications Information section 1, 13, 14, 18 2, 3 10, 11 B 4/13 Revised schematics 14, 15, 18
For more information www.linear .com/4180 LINEAR TECHNOLOGY CORPORA TION 2010 LT 0413 REV B • PRINTED IN USA Linear Technology Corporation 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear .com/4180 Typical applicaTion relaTeD parTs PART NUMBER DESCRIPTION COMMENTS LT3581 Boost/Inverting DC/DC Converter with 3.3A Switch, Soft-Start and Synchronization 2.5V ≤ VIN ≤ 22V, Current Mode Control, 200kHz to 2.5MHz, MSOP-16E and 3mm × 4mm DFN-14 Packages LT3685 36V, 2A, 2.4MHz Step-Down Switching Regulator 3.6V≤ V IN ≤ 36V (60VPK), Integrated Boost Diode, MSOP-10E and 3mm × 3mm DFN Packages LT3573 Isolated Flyback Switching Regulator with 60V Integrated Switch 3V ≤ V IN ≤ 40V, Up to 7W, No Opto-Isolator or Third Winding Required, LT3757 Boost, Flyback, SEPIC and Inverting Controller 2.9V ≤ V IN ≤ 40V, Current Mode Control, 100kHz to 1MHz Programmable Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages LT3758 Boost, Flyback, SEPIC and Inverting Controller 5.5V ≤ V IN ≤ 100V, Current Mode Control, 100kHz to 1MHz Programmable Operation Frequency, MSOP-10E and 3mm × 3mm DFN-10 Packages LTC3805/ LTC3805-5 Adjustable Fixed 70kHz to 700kHz Operating Frequency Flyback Controller V IN and VOUT Limited Only by External Components, MSOP-10E and 3mm × 3mm DFN-10 Packages R13 28k R10 5.36k OV FB DIV0 DIV1V IN VIN 22V TO 36V GND VIN BD INTVCC INTVCC INTVCC VPP COMP GND DRAIN DIV2 CHOLD1 CHOLD2GUARD2 GUARD3 GUARD4 CHOLD3 CHOLD4 C13 47nF
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2.01k DFLS240 CMDSH-3 SENSE SPREAD L T4180EGN C14 330pF C12 470pF C11 470pF C10 47nF 47pF UI L T3685EDD OUTPUT TO WIRING AND LOAD 12V , 1.5A 2.5/uni03A9 MAX R WIRE 470µF LOAD CAPACITANCE 1µF R12 22.1k C15 3.3nF 3.65k 61.9k VISHAY 1HLP2020CZ-11 1µF 0.067/uni03A9 BOOST SYNC RT FB VC SW PG RUN/SD 22µF 25V R11 0.1µF 50V 22µF 50V 1µF 50V 100k 68.1k INTVCC 30.1k 10k OSC 0.47µF L1, 10µH 12V 1.5A Buck Regulator